A semiconductor device includes a graphene film disposed on a substrate and formed of atomic layers of graphene that are stacked, a source electrode and a drain electrode disposed on the graphene film, and a gate electrode disposed on the graphene film between the source electrode and the drain electrode with a gate insulator film interposed between the gate electrode and the graphene film, wherein a first number of the atomic layers of the graphene film in a source region where the source electrode is located and a drain region where the drain electrode is located is greater than a second number of the atomic layers of the graphene film in a channel region where the gate electrode is located.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The semiconductor device according to claim 1, wherein the first number of the atomic layers in the source region and the drain region is five or greater layers, and the second number of the atomic layers in the channel region is two or less layers.
3. The semiconductor device according to claim 1, wherein a width of each of the source region and the drain region in a first direction perpendicular to a second direction in which the source electrode and the drain electrode are arranged is greater than a width of the channel region in the first direction.
4. The semiconductor device according to claim 1, wherein the first number of the atomic layers in the source region and the drain region is ten or greater layers, and the second number of the atomic layers in the channel region is two or less layers.
5. The semiconductor device according to claim 4, wherein the first number of the atomic layers in the source region and the drain region is 20 or less layers.
6. The semiconductor device according to claim 1, wherein the third number of the atomic layers in the first region is ten or greater layers, and the fourth number of the atomic layers in the second region is ten or greater layers.
7. The semiconductor device according to claim 6, wherein a fifth number of the atomic layers in a third region, which is a region other than the first region in the first access region, is less than the third number of the atomic layers in the first region, and a sixth number of the atomic layers in a fourth region, which is a region other than the second region in the second access region, is less than the fourth number of the atomic layers in the second region.
8. The semiconductor device according to claim 7, wherein a width of the third region in a direction from the source region to the drain region is less than a width of the first region in the direction from the source region to the drain region, and a width of the fourth region in the direction from the source region to the drain region is less than a width of the second region in the direction from the source region to the drain region.
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August 10, 2021
December 10, 2024
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