A semiconductor device includes a first layer that contains gold (Au) and is formed on one surface of a semiconductor substrate and a second layer that contains nickel (Ni) and is formed on the first layer. The semiconductor device is provided with a via hole that passes through the second layer, the first layer, and the semiconductor substrate from one surface to another surface opposite thereto, and a via wiring is formed on the inner surface of the via hole. The second layer is a mask used when the semiconductor substrate is etched to form the via hole, and the first layer is a base layer for forming the second layer on the semiconductor substrate. By using an Au-containing layer as the first layer, side etching on the first layer is prevented when the semiconductor substrate is etched, and disconnection of the via wiring is prevented.
Legal claims defining the scope of protection, as filed with the USPTO.
2. The semiconductor device according to claim 1, further comprising a third layer provided on the third surface of the semiconductor substrate, wherein the via hole passes through the second layer, the first layer, and the semiconductor substrate from the first surface to the third surface and reaches the third layer.
3. The semiconductor device according to claim 2, further comprising a transistor provided at the third surface of the semiconductor substrate and including an electrode, wherein the third layer is connected to the electrode of the transistor.
5. The semiconductor device according to claim 4, wherein the nitride semiconductor substrate is an InxAlyGa1-(x+y)N substrate (0≤x≤1, 0≤y≤1, 0≤x+y≤1).
6. The semiconductor device according to claim 4, wherein the nitride semiconductor layer includes at least one InxAlyGa1-(x+y)N layer (0≤x≤1, 0≤y≤1, 0≤x+y≤1).
7. The semiconductor device according to claim 4, wherein the third surface of the semiconductor substrate is a surface of the nitride semiconductor layer, the surface being opposite to the nitride semiconductor substrate.
8. The semiconductor device according to claim 4, wherein the third surface of the semiconductor substrate is a surface of the nitride semiconductor substrate, the surface being opposite to the first surface.
10. The semiconductor device manufacturing method according to claim 9, further comprising forming a third layer on the third surface of the semiconductor substrate, wherein the forming of the via hole includes forming such that the via hole passes through the second layer, the first layer, and the semiconductor substrate from the first surface to the third surface and reaches the third layer.
11. The semiconductor device manufacturing method according to claim 10, further comprising forming a transistor having an electrode connected to the third layer at the third surface of the semiconductor substrate.
13. The semiconductor device manufacturing method according to claim 12, wherein the third surface of the semiconductor substrate is a surface of the nitride semiconductor layer, the surface being opposite to the nitride semiconductor substrate.
14. The semiconductor device manufacturing method according to claim 12, wherein the third surface of the semiconductor substrate is a surface of the nitride semiconductor substrate, the surface being opposite to the first surface.
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August 6, 2021
December 24, 2024
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