Disclosed in the implementations of the present disclosure are a mapping method, an encoder, a decoder, and a computer storage medium. The method may include: determining an intra prediction mode used at the time of encoding or decoding a current block; mapping, if the intra prediction mode is a MIP mode, the MIP mode to a first non-MIP mode; and mapping, if the intra prediction mode is a non-MIP mode, the non-MIP mode to a second MIP mode.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for decoding a picture, applied to a decoder, wherein the method comprises: determining an intra prediction mode indication for a current block; when the current block is of a non-Matrix-based Intra Prediction (MIP) mode, a neighboring block of the current block is of MIP mode, the MIP mode of the neighboring block is mapped to a PLANAR mode, and the PLANAR mode is used to derive a Most Probable Modes List (MPM) of the current block of the non-MIP mode, wherein the derivation includes listing the PLANAR mode as a first mode in the MPM.
2. The method according to claim 1, wherein the neighboring block comprises at least one of a left neighboring block or an above neighboring block.
3. The method according to claim 1, wherein when the current block is of the non-MIP mode, the non-MIP mode is determined as an intra prediction mode for a color component of the current block.
4. The method according to claim 3, wherein the non-MIP mode is mapped to a MIP mode, wherein the MIP mode is one of MIP modes preset before decoding the current block.
5. The method according to claim 1, wherein determining the intra prediction mode indication for the current block comprises: decoding prediction mode information signalled in a bitstream, wherein the prediction mode information indicates the intra prediction mode for the current block.
6. A decoder, comprises a processor and a storage medium storing instructions executable by the processor, the storage medium relying on the processor to execute an operation through a communication bus, and when the instructions are executed by the processor, the processor is configured to: determine an intra prediction mode indication for a current block; when the current block is of a non-Matrix-based Intra Prediction (MIP) mode, a neighboring block of the current block is of MIP mode, the MIP mode of the neighboring block is mapped to a PLANAR mode, and the PLANAR mode is used to derive a Most Probable Modes List (MPM) of the current block of the non-MIP mode, wherein the derivation includes listing the PLANAR mode as a first mode in the MPM.
7. The decoder according to claim 6, wherein the neighboring block comprises at least one of a left neighboring block or an above neighboring block.
8. The decoder according to claim 6, wherein when the current block is of the non-MIP mode, the non-MIP mode is determined as an intra prediction mode for a color component of the current block.
9. A method for encoding a picture, applied to an encoder, wherein the method comprises: determining an intra prediction mode for a current block; when the current block is of a non-Matrix-based Intra Prediction (MIP) mode, a neighboring block of the current block is of MIP mode, the MIP mode of the neighboring block is mapped to a PLANAR mode, and the PLANAR mode is used to derive a Most Probable Modes List (MPM) of the current block of the non-MIP mode, wherein the derivation includes listing the PLANAR mode as a first mode in the MPM.
10. The method according to claim 9, wherein the neighboring block comprises at least one of a left neighboring block or an above neighboring block.
11. The method according to claim 9, wherein when the current block is of the non-MIP mode, the non-MIP mode is determined as an intra prediction mode for a color component of the current block.
12. The method according to claim 11, wherein the non-MIP mode is mapped to a MIP mode, wherein the MIP mode is one of MIP modes preset before encoding the current block.
13. The method according to claim 9, comprising: writing prediction mode information into a bitstream, wherein the prediction mode information indicates the intra prediction mode for the current block.
14. An encoder, comprises a processor and a storage medium storing instructions executable by the processor, the storage medium relying on the processor to execute an operation through a communication bus, and when the instructions are executed by the processor, the processor is configured to: determine an intra prediction mode for a current block; when the current block is of a non-Matrix-based Intra Prediction (MIP) mode, a neighboring block of the current block is of MIP mode, the MIP mode of the neighboring block is mapped to a PLANAR mode, and the PLANAR mode is used to derive a Most Probable Modes List (MPM) of the current block of the non-MIP mode, wherein the derivation includes listing the PLANAR mode as a first mode in the MPM.
15. The encoder according to claim 14, wherein the neighboring block comprises at least one of a left neighboring block or an above neighboring block.
16. The encoder according to claim 14, wherein when the current block is of the non-MIP mode, the non-MIP mode is determined as an intra prediction mode for a color component of the current block.
17. The encoder according to claim 16, wherein the non-MIP mode is mapped to a MIP mode, wherein the MIP mode is one of MIP modes preset before encoding the current block.
18. The encoder according to claim 14, wherein the processor is configured to: write prediction mode information into a bitstream, wherein the prediction mode information indicates the intra prediction mode for the current block.
19. A non-transitory computer readable storage medium in which executable instructions are stored, when the executable instructions are executed by one or more processors, the one or more processors executing the mapping method according to claim 1.
20. A non-transitory computer readable storage medium in which executable instructions are stored, when the executable instructions are executed by one or more processors, the one or more processors executing the mapping method according to claim 9.
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October 14, 2022
February 25, 2025
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