A display device includes a plurality of pixels arranged in a matrix on a substrate along a first direction and a second direction intersecting the first direction. Each of the plurality of pixels includes a transistor, a first transparent electrode located over the transistor and electrically connected to the transistor, a second transparent electrode located over the first transparent electrode and electrically connected to the first transparent electrode via an opening, an insulating layer located over the second transparent electrode, a third transparent electrode located over the insulating layer; and a metal layer in contact with the third transparent electrode. The opening overlaps a gate electrode of the transistor. At least a part of the metal layer is provided in the opening and overlaps the gate electrode. The metal layer extends along the first direction and is commonly provided in the pixels arranged in the first direction.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A display device comprising: a substrate; and pixels on the substrate, each of the pixels comprising: a transistor including a gate electrode and a semiconductor layer having a channel region, the gate electrode overlapping the channel region in a plan view; a first transparent electrode directly in contact with the semiconductor layer; a first insulating layer located on the first transparent electrode and having an opening that exposes the first transparent electrode and overlaps the channel region in the plan view; a second transparent electrode located on the first insulating layer and electrically connected to the first transparent electrode via the opening, the first insulating layer being located between the first transparent electrode and the second transparent electrode; a second insulating layer on the second transparent electrode, a part of the second insulating layer being located in the opening; a third transparent electrode located on the second insulating layer, a part of the third insulating layer being located in the opening, the second insulating layer being located between the second transparent electrode and the third transparent electrode; and a metal layer located in the opening and between the second insulating layer and the third transparent electrode, the metal layer directly in contact with neither the first transparent electrode nor the second transparent electrode.
2. The display device according to claim 1, wherein the metal layer overlaps the channel region.
3. The display device according to claim 1, wherein the metal layer is directly in contact with the third transparent electrode in the opening.
4. The display device according to claim 1, wherein the metal layer is electrically connected to neither the first transparent electrode nor the second transparent electrode.
5. The display device according to claim 1, wherein the semiconductor layer is an oxide semiconductor layer.
6. The display device according to claim 1, further comprising a light shielding layer located between the substrate and the transistor, wherein the light shielding layer overlaps the metal layer.
7. The display device according to claim 6, wherein the light shielding layer overlaps an entirety of the channel region in the plan view.
8. The display device according to claim 6, wherein the pixels include first pixels arranged in a first direction and having respective channel regions, and the light shielding layer overlaps the respective channel regions continuously.
9. The display device according to claim 1, wherein the metal layer overlaps an entirety of the opening.
10. The display device according to claim 1, wherein the metal layer is commonly provided in the pixels.
11. The display device according to claim 10, wherein the pixels are arranged in a matrix, a shape of the metal layer is a grid pattern, and the metal layer exposes a first portion of the second transparent electrode of each of the pixels.
12. The display device according to claim 11, wherein the metal layer overlaps a second portion of the second transparent electrode of each of the pixels.
13. The display device according to claim 11, wherein the metal layer has a first opening exposing the second transparent electrode, and a side of the first opening is in the opening.
14. The display device according to claim 11, further comprising a first pixel with a first opening and a second pixel with a second opening, the first and second pixels being included in the pixels, wherein the first pixel is adjacent to the second pixel in a second direction, a first side of the first opening is located in the opening of the first pixel, and a second side of the second opening faces the first side and is located in the opening of the first pixel.
15. The display device according to claim 11, further comprising a first pixel with a first opening and a second pixel with a second opening, the first and second pixels being included in the pixels, wherein a color of the first pixel is different from a color of the second pixel, and a size of the first opening is different from a size of the second opening.
16. A display device comprising: a substrate; pixels on the substrate, each of the pixels comprising: a transistor including a gate electrode and a semiconductor layer having a channel region, the gate electrode overlapping the channel region in a plan view; a first transparent electrode directly in contact with the semiconductor layer; a first insulating layer located on the first transparent electrode and having an opening that exposes the first transparent electrode and overlaps the channel region in the plan view; a second transparent electrode located on the first insulating layer and electrically connected to the first transparent electrode via the opening, the first insulating layer being located between the first transparent electrode and the second transparent electrode; a second insulating layer on the second transparent electrode, a part of the second insulating layer being located in the opening; and a metal layer located in the opening, overlapping the channel region, and the metal layer directly in contact with neither the first transparent electrode nor the second transparent electrode; and a common electrode overlapping the second transparent electrode and the metal layer, wherein the metal layer is electrically connected to the common electrode.
17. The display device according to claim 16, wherein the metal layer is electrically connected to neither the first transparent electrode nor the second transparent electrode.
18. The display device according to claim 16, wherein the pixels are arranged in a matrix, the metal layer is commonly provided in the pixels, a shape of the metal layer is a grid pattern, the metal layer exposes a first portion of the second transparent electrode of each of the pixels and overlaps a second portion of the second transparent electrode of each of the pixels.
19. The display device according to claim 16, further comprising a light shielding layer located between the substrate and the transistor, wherein the light shielding layer overlaps an entirety of the channel region in the plan view, and the metal layer overlaps an entirety of the opening.
20. A display device comprising: a substrate; and pixels on the substrate, each of the pixels comprising: a transistor including a gate electrode and a semiconductor layer having a channel region, the gate electrode overlapping the channel region in a plan view; a first transparent electrode directly in contact with the semiconductor layer; a first insulating layer located on the first transparent electrode and having an opening that exposes the first transparent electrode and overlaps the channel region in the plan view; a second transparent electrode located on the first insulating layer and electrically connected to the first transparent electrode via the opening, the first insulating layer being located between the first transparent electrode and the second transparent electrode; a second insulating layer on the second transparent electrode, a part of the second insulating layer being located in the opening; and a metal layer located in the opening, overlapping the channel region, and the metal layer directly in contact with neither the first transparent electrode nor the second transparent electrode, wherein the metal layer is electrically connected to neither the first transparent electrode nor the second transparent electrode.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
April 29, 2024
March 4, 2025
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