Patentable/Patents/US-12243860
US-12243860

Package structure, semiconductor device comprising grating coupler and reflector structure embedded in the dielectric layer

PublishedMarch 4, 2025
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A package structure includes a photonic die, an electronic die and a gap filling layer. The photonic die includes a dielectric layer, a silicon layer, a reflector structure and a plurality of connection pads. The silicon layer is disposed on the dielectric layer, wherein the silicon layer includes a grating coupler having a plurality of first trench patterns with a first depth and a plurality of second trench patterns with a second depth, wherein the first depth is different than the second depth. The reflector structure is embedded in the dielectric layer below the grating coupler. The connection pads are disposed over the dielectric layer. The electronic die is disposed on the photonic die, wherein the electronic die includes a plurality of bonding pads bonded to the connection pads of the photonic die. The gap filling layer is disposed on the photonic die and surrounding the electronic die.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A package structure, comprising: a photonic die, comprising: a dielectric layer; a silicon layer disposed on the dielectric layer, wherein the silicon layer includes a grating coupler having a plurality of first trench patterns with a first depth and a plurality of second trench patterns with a second depth, wherein the first depth is different than the second depth; a reflector structure embedded in the dielectric layer below the grating coupler; a plurality of connection pads disposed over the dielectric layer; an electronic die disposed on the photonic die, wherein the electronic die comprises a plurality of bonding pads bonded to the plurality of connection pads of the photonic die; and a gap filling layer disposed on the photonic die and surrounding the electronic die.

2

2. The package structure according to claim 1, wherein the photonic die further comprises a plurality of conductive pads disposed on a surface of the dielectric layer opposite to where the silicon layer is located.

3

3. The package structure according to claim 2, wherein in a region below the grating coupler, two or more of the plurality of conductive pads are joined together to form an auxiliary reflector structure.

4

4. The package structure according to claim 3, further comprising two or more conductive bumps disposed on and electrically connected to the auxiliary reflector structure.

5

5. The package structure according to claim 2, further comprising a plurality of through dielectric vias electrically connecting the plurality of bonding pads of the electronic die to the plurality of conductive pads of the photonic die, wherein the through dielectric vias passes through the silicon layer and the reflector structure.

6

6. The package structure according to claim 1, wherein a ratio of a thickness of the reflector structure to a thickness of the silicon layer is in a range of 1:1 to 1:30.

7

7. The package structure according to claim 1, further comprising a fiber structure disposed on the gap filling layer and overlapped with the grating coupler, and a fiber tilt angle of the fiber structure is in a range of 5° to 15°.

8

8. The package structure according to claim 1, wherein the photonic die further comprises an interconnection layer disposed in between the plurality of connection pads and the silicon layer, and a through dielectric via that passes through the reflector structure and the through dielectric via is electrically connected to the interconnection layer.

9

9. A semiconductor device, comprising: a stacked die package, comprising an electronic die stacked on a photonic die, wherein the photonic die comprises: a grating coupler having a plurality of trench patterns; a plurality of conductive pads located over a surface of the photonic die; an interconnection layer disposed in between the electronic die and the plurality of conductive pads; and a plurality of through dielectric vias electrically connecting the plurality of conductive pads to the interconnection layer, and electrically connecting the plurality of conductive pads to the electronic die; a plurality of conductive bumps disposed on and electrically connected to the plurality of conductive pads of the stacked die package.

10

10. The semiconductor device according to claim 9, further comprising a circuit substrate, wherein the stacked die package is disposed on and electrically connected to the circuit substrate through the plurality of conductive bumps.

11

11. The semiconductor device according to claim 10, further comprising an interposer structure disposed in between the circuit substrate and the plurality of conductive bumps, wherein the stacked die package is disposed on and electrically connected to the circuit substrate through the plurality of conductive bumps and the interposer structure.

12

12. The semiconductor device according to claim 9, further comprising an insulating encapsulant encapsulating the stacked die package, and a redistribution structure disposed over the plurality of conductive bumps and the stacked die package, wherein the plurality of conductive bumps is electrically connecting the plurality of conductive pads of the photonic die to the redistribution structure.

13

13. The semiconductor device according to claim 9, further comprising a reflector structure disposed in between the grating coupler and the plurality of conductive pads, and the reflector structure covers a portion of the grating coupler that is overlapped with the plurality of trench patterns.

14

14. The semiconductor device according to claim 9, wherein in a region below the grating coupler, two or more of the plurality of conductive pads are joined together to form an auxiliary reflector structure.

15

15. The semiconductor device according to claim 9, further comprising a fiber structure disposed over the photonic die and overlapped with the grating coupler, and a fiber tilt angle of the fiber structure is in a range of 5° to 15°.

16

16. A structure, comprising: a first die, comprising a plurality of connection pads, a grating coupler and a plurality of conductive pads, wherein the plurality of connection pads and the plurality of conductive pads are located on two opposite sides of the first die; a second die stacked on the first die, and comprising a plurality of bonding pads, wherein the plurality of bonding pads is electrically joined with the plurality of connection pads of the first die; a fiber structure disposed over the first die; and a reflector structure disposed below the grating coupler, wherein the reflector structure, the grating coupler and the fiber structure are overlapped with one another along a first direction, wherein a portion of the plurality of conductive pads of the first die are joined together to form an auxiliary reflector structure, and wherein the auxiliary reflector structure is overlapped with the reflector structure, the grating coupler and the fiber structure along the first direction.

17

17. The structure according to claim 16, wherein a fiber tilt angle of the fiber structure relative to a plane perpendicular to the grating coupler is in a range of 5° to 15°.

18

18. The structure according to claim 16, wherein the reflector structure is embedded in a dielectric layer of the first die, and sidewalls of the reflector structure are aligned with sidewalls of the dielectric layer.

19

19. The structure according to claim 16, wherein the first die further comprises a plurality of conductive bumps disposed on and electrically connected to the plurality of conductive pads.

20

20. The structure according to claim 16, wherein the first die comprises a first interconnection layer having a plurality of metallization layers, the second die comprises a second interconnection layer having a plurality of metallization layers, and wherein the first interconnection layer of the first die is overlapped with the second interconnection layer of the second die along the first direction.

Classification Codes (CPC)

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Patent Metadata

Filing Date

February 16, 2022

Publication Date

March 4, 2025

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Cite as: Patentable. “Package structure, semiconductor device comprising grating coupler and reflector structure embedded in the dielectric layer” (US-12243860). https://patentable.app/patents/US-12243860

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