A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric around the first nanostructure; a second high-k gate dielectric around the second nanostructure; and a gate electrode over the first and second high-k gate dielectrics. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises: a first p-type work function metal; a barrier material over the first p-type work function metal; and a second p-type work function metal over the barrier material, the barrier material physically separating the first p-type work function metal from the second p-type work function metal.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A method comprising: depositing a gate dielectric around a first nanostructure and a second nanostructure, the first nanostructure is disposed over the second nanostructure; depositing a p-type work function metal over the gate dielectric, wherein after depositing the p-type work function metal, an opening remains between a first portion of the p-type work function metal and a second portion of the p-type work function metal, the first portion of the p-type work function metal and the second portion of the p-type work function metal being between the first nanostructure and the second nanostructure; and depositing a barrier material over the p-type work function metal using an atomic layer deposition (ALD) process, wherein the barrier material fills the opening between the first portion of the p-type work function metal and the second portion of the p-type work function metal.
2. The method of claim 1, wherein the ALD process comprises using a fluorine-comprising precursor to deposit the barrier material.
3. The method of claim 2, wherein the fluorine-comprising precursor is WF6.
4. The method of claim 2, wherein the ALD process comprises flowing the fluorine-comprising precursor at a rate of 30 sccm to 300 sccm.
5. The method of claim 2, wherein the ALD process comprises flowing the fluorine-comprising precursor with a pulse time in a range of 0.5 seconds to 60 seconds.
6. The method of claim 2 further comprising diffusing fluorine from the fluorine-comprising precursor through the barrier material into the gate dielectric.
7. The method of claim 2, wherein the ALD process further comprises using a silicon-comprising precursor, and wherein a ratio of the fluorine-comprising precursor to the silicon-comprising precursor flowed during the ALD process is in a range of 0.75 to 1.25.
8. The method of claim 1, wherein the barrier material comprises tungsten, and the p-type work function metal comprises titanium nitride.
9. A method comprising: depositing a gate dielectric around a first nanostructure and a second nanostructure, the first nanostructure is disposed over the second nanostructure; depositing a p-type work function metal over the gate dielectric, wherein depositing the p-type work function metal comprises depositing the p-type work function metal in a region between the first nanostructure and the second nanostructure; and depositing a barrier material over the p-type work function metal, wherein depositing the barrier material comprises depositing the barrier material in the region between the first nanostructure and the second nanostructure such that a first portion of the barrier material defines an interface with a second portion of the barrier material.
10. The method of claim 9, wherein the p-type work function metal comprises titanium nitride, and wherein the barrier material comprises tungsten.
11. The method of claim 9, wherein depositing the barrier material comprises an ALD process, and wherein the ALD process comprises flowing a first precursor and a second precursor, the first precursor comprising fluorine, the second precursor comprising silicon.
12. The method of claim 11, wherein fluorine diffuses into the gate dielectric as a result of the ALD process.
13. The method of claim 9 further comprising: depositing an adhesion layer over the barrier material; and depositing a fill metal over the adhesion layer.
14. The method of claim 9 further comprising forming an interfacial layer around the first nanostructure and the second nanostructure, wherein depositing the gate dielectric comprises depositing the gate dielectric over the interfacial layer.
15. A method comprising: defining a first channel region and a second channel region over a substrate, the first channel region being disposed above and separated from the second channel region by an inner sheet region; depositing a gate dielectric material in the inner sheet region, a first portion of the gate dielectric material being disposed on a bottom surface of the first channel region, and a second portion of the gate dielectric material being disposed on a top surface of the second channel region; depositing a p-type work function metal on the gate dielectric material in the inner sheet region, a first portion of the p-type work function metal being disposed on a bottom surface of the first channel region, and a second portion of the p-type work function metal being disposed on a top surface of the second channel region; and depositing a barrier material on the p-type work function metal in the inner sheet region, wherein the barrier material defines a seam with itself in the inner sheet region.
16. The method of claim 15, wherein depositing the barrier material comprises an ALD process, and wherein the ALD process comprises flowing a first precursor and a second precursor, the first precursor comprising fluorine, the second precursor comprising silicon.
17. The method of claim 16, wherein depositing the barrier material comprises diffusing fluorine from the first precursor into the gate dielectric material.
18. The method of claim 16, wherein a ratio of the first precursor to the second precursor during the ALD process is in a range of 0.75 to 1.25.
19. The method of claim 16, wherein the first precursor is WF6.
20. The method of claim 15, further comprising: depositing an adhesion layer over the barrier material, wherein the adhesion layer comprises a same material as the p-type work function metal; and depositing a fill metal over the adhesion layer.
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July 20, 2022
March 4, 2025
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