Patentable/Patents/US-12255118
US-12255118

Package structure and method of fabricating the same

PublishedMarch 18, 2025
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A package structure includes a circuit substrate, a semiconductor package, a thermal interface material, a lid structure and a heat dissipation structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The thermal interface material is disposed on the semiconductor package. The lid structure is disposed on the circuit substrate and surrounding the semiconductor package, wherein the lid structure comprises a supporting part that is partially covering and in physical contact with the thermal interface material. The heat dissipation structure is disposed on the lid structure and in physical contact with the supporting part of the lid structure.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A structure, comprising: a package disposed on a substrate; a lid structure disposed on the substrate and surrounding the package, wherein the lid structure comprises an opening; a heat dissipation structure disposed on the lid structure, wherein the heat dissipation structure is a heat sink comprising: fin structures; a fin base supporting the fin structures; a step structure supporting the fin base; and a protruding portion disposed on the step structure, wherein the protruding portion is filled into the opening of the lid structure and laterally surrounded by the lid structure.

2

2. The structure according to claim 1, further comprising a thermal interface material disposed in between the package and the lid structure, wherein the lid structure is partially covering a top surface of the thermal interface material, and the protruding portion of the heat sink is in physical contact with the top surface of the thermal interface material.

3

3. The structure according to claim 2, wherein the thermal interface material comprises a first thermal interface material having a heat transfer coefficient of greater than 20 W/mK, and a second thermal interface material having a heat transfer coefficient of greater than 3 W/mK and less than 20 W/mK, and wherein the second thermal interface material is surrounding the first thermal interface material, and the protruding portion is in physical contact with the first thermal interface material.

4

4. The structure according to claim 1, wherein a width of the step structure is smaller than a width of the fin base, and a width of the protruding portion is smaller than the width of the step structure.

5

5. The structure according to claim 1, wherein the lid structure further comprises a plurality of sectioning parts, and the opening of the lid structure includes a plurality of sub-openings defined by the plurality of sectioning parts.

6

6. The structure according to claim 5, wherein the protruding portion includes a plurality of protruding sub-portions filled into each of the plurality of sub-openings.

7

7. The structure according to claim 1, wherein the lid structure comprises a sidewall part, a supporting part and a supporting bar, the sidewall part is disposed on the substrate and surrounding the package, the supporting part is connected to the sidewall part and is partially overlapped with a top surface of the package, and the supporting bar disposed on and protruding out from the supporting part, wherein the supporting bar is surrounding and in physical contact with a portion of the heat sink.

8

8. A structure, comprising: a circuit substrate; a plurality of first semiconductor dies and a plurality of second semiconductor dies disposed on the circuit substrate; a lid structure disposed on the circuit substrate, wherein the lid structure includes a supporting part that is non-overlapped with the plurality of first semiconductor dies and that is overlapped with the plurality of second semiconductor dies; and a heat dissipation element partially disposed on the supporting part and overlapped with the plurality of first semiconductor dies, wherein the heat dissipation element comprises a protruding portion and a concaved portion surrounding the protruding portion, the protruding portion is in contact with sidewalls of the supporting part, and the lid structure is in physical contact with the concaved portion of the heat dissipation element.

9

9. The structure according to claim 8, wherein the lid structure further comprises a supporting bar disposed on and protruding out from the supporting part, and the supporting bar is filled into the concaved portion of the heat dissipation element.

10

10. The structure according to claim 8, further comprising: a first thermal interface material having a heat transfer coefficient of greater than 20 W/mK, wherein the first thermal interface material is covering the plurality of first semiconductor dies, and the protruding part of the heat dissipation element is in physical contact with the first thermal interface material; and a second thermal interface material having a heat transfer coefficient of greater than 3 W/mK and less than 20 W/mK, wherein the second thermal interface material is covering the plurality of second semiconductor dies.

11

11. The structure according to claim 8, wherein the lid structure further comprises a plurality of sectioning parts joined with the supporting part and defines a plurality of sub-openings in the lid structure, and wherein a dimension of the plurality of sub-openings corresponds to a dimension of the plurality of first semiconductor dies.

12

12. The structure according to claim 8, further comprising an interposer structure electrically connecting the plurality of first semiconductor dies and the plurality of second semiconductor dies to the circuit substrate.

13

13. The structure according to claim 8, wherein the heat dissipation structure further comprises: fin structures; a fin base supporting the fin structures; a step structure supporting the fin base; and wherein the protruding portion is disposed on the step structure.

14

14. The structure according to claim 8, wherein the plurality of first semiconductor dies are logic dies, and the plurality of second semiconductor dies are memory dies.

15

15. A structure, comprising: a package comprising a plurality of first semiconductor dies; a lid laterally surrounding the package and partially covering a top surface of the package, wherein the lid comprises a plurality of sectioning parts that define a plurality of sub-openings, and wherein a dimension of the plurality of sub-openings corresponds to a dimension of the plurality of first semiconductor dies; and a heat dissipation structure disposed on the lid and filled into the plurality of sub-openings.

16

16. The structure according to claim 15, further comprising a thermal interface material disposed on the plurality of first semiconductor dies, wherein the heat dissipation structure is in physical contact with the thermal interface material.

17

17. The structure according to claim 15, wherein the lid further comprises a supporting bar protruding into the heat dissipation structure, and side surfaces of the supporting bar are laterally surrounded by and in physical contact with the heat dissipation structure.

18

18. The structure according to claim 15, wherein the heat dissipation structure comprises a step structure and a plurality of fin structures disposed over the step structure, and wherein a lateral dimension of the step structure is smaller than a lateral dimension of the lid.

19

19. The structure according to claim 15, wherein the heat dissipation structure comprises a plurality of protruding sub-portions, and the plurality of protruding sub-portions is filled into the plurality of sub-openings.

20

20. The structure according to claim 15, wherein the package structure further comprises a plurality of second semiconductor dies disposed aside the plurality of first semiconductor dies, wherein a size of the plurality of second semiconductor dies is smaller than a size of the plurality of first semiconductor dies, and the lid is overlapped with the plurality of second semiconductor dies.

Classification Codes (CPC)

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Patent Metadata

Filing Date

July 18, 2023

Publication Date

March 18, 2025

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Cite as: Patentable. “Package structure and method of fabricating the same” (US-12255118). https://patentable.app/patents/US-12255118

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