The present application provides a reworking method of a failed hard mask layer on a via opening in a dielectric layer, including removing the failed hard mask layer; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; and forming a mask layer on the top hard mask layer.
Legal claims defining the scope of protection, as filed with the USPTO.
1. A reworking method of a semiconductor device, comprising: forming a failed hard mask layer to fill a via opening in a dielectric layer; removing the failed hard mask layer from the via opening; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; and forming a patterned mask layer on the top hard mask layer, wherein the underfill layer is formed of a material having a faster etch rate than a material of the dielectric layer.
2. The reworking method of claim 1, wherein the underfill layer and the failed hard mask layer comprise different materials.
3. The reworking method of claim 2, wherein a thickness of the failed hard mask layer and a thickness of the underfill layer are different.
4. The reworking method of claim 3, wherein the thickness of the failed hard mask layer is between about 30 nm and about 50 nm.
5. The reworking method of claim 4, wherein the thickness of the underfill layer is between about 180 nm and about 220 nm.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
March 31, 2022
May 6, 2025
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