Patentable/Patents/US-12300568
US-12300568

High efficiency heat dissipation using discrete thermal interface material films

PublishedMay 13, 2025
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A semiconductor structure includes: a substrate; a package attached to a first surface of the substrate, where the package includes: an interposer, where a first side of the interposer is bonded to the first surface of the substrate through first conductive bumps; dies attached to a second side of the interposer opposing the first side; and a molding material on the second side of the interposer around the dies; a plurality of thermal interface material (TIM) films on a first surface of the package distal from the substrate, where each of the TIM films is disposed directly over at least one respective die of the dies; and a heat-dissipation lid attached to the first surface of the substrate, where the package and the plurality of TIM films are disposed in an enclosed space between the heat-dissipation lid and the substrate, where the heat-dissipation lid contacts the plurality of TIM films.

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A semiconductor structure comprising: a substrate; a package attached to a first surface of the substrate, wherein the package comprises: an interposer, wherein a first side of the interposer is bonded to the first surface of the substrate through first conductive bumps; a plurality of dies attached to a second side of the interposer opposing the first side; and a molding material on the second side of the interposer around the plurality of dies; a plurality of thermal interface material (TIM) films on a first surface of the package distal from the substrate, wherein each of the plurality of TIM films is a dielectric material and is disposed directly over at least one respective die of the plurality of dies, wherein in a top view, the plurality of dies comprise a first die in a center region of the first surface of the package and comprises a second die in a first peripheral region of the first surface of the package, wherein the first die and the second die have a same height, wherein the plurality of TIM films comprise a first TIM film directly over the first die and comprise a second TIM film directly over the second die, wherein a first thickness of the first TIM film is smaller than a second thickness of the second TIM film; and a heat-dissipation lid attached to the first surface of the substrate, wherein the package and the plurality of TIM films are disposed in an enclosed space between the heat-dissipation lid and the substrate, wherein the heat-dissipation lid contacts the plurality of TIM films, wherein the plurality of TIM films are laterally spaced apart from each other with empty spaces between laterally adjacent ones of the plurality of TIM films.

2

2. The semiconductor structure of claim 1, wherein in a plan view, the molding material surrounds the plurality of dies, and the plurality of the TIM films are disposed within, and spaced apart from, boundaries of the molding material.

3

3. The semiconductor structure of claim 1, wherein a lower surface of the heat-dissipation lid contacting the plurality of TIM films is a flat surface.

4

4. The semiconductor structure of claim 3, wherein the plurality of dies further comprise a third die in a second peripheral region of the first surface of the package, the second die and the third die being disposed laterally on opposing sides of the first die, wherein the plurality of TIM films further comprise a third TIM film directly over the third die, wherein a third thickness of the third TIM film is larger than the first thickness of the first TIM film.

5

5. The semiconductor structure of claim 1, wherein the dielectric material of the plurality of TIM films is a mixture of carbon and a polymer, wherein a weight percentage of the carbon in the dielectric material is between about 40% and about 90%.

6

6. The semiconductor structure of claim 1, wherein the plurality of dies include a first subset of dies and a second subset of dies, wherein the first TIM film is disposed directly over the first subset of dies, and the second TIM film is disposed directly over the second subset of dies, wherein the first TIM film has a geometric similar shape as a contour of the first subset of dies, and the second TIM film has a geometric similar shape as a contour of the second subset of dies.

7

7. The semiconductor structure of claim 1, wherein the first TIM film comprises graphene, and the second TIM film comprises a mixture of an adhesive and a metal filler.

8

8. A semiconductor structure comprising: a substrate; a first die, a second die, and a third die attached to a first side of the substrate, wherein the second die and the third die are disposed laterally on opposing sides of the first die, wherein the first die, the second die, and the third die have a same height; a molding material over the first side of the substrate, wherein the first die, the second die, and the third die are embedded in the molding material; a heat-dissipation lid attached to the first side of the substrate, wherein the first die, the second die, and the third die are in an enclosed space between the heat-dissipation lid and the substrate, wherein the heat-dissipation lid has a planar lower surface facing the first die, the second die, and the third die; and thermal interface material (TIM) films between the heat-dissipation lid and the first die, the second die, and the third die, wherein the TIM films comprise a first TIM film, a second TIM film, and a third TIM film disposed over the first die, the second die, and the third die, respectively, wherein the TIM films are laterally spaced apart from each other, wherein there are empty spaces between adjacent ones of the TIM films, wherein a first thickness of the first TIM film is smaller than a second thickness of the second TIM film and smaller than a third thickness of the third TIM film.

9

9. The semiconductor structure of claim 8, further comprising a fourth die attached to the first side of the substrate, wherein the second die and the fourth die are on a same side of the first die, wherein the first TIM film covers the first die and has a first geometric similar shape as the first die, wherein the second TIM film covers the second die and the fourth die, and has a second geometric similar shape as a contour of the second die and the fourth die.

10

10. The semiconductor structure of claim 8, wherein the second thickness is a same as the third thickness.

11

11. The semiconductor structure of claim 8, wherein the first TIM film is formed of a first material, wherein the second TIM film and the third TIM film are formed of a second material different from the first material.

12

12. The semiconductor structure of claim 11, wherein the first material is graphene, and the second material is a mixture of an adhesive and a metal filler.

13

13. The semiconductor structure of claim 11, wherein the first TIM film comprises a plurality of sublayers of graphene film.

14

14. The semiconductor structure of claim 8, wherein the planar lower surface of the heat-dissipation lid contacts the first TIM film, the second TIM film, and the third TIM film, and wherein the first TIM film, the second TIM film, and the third TIM film contact the first die, the second die, and the third die, respectively.

15

15. A semiconductor structure comprising: a first die, a second die, and a third die attached to a first surface of a substrate, wherein the second die and the third die are on opposing sides of the first die; a molding material around the first die, the second die, and the third die; a first thermal interface material (TIM) film, a second TIM film, and a third TIM film over and attached to the first die, the second die, and the third die, respectively, wherein the first TIM film comprises a graphene film, wherein the second TIM film and the third TIM film are a mixture of an adhesive and a metal filler, wherein the first TIM film, the second TIM film, and the third TIM film are spaced apart from each other, wherein there are empty spaces between the first TIM film and the second TIM film, and between the first TIM film and the third TIM film, wherein the first die, the second die, and the third die have a same height, wherein a thickness of the first TIM film is smaller than that of the second TIM film and that of the third TIM film; and a heat-dissipation lid attached to the first surface of the substrate to form an enclosed space between the heat-dissipation lid and the substrate, wherein the first die, the second die, the third die, the first TIM film, the second TIM film, and the third TIM film are disposed in the enclosed space, wherein the first TIM film, the second TIM film, and the third TIM film contact the heat-dissipation lid.

16

16. The semiconductor structure of claim 15, wherein in a top view, the first TIM film has a first geometric similar shape as the first die, and the third TIM film has a second geometric similar shape as the third die.

17

17. The semiconductor structure of claim 15, wherein the second TIM film and the third TIM has a same thickness.

18

18. The semiconductor structure of claim 15, wherein a lower surface of the heat-dissipation lid facing the first die is a flat surface.

19

19. The semiconductor structure of claim 15, wherein the adhesive is silicone gel, and the metal filler is aluminum filler or zinc filler.

20

20. The semiconductor structure of claim 15, wherein in a top view, perimeters of the molding material define an area, wherein the first die is in a center region of the area, wherein the second die and the third die are in a peripheral region of the area.

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Patent Metadata

Filing Date

July 8, 2021

Publication Date

May 13, 2025

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