The present disclosure is directed to an inspection system for registration metrology and defect detection using darkfield and phase contrast imaging optical systems. The present system includes a transmitted light mode and diffracted light mode to enable imaging of low contrast features on blank EUV masks and semiconductor wafers. In an aspect, this system combines the optics for darkfield and phase contrast imaging, and may also include the optics for brightfield imaging, to provide analyzed data on registration errors and surface defects.
Legal claims defining the scope of protection, as filed with the USPTO.
. An inspection method comprising:
. The method of, further comprising:
. The method of, wherein the semiconductor specimen further comprises a blank extreme ultraviolet (EUV) mask and wherein the one or more features further comprises alignment marks or surface defects on the blank EUV mask.
. The method of, wherein the data analyzing for the alignment marks or surface defects on the blank EUV mask provides for comparisons of stored data for an ideal image for a standardized blank EUV mask.
. The method of, wherein the data analyzing comprises producing a combined multi-mode phase contrast, darkfield, and brightfield representation of the blank EUV mask as a defect map or alignment mark map.
. The method of, wherein the semiconductor specimen further comprises a blank semiconductor wafer and wherein the one or more features further comprises surface defects on the blank semiconductor wafer.
. The method of, wherein the data analyzing for surface defects on the blank semiconductor wafer provides for comparisons with stored data for an ideal image for a standardized blank semiconductor wafer.
. The method of, wherein the data analyzing further comprises producing a combined multi-mode phase contrast, darkfield, brightfield representation of the blank semiconductor mask as a defect map.
. The method of, wherein the providing the semiconductor specimen further comprises providing an assembled semiconductor device as the semiconductor specimen for inspection, wherein the inspection is performed upon the completion of designated assembly process steps for the assembled semiconductor.
. The method of, further comprises providing a pre-programmed pattern for automated scanning of a surface of the semiconductor specimen.
. An inspection system comprising:
. The inspection system of, wherein the optical inspection tool further comprises a third optical train configured to receive illumination from the light source and direct illumination from the light source toward the semiconductor specimen, wherein the third optical train is configured with brightfield optical components.
. The inspection system of, wherein the first optical train further comprises Zernike optical components.
. The inspection system of, wherein the second optical train further comprises Schwarzchild optical components.
. The inspection system of, wherein the semiconductor specimen further comprises a blank EUV mask with one or more alignment marks and/or defects, or a blank semiconductor wafer with one or more surface defects.
. The inspection system of, wherein the processor provides an output comprising two dimensional maps with both phase contrast data and darkfield data.
. The inspection system of, wherein the processor provides an output comprising two dimensional maps with combined phase contrast data, darkfield data, and brightfield data.
. An optical inspection tool comprising:
. The optical inspection tool of, wherein the multi-mode optical system further comprises a brightfield optical inspection tool that is retrofitted with phase contrast optical components, darkfield optical components, and phase contrast and darkfield CCD sensors.
. The inspection system of, wherein the optical components of the first optical train are different than the optical components of the second optical train.
Complete technical specification and implementation details from the patent document.
For advanced semiconductor devices, a single layer mask exposure and etch are no longer sufficient to meet the required pattern density. As a consequence, the number of masks required to produce an integrated circuit has increased. The required patterns need to be split up and divided over multiple masks. With the increasing number of masks required to produce a semiconductor device, there have been commensurate constraints on the mask-to-mask on-product overlay requirements, controls, and inspections as well.
Before a mask is patterned and especially after the mask is patterned, the mask must undergo inspections and metrology. There are often stringent on-product overlay specifications (<3-nm) required for intra-layer (e.g., multi Litho Etch (LE) and Spacer Assisted Double/Quadruple Patterning (SADP/SAQP)) overlay performance as well as for inter-layer to layer overlay. To keep the on-product overlay within semiconductor device specification over time, the number of on-wafer overlay metrology steps inside the fab has increased. It would be beneficial to fully characterize the mask-to-mask overlay off-line and apply overlay techniques to improve the on-wafer overlay.
There are off-line metrology inspection techniques that address and reduce the overall wafer/lot cycle time inside the fab. However, current inspection techniques, for example, for detecting defects in extreme ultraviolet (EUV) blanks rely on actinic inspection, which may reduce mask lifetime. The widely used 193 nm optical inspection tools may be typically equipped with bright field imaging optics for reflection or transmission mode measurements. Such broadband brightfield imaging minimizes contrast variations and coherent noise and is not sensitive to small features and particles. These measurements work well for large features within the 10-micron range, but for process technology for smaller nodes, the next generation alignment marks may result in lower image contrast when using brightfield illumination.
There is a growing use of EUV-based phase shift masks and it would be beneficial to minimize the number of steps used in mask processing to reduce the impact on EUV photomasks. In particular, EUV phase photomasks may benefit from the use of phase contrast based alignment marks for pattern registration and overlay in view of the extreme sensitivity of EUV light to phase changes down to a single atomic layer of a phase absorber.
It is understood that inspection and metrology are the key parts of the semiconductor manufacturing process flow, because, if there is a defect of a problem on the mask, it will get printed on the final wafer. As a consequence, however, the increasing number of metrology steps may result in a negative impact on the overall wafer/lot cycle time in the fab. Accordingly, the manufacturing processes for semiconductor devices may benefit from improved techniques and systems for off-line mask-to-mask registration metrology and inspections; in particular, for EUV blank masks.
The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details, and aspects in which the present disclosure may be practiced. These aspects are described in sufficient detail to enable those skilled in the art to practice the present disclosure. Various aspects are provided for devices, and various aspects are provided for methods. It will be understood that the basic properties of the devices also hold for the methods and vice versa. Other aspects may be utilized and structural, and logical changes may be made without departing from the scope of the present disclosure. The various aspects are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects.
Presently, conventional inspection tools may not be capable of identifying low-contrast EUV fiducial marks to correctly perform image processing to detect edges of features used for alignment and overlay in mask manufacturing. Low contrast phase defects or alignment marks are difficult to capture on brightfield imaging inspection tools and using 13.5 nm actinic inspection for alignment marks has concerns relating to degradation and mask lifetime. According to the present disclosure, the presently used brightfield imaging inspection tools with 193 nm lasers may be provided with darkfield illumination optics and/or phase contrast optics to expand the capability of these tools.
The present disclosure is directed to an inspection method that provides a semiconductor specimen with a stage for inspection and a light source to produce illumination that passes through a first optical train configured with phase contrast optical components to focus phase contrast illumination toward one or more features of the semiconductor specimen, and sensing the phase contrast illumination from the one or more features of the semiconductor specimen using a first charge-coupled device (CCD) sensor, and provides illumination through a second optical train configured with darkfield optical components to focus darkfield illumination toward the one or more features of the semiconductor specimen, and sensing the darkfield illumination from the one or more features of the semiconductor specimen using a second CCD sensor, provides position measurements using a laser interferometer, and generates analyzed data for the one or more features of the semiconductor specimen from data captured by the first and second CCD sensors and laser interferometer using a computing device.
In addition, the method may further include providing illumination through a third optical train configured with brightfield optical components to focus brightfield illumination toward the one or more features of the semiconductor specimen and sensing the field illumination from the one or more features of the semiconductor specimen using a third CCD sensor, and for which the analyzed data for the one or more features of the semiconductor specimen includes data captured by the third CCD sensor.
The present disclosure is also directed to an inspection system that includes an optical inspection tool having a stage, a light source, a first optical train configured with phase contrast optical components, a second optical train configured with darkfield optical components, and at least one CCD sensor configured to sense illumination directed from a semiconductor specimen, a laser interferometer, and a computing device. In addition, the inspection system may further include a third optical train configured with brightfield optical components.
The present disclosure is directed to an optical inspection tool including a stage, a deep ultraviolet laser emitting 193-nanometer wavelength illumination, and a multi-mode optical system including a first optical train configured with phase contrast optical components, a second optical train configured with darkfield optical components, and a third optical train configured with brightfield optical components, and at least one CCD sensor configured to sense illumination directed from a semiconductor specimen.
In addition, the present multi-mode optical system may further include a brightfield optical inspection tool that is retrofitted with phase contrast optical components, darkfield optical components, and phase contrast and darkfield CCD sensors.
It is understood that darkfield imaging collects scattered light from a defect, while brightfield imaging collects reflected light. Small, transparent defects may scatter efficiently in darkfield illumination but may be very difficult, if not impossible, to detect in brightfield. Darkfield imaging is generally useful in detecting defects having a specific height, depending upon the interaction between illumination with the geometry and effects due to transparent layers on the specimen.
By incorporating darkfield optics and phase contrast optics (such as Schwarzschild's Optics and Zernike Phase Contrast optics), according to the present disclosure, it is possible to detect smaller phase defects within a multi-layer stack of a blank EUV mask and lower (poor) contrast EUV alignment marks using a 193 nm excitation source.
To more readily understand and put into practical effect, the present registration metrology tool using brightfield, darkfield and phase contrast imaging, and methods which may be used for inspecting semiconductor specimens, such as blank EUV masks and semiconductor wafer, particular aspects will now be described by way of examples provided in the drawings that are not intended as limitations. The advantages and features of the aspects herein disclosed will be apparent through reference to the following descriptions relating to the accompanying drawings. Furthermore, it is to be understood that the features of the various aspects described herein are not mutually exclusive and can exist in various combinations and permutations. For the sake of brevity, duplicate descriptions of features and properties may be omitted.
In, according to an aspect of the present disclosure, an inspection systemis shown. The present inspection systemmay include an optical microscope tool (not shown) used to inspect a mask or wafer, which may have a registration feature(or a defect). In an aspect, the mask or wafer, as a device under test or DUT, may be positioned on a stage or platformfor illumination by inspection system optical components(i.e., darkfield, phase contrast and brightfield optical components, and a single or multiple light sources). In an aspect, the light source (not shown) may be a laser with a 193 nm wavelength. The present inspection systemmay be one or more image sensors, which are shown as charge-coupled device (CCD) detector/camera(used in reflected light mode) and CCD detector/camera(used in transmitted light mode).
In another aspect shown in, a laser interferometer systemmay be provided for the present inspection systemto generate positional/location data. An exemplary laser interferometer is described inbelow.
In yet another aspect, the various subsystem of the present inspection systemmay be coupled to a processor or computing device, which may include a control unita measurement data analyzer, and a data storage/capture unit, and generate analyzed data (e.g., registration data) as an output signal. It is within the scope of the present disclosure to provide the processoras an integrated unit, or as a standalone computing device or workstation. In addition, the data storage unitmay provide idealized images for standard blank EUV masks and/or semiconductor wafers that may be used for comparison with the measured data.
In addition, it is within the scope of the present disclosure to have incorporated other functional units as part of the present inspection system; for example, a design data generation unit, a data converting unit, an inspection data capture unit, an inspection data correcting unit, an image converting unit, a position accuracy measuring unit, a measurement results obtaining/capturing unit, a defect storing unit, an image obtaining unit, an auto-focus unit, etc.
In an aspect, according to the present disclosure, the inspection systemmay use software with pre-programmed patterns for the scanning of surfaces of a mask or wafer, which may be stored in the data storage unitor remotely in a server (not shown). The use of pre-programmed patterns may permit the scans to be performed in an automated process and provide for generating selective scans of greater or lesser details as needed. In an aspect, a control software may be used to control the operations and movements of the inspection system (e.g., movement of the stagein the x-direction, y-direction, and z-direction, focusing of the microscope, etc). In another aspect, the present inspection systemmay employ image analysis software for analyzing the captured data and generating data output and maps.
In yet another aspect, the present inspection systemmay include a user interface (not shown) to provide inputs to the inspection system to initiate automated scans, for modifying the automated scans, for manually scanning of a mask or wafer, etc.
It is within the scope of the present inspection systemofto perform full processing of a blank EUV mask or wafer using various sequences for combining darkfield imaging and phase contrast imaging and/or combining darkfield imaging, phase contrast imaging, and brightfield imaging, i.e., either simultaneously or sequentially. In an aspect, an inspection may be performed by first obtaining registration information using the brightfield imaging and using the data from the darkfield and/or phase contrast imaging to correlate/correct any registration errors to improve the accuracy of the analyzed data and the generated output map. In situations when a brightfield image is not viable, then the darkfield image and/or phase image may be relied solely to locate the center of the registration alignment marks.
shows a schematic diagram of an exemplary optical trainthat may be used with the present inspection system according to an aspect of the present disclosure. As shown, a semiconductor specimen or DUTmay have a registration mark or defectwith illumination impinging on and/or passing through a condenser lens, a light annular detector, an objective lens, and a scanning phase ring, and there may be an imageor light sourcedepending on the operational direction. In an aspect, the present optical trainmay provide, when operational viewed from left to right (i.e., in direction a), a “full-field” Zernike phase contrast imaging may be obtained. In another aspect, the present optical trainmay provide, when operational viewed from right to left (i.e., in direction b), a “scanning” Zernike phase contrast imaging. The present inspection system may use optical trainfor microscopes that are configured according to the present disclosure since they are mathematically equivalent and produce the same images if the optics angles β and α shown inare the same.
shows a schematic diagram of another exemplary optical trainthat may be used with the present inspection system according to another aspect of the present disclosure. In an aspect, a light sourcemay provide illumination that passes through an annular apertureand a condenser lensto impinge on and/or pass through specimenwith a registration mark or defect. Thereafter, as shown in, from the illumination, undiffracted light “a” (solid) and diffracted light b (dashed) may be produced that are directed to and collected by an objective lens. In an aspect, there will be interference between the undiffracted and diffracted light and their phase shifted by a phase ring, which translates into phase variations, i.e., intensity modulations in the image plane.
It will be understood that the most important concept underlying the design of a phase contrast microscope for the present inspection system is the segregation of surround and diffracted wavefronts emerging from a specimen, which are projected onto different locations in an objective positioned near a rear focal plane. In addition, the amplitude of the surround (undiffracted) light must be reduced by a phase ring or plate, and the phase advanced or retarded (by a quarter wavelength by the specimen) in order to maximize differences in intensity between the specimen and background in the image plane.
shows a schematic diagram of a further exemplary optical trainthat may be used with the present inspection system according to further aspects of the present disclosure. In, the optical trainmay be provided for phase contrast imaging of a semiconductor specimenand may include illumination from a light source (non-polarized)that follows a path through a polarizer, a quarter waveplate, an objective prism, a condenser, passing through the semiconductor specimenand continuing through to an objective, a nosepiece prismand an analyzer. In this aspect, the path of the illumination may be “dual channel” as it passes through the semiconductor specimen, which may preferably have equal intensity as they impinge on the specimen surface. The objective prismmay divide the illumination into first and second channels.
shows a schematic diagram of yet another exemplary optical trainthat may be used with the present inspection system according to another aspect of the present disclosure. In this aspect, the optical trainmay employ Schwarzschild optics for darkfield imaging of a semiconductor specimenhaving a registration mark or defect. Schwarzschild objectives are increasingly used in the EUV spectral region as imaging optics because of their large aperture, high mechanical stability, and freedom from chromatic aberrations.
As shown in, a light sourcemay provide illumination directed to a collector, with a central apertureblocking a central portion of the illumination (aka the zeroth order mode of the light). The unblocked portion (aka first order and higher order mode of light) of the illumination may be further directed to a condenser, which, in turn, directs it to the semiconductor specimen. The undiffracted illumination may be blocked by an objective aperture, while the diffracted lamination may be refocused by an objectiveand directed to a darkfield image plane.
In, an exemplary laser interferometer systemaccording to an aspect of the present disclosure is shown. The laser interferometer systemmay provide highly accurate measurements of the movements of a stage, which supports a semiconductor specimen, that may be directed by a precision motion control device (not shown). In an aspect, the laser interferometer measurements may be positioned near a stage's work point to act as a feedback mechanism for the precision motion control device. In an aspect, the data from a laser interferometer system may be combined with optical data from brightfield, darkfield, and phase contrast images to provide information relating to registration errors and/or defects.
show diagrams of exemplary optics subcomponents for phase contrast illumination according to an aspect of the present disclosure. In, exemplary objectives apertures are shown. In, exemplary condenser annuluses are shown. In, exemplary negative and positive phase plates are shown. These optical subcomponents may be used to provide the phase shifting needed for phase contrast illumination.
In a further aspect, to potentially perform a retrofit of a typical inspection/registration metrology tool, it may be possible to convert a brightfield microscope for phase contrast observation by, among other things, providing a specially designed annular diaphragm, which is matched in diameter and optically conjugate to an internal phase plate residing in the objective rear focal plane that is placed in the condenser front focal plane. For darkfield imaging, a brightfield beamsplitter may need to be removed and preferably replaced with a blank, or glass, when performing darkfield illumination, which allows more light to pass to a sensor and permits greater levels of detection in darkfield imaging. An alternative method for producing the same result is to perform brightfield imaging in a selected wavelength of light (e.g., 13.5 nm EUV light source, 193 nm ArF Excimer laser or 266 nm, etc) or perform darkfield imaging in a different frequency light spectrum (e.g., 355 nm 532 nm, 1064 nm which are harmonics of a Nd:YAG laser).
shows a simplified flow diagram for an exemplary method according to an aspect of the present inspection system.
The operationmay be directed to providing a semiconductor specimen on a stage.
The operationmay be directed to providing phase contrast illumination toward one or more features of a semiconductor specimen.
The operationmay be directed to providing darkfield illumination toward the one or more features of the semiconductor specimen.
The operationmay be directed to providing brightfield illumination toward the one or more features of the semiconductor specimen.
The operationmay be directed to analyzing data relating to the one or more features of the semiconductor specimen.
The operationmay be directed to producing a combined phase contrast, darkfield, and brightfield representation of the data for the one or more features of the semiconductor specimen as a defect map or alignment mark map.
It will be understood that any property described herein for a specific tool may also hold for any tool or system described herein. It will also be understood that any property described herein for a specific method may hold for any of the methods described herein. Furthermore, it will be understood that for any tool, system, or method described herein, not necessarily all the components or operations described will be enclosed in the tool, system, or method, but only some (but not all) components or operations may be enclosed.
To more readily understand and put into practical effect the present metrology system and methods for their use in gap measurements, they will now be described by way of examples. For the sake of brevity, duplicate descriptions of features and properties may be omitted.
Example 1 provides an inspection method that includes providing a semiconductor specimen on a stage for inspection, providing a light source to produce illumination, providing illumination through a first optical train configured with phase contrast optical components to focus phase contrast illumination toward one or more features of the semiconductor specimen, and sensing the phase contrast illumination from the one or more features of the semiconductor specimen using a first charge-coupled device (CCD) sensor, providing illumination through a second optical train configured with darkfield optical components to focus darkfield illumination toward the one or more features of the semiconductor specimen, and sensing the darkfield illumination from the one or more features of the semiconductor specimen using a second CCD sensor, providing position measurements using an laser interferometer, and generating analyzed data for the one or more features of the semiconductor specimen from data captured by the first and second CCD sensors and laser interferometer using a computing device.
Example 2 may include the method of example 1 and/or any other example disclosed herein, further includes providing illumination through a third optical train configured with brightfield optical components to focus brightfield illumination toward the one or more features of the semiconductor specimen, and sensing the field illumination from the one or more features of the semiconductor specimen using a third CCD sensor, and for which the analyzed data for the one or more features of the semiconductor specimen includes data captured by the third CCD sensor.
Example 3 may include the method of example 2 and/or any other example disclosed herein, for which the semiconductor specimen further includes a blank extreme ultraviolet (EUV) mask and for which the one or more features further includes alignment marks or surface defects on the blank EUV mask.
Example 4 may include the method of example 3 and/or any other example disclosed herein, for which the data analyzing for the alignment marks or surface defects on the blank EUV mask provides for comparisons of stored data for an ideal image for a standardized blank EUV mask.
Example 5 may include the method of example 4 and/or any other example disclosed herein, further includes for which the data analyzing includes producing a combined multi-mode phase contrast, darkfield, and brightfield representation of the blank EUV mask as a defect map or alignment mark map.
Example 6 may include the method of example 2 and/or any other example disclosed herein, for which the semiconductor specimen further includes a blank semiconductor wafer and for which the one or more features further includes surface defects on the blank semiconductor wafer.
Example 7 may include the method of example 6 and/or any other example disclosed herein, for which the data analyzing for surface defects on the blank semiconductor wafer provides for comparisons with stored data for an ideal image for a standardized blank semiconductor wafer.
Example 8 may include the method of example 7 and/or any other example disclosed herein, for which the data analyzing further includes producing a combined multi-mode phase contrast, darkfield, brightfield representation of the blank semiconductor mask as a defect map.
Example 9 may include the method of example 1 and/or any other example disclosed herein, for which the providing the semiconductor specimen further includes providing an assembled semiconductor device as the semiconductor specimen for inspection, for which the inspection is performed upon the completion of designated assembly process steps for the assembled semiconductor.
Example 10 may include the method of example 1 and/or any other example disclosed herein, further includes providing a pre-programmed pattern for automated scanning of surfaces of the semiconductor specimen.
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March 3, 2026
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