Package structure and method for manufacturing the same

This application is a continuation of U.S. patent application Ser. No. 17/003,883, filed Aug. 26, 2020, now U.S. Pat. No. 11,894,317, the content of which is incorporated herein by reference in its entirety.

The present disclosure relates to a package structure and a manufacturing method, and to a package structure including a stiff bonding material, and a method for manufacturing the same.

Along with the rapid development in electronics industry and the progress of semiconductor processing technologies, semiconductor package structures are integrated with an increasing number of electronic components or electronic devices to achieve improved electrical performance and additional functions. Accordingly, a warpage of the semiconductor package structure may occur during the thermal process. Since a rigidity or stiffness of the semiconductor package structure is relatively low, a crack may be formed at the top surface of the semiconductor package structure or in the protection material, and then extend or grow into the interior of the semiconductor package structure. If the crack reaches the semiconductor package substrate, the circuit layer in the semiconductor package substrate may be damaged or broken, which may result in an open circuit and render the semiconductor package structure inoperative. Thus, a yield of the semiconductor package structure may decrease.

In some embodiments, a package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.

In some embodiments, a manufacturing method includes: (a) providing a wiring structure; (b) bonding a first electronic device and a second electronic device on the wiring structure side by side; (c) applying a stiff bonding material in a first space between the first electronic device and the wiring structure, and/or in a second space between the second electronic device and the wiring structure; and (d) applying a first underfill in the first space and a second underfill in the second space to push the stiff bonding material into a central gap between the first electronic device and the second electronic device.

In some embodiments, a manufacturing method includes: (a) providing a wiring structure; (b) disposing a first electronic device and a second electronic device on the wiring structure side by side; (c) forming a first underfill in a first space between the first electronic device and the wiring structure and a second underfill in a second space between the second electronic device and the wiring structure; and (d) applying a stiff bonding material in a central gap between the first electronic device and the second electronic device.

Common reference numerals are used throughout the drawings and the detailed description to indicate the same or similar components. Embodiments of the present disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed or disposed in direct contact, and may also include embodiments in which additional features may be formed or disposed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.

At least some embodiments of the present disclosure provide for a package structure which has an improved crack resistance so as to improve a reliability or a yield thereof. At least some embodiments of the present disclosure further provide for techniques for manufacturing the package structure and an assembly structure.

illustrates a top view of a package structureaccording to some embodiments of the present disclosure.illustrates a cross-sectional view taken along line-of the package structureof.illustrates a cross-sectional view taken along line-of the package structureof. The package structure (or a semiconductor package structure)includes a wiring structure, a plurality of protrusion pads, a first electronic device, two second electronic devices,′, a first underfill, a second underfill, a stiff bonding material, an encapsulantand a plurality of solder materials. As shown in, the package structuremay include one first electronic deviceand two second electronic devices,′. However, the amounts of the first electronic device(s)and the second electronic device(s),′ are not limited in the present disclosure.

As shown inand, the wiring structurehas a first surface(e.g., a top surface), a second surface(e.g., a bottom surface) opposite to the first surface, a lateral side surfaceextending between the first surfaceand the second surface, and a high line density region(or a fine line region) between the first electronic deviceand the second electronic devices,′. The wiring structuremay include at least one dielectric layer, at least one circuit layerin contact with the dielectric layer, and a plurality of protrusion pads. For example, as shown inand, the wiring structureincludes a first dielectric layer, a first circuit layer, a second dielectric layer, a second circuit layer, a third dielectric layer, a third circuit layer, a fourth dielectric layer, a fourth circuit layer, and a fifth dielectric layer. That is, the at least one dielectric layerincludes the first dielectric layer, the second dielectric layer, the third dielectric layer, the fourth dielectric layerand the fifth dielectric layer. The at least one circuit layerincludes the first circuit layer, the second circuit layer, the third circuit layerand the fourth circuit layer. Each of the circuit layersmay be a fan-out circuit layer or a redistribution layer (RDL).

The first dielectric layermay be a topmost dielectric layer or an outermost dielectric layer of the wiring structure. The first circuit layermay be a topmost circuit layer or an outermost circuit layer of the wiring structure. A material of the first circuit layermay include, for example, copper, another conductive metal, or an alloy thereof. A material of the first dielectric layermay include an insulating material, a passivation material, a dielectric material or a solder resist material, such as, for example, a benzocyclobutene (BCB) based polymer or a polyimide (PI). In some embodiments, the first dielectric layermay be made of a photoimageable material. In addition, the first surfaceof the wiring structuremay be a top surface of the first dielectric layer. The first circuit layeris disposed adjacent to the top surface of the first dielectric layer. In some embodiments, the first circuit layeris embedded in the first dielectric layer, and is exposed from the top surface of the first dielectric layer. That is, the first dielectric layercovers the first circuit layer, and defines a plurality of openings to expose portions of the first circuit layer.

Further, the first circuit layermay include an interconnection portionand a periphery portion. The interconnection portionis located in the high line density region, and the periphery portionis located outside the high line density region(e.g., a low line density region). For example, the second electronic devices,′ may be electrically connected to the first electronic devicethrough the interconnection portionof the first circuit layer. The second electronic devices,′ and the first electronic devicemay be electrically connected to the solder materialson the second surfaceof the wiring structurethrough the periphery portionof the first circuit layer. A line width/line space (L/S) of the traces of the interconnection portionmay be less than an L/S of the traces of the periphery portion. For example, an L/S of the traces of the interconnection portionmay be less than or equal to about 5 μm/about 5 μm, or less than or equal to about 2 μm/about 2 μm, or less than or equal to about 0.8 μm/about 0.8 μm. An L/S of the traces of the periphery portionmay be less than or equal to about 10 μm/about 10 μm, or less than or equal to about 7 μm/about 7 μm, or less than or equal to about 5 μm/about 5 μm.

The first dielectric layerand the first circuit layermay be disposed on the second dielectric layer. In addition, the second dielectric layermay cover the second circuit layer. A portion (i.e., a via portion) of the first circuit layerextends through the second dielectric layerto electrically connect the second circuit layer. A material of the second dielectric layermay be the same as or similar to the material of the first dielectric layer. The second circuit layermay also include an interconnection portion located in the high line density region, and a periphery portion located outside the high line density region. In some embodiments, the via portion of the first circuit layermay extend from the periphery portion, and they may be formed concurrently and integrally.

Similarly, the second dielectric layerand the second circuit layermay be disposed on the third dielectric layer. In addition, the third dielectric layermay cover the third circuit layer. A portion (i.e., a via portion) of the second circuit layerextends through the third dielectric layerto electrically connect the third circuit layer. A material of the third dielectric layermay be the same as or similar to the material of the second dielectric layer. The third circuit layermay also include an interconnection portion located in the high line density region, and a periphery portion located outside the high line density region. In some embodiments, the via portion of the second circuit layermay extend from the periphery portion, and they may be formed concurrently and integrally.

Similarly, the third dielectric layerand the third circuit layermay be disposed on the fourth dielectric layer. In addition, the fourth dielectric layermay cover the fourth circuit layer. A portion (i.e., a via portion) of the third circuit layerextends through the fourth dielectric layerto electrically connect the fourth circuit layer. A material of the fourth dielectric layermay be the same as or similar to the material of the third dielectric layer. The fourth circuit layermay also include an interconnection portion located in the high line density region, and a periphery portion located outside the high line density region.

The fourth dielectric layerand the fourth circuit layermay be disposed on the fifth dielectric layer. A portion (i.e., a via portion) of the fourth circuit layerextends through the fifth dielectric layerto be exposed from a bottom surface of the fifth dielectric layer(e.g., the second surfaceof the wiring structure). A material of the fifth dielectric layermay be the same as or similar to the material of the fourth dielectric layer. As shown inand, the second electronic devices,′ may be electrically connected to the first electronic devicethrough the interconnection portionof the circuit layer(including, for example, the interconnection portionsof the first circuit layer, the second circuit layer, the third circuit layerand the fourth circuit layer). The second electronic devices,′ and the first electronic devicemay be electrically connected to the solder materialsthrough the via portions of the periphery portionof the circuit layer(including, for example, the periphery portionsof the first circuit layer, the second circuit layer, the third circuit layerand the fourth circuit layer).

The protrusion padsmay be disposed on and protrude from the first dielectric layer(i.e., the topmost dielectric layer or the outermost dielectric layer) of the wiring structure. The protrusion padsmay be disposed on and protrude from the first surfaceof the wiring structure, and extend through the first dielectric layer(i.e., the topmost dielectric layer or the outermost dielectric layer) to electrically connect the first circuit layer.

The first electronic deviceand the second electronic devices,′ are disposed adjacent to or disposed on the first surfaceof the wiring structureside by side, and are electrically connected to the circuit layerof the wiring structure. The first electronic devicemay be a semiconductor device such as an application specific integrated circuit (ASIC) die. As shown into, the first electronic devicehas a first active surface(e.g., bottom surface), a first backside surface(e.g., top surface), a first lateral side surface, a second lateral side surface, a third lateral side surfaceand a fourth lateral side surface. The first backside surfaceis opposite to the first active surface. All of the first lateral side surface, the second lateral side surface, the third lateral side surfaceand the fourth lateral side surfaceextend between the first active surfaceand the first backside surface. The first lateral side surfacefaces to the second electronic devices,′. The second lateral side surfaceis opposite to the first lateral side surface. The fourth lateral side surfaceis opposite to the third lateral side surface

Further, the first electronic devicemay include a plurality of electrical contacts. The electrical contactsmay be disposed adjacent to the first active surface. Alternatively, the electrical contactsmay be exposed or may protrude from the first active surfacefor electrical connection. The electrical contactsmay be pads, bumps, studs, pillars or posts. In some embodiments, the electrical contactsof the first electronic devicemay be electrically connected and physically connected to the protrusion padsthrough a plurality of solder materials. In other words, the first electronic devicemay be electrically connected to the wiring structureby flip-chip bonding.

The second electronic devicemay be a semiconductor device such as high bandwidth memory (HBM) die. The second electronic devicehas a second active surface(e.g., bottom surface), a second backside surface(e.g., top surface), a first lateral side surface, a second lateral side surface, a third lateral side surfaceand a fourth lateral side surface. The first lateral side surfacefaces to the first electronic device. The second backside surfaceis opposite to the second active surface. All of the first lateral side surface, the second lateral side surface, the third lateral side surfaceand the fourth lateral side surfaceextend between the second active surfaceand the second backside surface. The second lateral side surfaceis opposite to the first lateral side surface. The fourth lateral side surfaceis opposite to the third lateral side surface

Further, the second electronic devicemay include a plurality of electrical contactsdisposed adjacent to the second active surface. The electrical contactsmay be exposed or may protrude from the second active surfacefor electrical connection. The electrical contactsmay be pads, bumps, studs, pillars or posts. In some embodiments, the electrical contactsof the second electronic devicemay be electrically connected and bonded to the protrusion padsthrough a plurality of solder materials. In other words, the second electronic devicemay be bonded to the wiring structureby flip-chip bonding. As shown inand, the second electronic devicemay include a logic die, a plurality of memory dice, a top dieand a package body(e.g., a molding compound). The top dieand the memory dicemay be stacked on a top surface of the logic die. The package bodymay cover the top die, the memory diceand a portion of the top surface of the logic die.

As shown inand, a central gapis formed between the first lateral side surfaceof the first electronic deviceand the first lateral side surfaceof the second electronic device. A width G of the central gapmay be defined as a minimum distance between the first lateral side surfaceof the first electronic deviceand the first lateral side surfaceof the second electronic device. The width G of the central gapmay be less than or equal to about 100 μm, less than or equal to about 70 μm, or less than or equal to about 50 μm.

As shown inand, the first underfillmay be disposed in a first spacebetween the first electronic deviceand the wiring structureso as to cover and protect the joints formed by the electrical contacts, the protrusion padsand the solder materials. Further, the second underfillmay be disposed in a second spacebetween the second electronic deviceand the wiring structureso as to cover and protect the joints formed by the electrical contacts, the protrusion padsand the solder materials. In addition, the stiff bonding materialmay be disposed in the central gapbetween the first electronic deviceand the second electronic device. The stiff bonding materialmay be a homogeneous material (e.g., resin) without fillers. It is noted that the stiff bonding materialis different from the first underfilland the second underfill. In some embodiments, a Young's Modulus of the stiff bonding materialis greater than a Young's modulus of the first underfilland a Young's modulus of the second underfill. A coefficient of thermal expansion (CTE) of the stiff bonding materialis greater than a CTE of the first underfilland a CTE of the second underfill.

Further, the Young's Modulus of the stiff bonding materialmay be greater than or equal to a Young's modulus of the first electronic deviceand a Young's modulus of the second electronic device. The CTE of the stiff bonding materialmay be greater than or equal to a CTE of the first electronic deviceand a CTE of the second electronic device. In addition, the Young's Modulus of the stiff bonding materialmay be greater than or equal to a Young's modulus of the wiring structure. The CTE of the stiff bonding materialmay be greater than or equal to a CTE of the wiring structure. In some embodiments, a Young's Modulus of the stiff bonding materialmay be about 3 GPa to about 20 Gpa, and a CTE of the stiff bonding materialmay be about 30 ppm/° ° C. to about 60 ppm/° C. In some embodiments, a Young's Modulus of the stiff bonding materialmay be about 6 GPa to about 35 Gpa, and a CTE of the stiff bonding materialmay be about 5 ppm/C to about 35 ppm/C.

The stiff bonding materialmay have a top surfaceand a bottom surface. The top surfacemay be substantially coplanar with the first backside surfaceof the first electronic deviceand the second backside surfaceof the second electronic device. The bottom surfacemay be a curved surface that extends between a bottom edge of the first electronic deviceand a bottom edge of the second electronic devicesince the first underfilland the second underfillare formed integrally and concurrently by dispensing. Thus, the bottom portion of the stiff bonding materialextends beyond the first active surfaceof the first electronic deviceand/or the second active surfaceof the second electronic device. In addition, an extending portionof the first underfillmay extend to or may be disposed on the second lateral side surfaceof the first electronic device, and an extending portionof the second underfillmay extend to or may be disposed on the second lateral side surfaceof the second electronic device.

The encapsulantmay cover at least a portion of the first electronic device, at least a portion of the second electronic device, the first underfill, the second underfill, the stiff bonding materialand a portion of the first surfaceof the wiring structure. A material of the encapsulantmay be a molding compound with or without fillers. The encapsulantmay have a first surface(e.g., a top surface) and a lateral side surface. As shown inand, the first surfaceof the encapsulant, the first backside surfaceof the first electronic device, the second backside surfaceof the second electronic deviceand the top surfaceof the stiff bonding materialmay be substantially coplanar with each other. In addition, the lateral side surfaceof the encapsulantmay be substantially coplanar with the lateral side surfaceof the wiring structure. In some embodiments, the Young's modulus of the stiff bonding materialmay be greater than a Young's modulus of the encapsulant. The coefficient of thermal expansion (CTE) of the stiff bonding materialmay be greater than a CTE of the encapsulant.

The solder materials(e.g., solder balls) may be disposed adjacent to the second surfaceof the wiring structurefor external connection. As shown inand, the solder materialsare disposed on the exposed portions (i.e., the bottom portions of the via portions) of the fourth circuit layer.

In the embodiment illustrated into, the first underfillmay completely fill the first space, the second underfillmay completely fill the second space, and the stiff bonding materialmay completely fill the central gap. The stiff bonding materialis used to bond the first electronic deviceand the second electronic devicestiffly and tightly so as to form a rigid assembly structure. That is, a bonding force between the stiff bonding materialand the first electronic deviceis greater than a bonding force between the first underfilland the first electronic device, and a bonding force between the stiff bonding materialand the second electronic deviceis greater than a bonding force between the second underfilland the second electronic device. As a result, the warpage of the rigid assembly structure and the package structuremay be reduced, and the delamination of the first underfilland the second underfillmay be avoided. Further, since the stiff bonding materialhas a relatively high CTE, the deformation or bending of the rigid assembly structure and the package structureduring temperature cycling may be reduced. Thus, the interconnection portionof the circuit layermay be protected from being damaged or broken. That is, the risk of formation of crack in the interconnection portionof the circuit layeris low. Therefore, the reliability and yield of the package structureis improved.

illustrates a cross-sectional view of an assembly structureaccording to some embodiments of the present disclosure. The assembly structuremay be a semiconductor package structure, and may include a base substrate, a package structure, a heat sinkand a plurality of external connectors. The base substratemay include a glass reinforced epoxy material (such as FR4), bismaleimide triazine (BT), epoxy resin, silicon, printed circuit board (PCB) material, glass, ceramic or photoimageable dielectric (PID) material. The base substratemay have a first surfaceand a second surfaceopposite to the first surface. As shown in, the base substratemay include a first circuit layer, a second circuit layer, and a plurality of conductive vias. The first circuit layermay be disposed adjacent to the first surfaceof the base substrate, and the second circuit layermay be disposed adjacent to the second surfaceof the base substrate. The conductive viasmay extend through the base substrateand electrically connect the first circuit layerand the second circuit layer.

The package structureofmay be same as or similar to the package structureofto. The package structuremay be electrically connected to the first circuit layerof the base substratethrough the solder materials. A protection material(i.e., an underfill) may be further included in a space between the package structureand the base substrateso as to cover and protect the solder materialsand the first circuit layer. Further, the heat sinkmay be a cap structure or a hat structure, and may define a cavityfor accommodating the package structure. A material of the heat sinkmay include metal such as copper, aluminum, and/or other suitable material. A portion of the heat sinkmay be attached to the top surface of the package structurethrough a thermal material(e.g., thermal interface material (TIM)) so as to dissipate the heat generated by the first electronic deviceand the second electronic devices,′. Another portion (e.g., bottom portion) of the heat sinkmay be attached to the first surfaceof the base substratethrough an adhesive material. In addition, the external connectors(e.g., solder balls) are formed or disposed on the second circuit layerfor external connection. In some embodiments, the Young's Modulus of the stiff bonding materialmay be greater than a Young's modulus of the heat sink. The CTE of the stiff bonding materialmay be greater than a CTE of the heat sink.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for a structure of the stiff bonding materialof the package structure. As shown in, the bottom surfaceof the stiff bonding materialmay be substantially coplanar with the first active surfaceof the first electronic deviceand/or the second active surfaceof the second electronic device. Thus, the bottom portion of the stiff bonding materialdoes not extend beyond the first active surfaceof the first electronic deviceand/or the second active surfaceof the second electronic device.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for structures of the stiff bonding material, the first underfilland the second underfillof the package structure. As shown in, the first underfillmay not completely fill the first space, and a first portionof the stiff bonding materialmay be further disposed in a first gap between the first underfilland the first electronic device. Further, the second underfillmay not completely fill the second space, and a second portionof the stiff bonding materialmay be further disposed in a second gap between the second underfilland the second electronic device. In some embodiments, a first extending portionof the stiff bonding materialmay extend to or may be disposed on the second lateral side surfaceof the first electronic device, and a second extending portionof the stiff bonding materialmay extend to or may be disposed on the second lateral side surfaceof the second electronic device.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for structures of the stiff bonding material, the first underfilland the second underfillof the package structure. As shown in, the first underfillis formed from a first film type material, and the second underfillis formed from a second film type material. Further, the first underfilland the second underfillmay be separated from each other. That is, the first underfilland the second underfillmay be not formed integrally. In addition, the stiff bonding materialmay be further disposed in a gap between the first underfilland the second underfill. In some embodiments, the stiff bonding materialmay contact the first underfill, the second underfilland the first surfaceof the wiring structure.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for structures of the stiff bonding material, the first underfilland the second underfillof the package structure. As shown in, the first underfillis formed from a first film type material, and the second underfillis formed from a second film type material. However, the first underfilland the second underfillmay be combined or merged together during a thermal process. That is, the first underfilland the second underfillmay be formed integrally. As shown in, the bottom surfaceof the stiff bonding materialmay be substantially coplanar with the first active surfaceof the first electronic deviceand/or the second active surfaceof the second electronic device. Thus, the bottom portion of the stiff bonding materialdoes not extend beyond the first active surfaceof the first electronic deviceand/or the second active surfaceof the second electronic device.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for a structure of the stiff bonding material. As shown in, the bottom portion of the stiff bonding materialextends to cover a portion of the first active surfaceof the first electronic deviceand/or a portion of the second active surfaceof the second electronic device. Thus, the bottom surfaceof the stiff bonding materialextends between the first active surfaceof the first electronic deviceand the second active surfaceof the second electronic device.

illustrates a cross-sectional view of an example of an assembly structureaccording to some embodiments of the present disclosure. The assembly structureofis similar to the assembly structureof, except for structures of the stiff bonding material, the first underfilland the second underfillof the package structure. As shown in, the bottom portion of the stiff bonding materialextends to contact the first surfaceof the wiring structureso as to separate the first underfilland the second underfill

throughillustrate a method for manufacturing an assembly structure according to some embodiments of the present disclosure. In some embodiments, the method is for manufacturing the package structureshown into, and the assembly structureshown in.

Referring to, a carrieris provided. The carriermay include a release layerdisposed thereon.

Referring to, a wiring structure′ is formed or disposed on the release layeron the carrier. The wiring structure′ ofmay be similar to the wiring structureofand, and may have a first surface, a second surfaceopposite to the first surface, and a high density region(or a fine line region). The wiring structure′ may include at least one dielectric layer, at least one circuit layerin contact with the dielectric layerand a plurality of protrusion pads. For example, the wiring structure′ includes a first dielectric layer, a first circuit layer, a second dielectric layer, a second circuit layer, a third dielectric layer, a third circuit layer, a fourth dielectric layer, a fourth circuit layer, and a fifth dielectric layer.

Referring to, a first electronic deviceand a second electronic deviceare provided. The first electronic deviceand the second electronic deviceofmay be similar to the first electronic deviceand the second electronic deviceof, respectively. Then, the first electronic deviceand the second electronic deviceare electrically connected to the circuit layerof the wiring structure′ by flip-chip bonding. Thus, the first electronic deviceand the second electronic deviceare disposed and bonded on the wiring structure′ side by side, and the second electronic devicemay be electrically connected to the first electronic devicethrough the interconnection portionof the circuit layer. Meanwhile, a central gapis formed between the first electronic deviceand the second electronic device. The central gapmay be defined by the first lateral side surfaceof the first electronic deviceand the first lateral side surfaceof the second electronic device.

Referring to, a stiff bonding materialis applied or disposed in a first spacebetween the first electronic deviceand the wiring structure′, and/or in a second spacebetween the second electronic deviceand the wiring structure′. In some embodiments, a viscosity of the stiff bonding materialmay be about 10 Pa·s to about 90 Pa·s, and the stiff bonding materialmay be applied or disposed by dispensing technique according to the method shown in.

As shown in, from a top view, the stiff bonding materialis applied along a portion of a peripheral side edge of a combination of the first electronic deviceand the second electronic devices,′. For example, the stiff bonding materialmay be applied along the third lateral side surfaceof the first electronic devicefrom a point “A” to the third lateral side surfaceof the second electronic device, as shown in a first path Pof. Then, the stiff bonding materialmay be further applied along the second lateral side surfaceof the second electronic deviceand the second lateral side surface′ of the second electronic device′, as shown in a second path Pof. Then, the stiff bonding materialmay be further applied along the fourth lateral side surface′ of the second electronic device′ to a point “B” on the fourth lateral side surfaceof the first electronic device, as shown in a third path Pof. That is, the stiff bonding materialmay be applied from the point “A” to the point “B” along the peripheral side edge of a combination of the first electronic deviceand the second electronic devices,′. Then, after the dispensing process, a top view of the first electronic device, the second electronic devices,′ and the stiff bonding materialis shown as.

Referring to, a first underfilland a second underfillare applied or disposed in the first spaceand the second space, respectively, to push the stiff bonding materialinto the central gap. Meanwhile, the first underfillmay completely fill the first space, the second underfillmay completely fill the second space, and the stiff bonding materialmay completely fill the central gap. In addition, the first underfilland the second underfillmay be formed from an underfill material integrally and concurrently. The underfill material (including the first underfilland the second underfill) is different from the stiff bonding material. For example, a density of the stiff bonding materialis less than a density of the underfill material (including the first underfilland the second underfill), a viscosity of the stiff bonding materialis less than a viscosity of the underfill material (including the first underfilland the second underfill), and a wettability of the stiff bonding materialis greater than a wettability of the underfill material (including the first underfilland the second underfill). In some embodiments, the underfill material (including the first underfilland the second underfill) may be applied or disposed by dispensing technique according to the method shown in.

As shown in, from a top view, the underfill material (including the first underfilland the second underfill) is applied along the entire of the peripheral side edge of a combination of the first electronic deviceand the second electronic devices,′. For example, the underfill material (including the first underfilland the second underfill) may be applied along the third lateral side surfaceof the first electronic device, the third lateral side surfaceof the second electronic device, the second lateral side surfaceof the second electronic device, the second lateral side surface′ of the second electronic device′, the fourth lateral side surface′ of the second electronic device′, the fourth lateral side surfaceof the first electronic deviceand the second lateral side surfaceof the first electronic device, as shown in a fourth path Pof. That is, the underfill material (including the first underfilland the second underfill) may be applied according to the fourth path Pthat is a substantially complete loop along the peripheral side edge of a combination of the first electronic deviceand the second electronic devices,′. Then, after the dispensing process, a top view of the first electronic device, the second electronic devices,′, the stiff bonding materialand the underfill material (including the first underfilland the second underfill) is shown as.

Referring to, the underfill material (including the first underfilland the second underfill) and the stiff bonding materialmay be cured. Then, an encapsulant(e.g., a molding compound) may be formed or disposed to cover at least a portion of the first surfaceof the wiring structure′, at least a portion of the first electronic device, at least a portion of the second electronic device, the underfill material (including the first underfilland the second underfill) and the stiff bonding material. The encapsulanthas a first surface(e.g., a top surface).

Referring to, the carrierand the release layerare removed. Thus, portions (i.e., the bottom portions of the via portions) of the fourth circuit layerare exposed from the second surfaceof the wiring structure′.

Referring to, a plurality of solder materials(e.g., solder balls) are formed or disposed on the second surfaceof the wiring structure′. For example, the solder materialsmay be disposed on the exposed portions (i.e., the bottom portions of the via portions) of the fourth circuit layer. Then, the encapsulantis thinned from its first surfaceby, for example, grinding. Thus, the first surfaceof the encapsulant, the second surfaceof the first electronic device, the second surfaceof the second electronic deviceand the top surfaceof the stiff bonding materialmay be substantially coplanar with each other. Then, a singulation process may be conducted to the wiring structure′ so as to obtain a plurality of package structuresshown into.

Referring to, the package structuremay be electrically connected to a first surfaceof a base substratethrough the solder materials. Then, a protection material(i.e., an underfill) is formed or disposed in a space between the package structureand the base substrateso as to cover and protect the solder materials. Then, a heat sinkmay be attached to package structureand the base substrate. In some embodiments, the heat sinkmay be a cap or hat structure, and may define a cavityfor accommodating the package structure. A portion of the heat sinkmay be attached to the top surface of the package structurethrough a thermal material(e.g., thermal interface material (TIM)). Another portion (e.g., bottom portion) of the heat sinkmay be attached to the base substratethrough an adhesive material. Then, a singulation process may be conducted to the base substrateso as to obtain a plurality of assembly structuresshown in.

throughillustrate a method for manufacturing an assembly structure according to some embodiments of the present disclosure. In some embodiments, the method is for manufacturing the package structureshown into, and the assembly structureshown in. The initial stages of the illustrated process are the same as, or similar to, the stages illustrated into.depicts a stage subsequent to that depicted in.