Power converter

The present application is based on PCT filing PCT/JP2021/041176, filed on Nov. 9, 2021, the entire contents of which are incorporated herein by reference.

The present disclosure relates to a power converter.

A power converter is used that can bidirectionally provide and receive power to and from a power system, a load, or the like using a storage battery for an electric vehicle or the like. It is desirable that such a power converter be capable of charging and discharging the storage battery at high power conversion efficiency from low output to high output within a wide input voltage range for accommodating various rechargeable batteries while achieving isolation between the storage battery and any other equipment.

As a technique for charging and discharging a storage battery at high power conversion efficiency from low output to high output within a wide input voltage range by a bidirectional isolated converter, which is one type of power converter, a circuit configuration including a multi-phase boost circuit and a dual active bridge (DAB) circuit that are integrated with each other is disclosed in “Design Considerations for PPS Controlled Current-Fed DAB Converter to Achieve Full Load Range ZVS with Low Inductor RMS Current” (NPL 1).

NPL 1: Jing Guo et al., “Design Considerations for PPS Controlled Current-Fed DAB Converter to Achieve Full Load Range ZVS with Low Inductor RMS Current”, 2020 IEEE Energy Conversion Congress and Exposition pp. 5971-5975, Oct. 30, 2020

In the current fed (CF)-DAB circuit including the multiphase boost circuit and the DAB circuit integrated with each other, described in NPL 1, a primary-side bridge of the DAB circuit and a bridge of the multiphase boost circuit are integrated with each other. It is thus feared that, at low output, ripples of a reactor current in a boost circuit portion will travel back and forth between positive and negative electrodes, increasing a conduction loss. On the other hand, the boost circuit operates in a discontinuous current mode so as not to allow ripples of the reactor current to travel back and force between the positive and negative electrodes at low output, reducing a power conduction loss.

In the CF-DAB circuit of NPL 1, however, when switching of a high-voltage-side power device of the boost circuit portion is stopped during the discharging operation of a primary-side storage battery in order to achieve the current discontinuity mode, switching of the high-voltage-side power device of the primary-side bridge of the DAB circuit portion also stops. As a result, the power transmission operation during discharging of the storage battery cannot be performed while such switching is stopped.

Similarly, in the CF-DAB circuit of NPL 1, when switching of the low-voltage-side power device of the boost circuit portion is stopped during the charging operation of the primary-side storage battery in order to achieve the current discontinuity mode, switching of the low-voltage-side power device of the primary-side bridge of the DAB circuit portion also stops. As a result, the power transmission operation during charging of the storage battery cannot be performed while such switching is stopped.

However, the problem of failed power transmission operation due to the introduction of the current discontinuity mode, as described above, is not taken into account in NPL 1.

The present disclosure has been made to solve the above problem. An object of the present disclosure is to improve, in a power converter configured to share a primary-side bridge of a DAB circuit and a boost circuit, power conversion performance by controlling a reactor current for boosting voltage in a discontinuous current mode and achieving a period in which power is transmitted by the DAB circuit.

According to one aspect of the present disclosure, a power converter is provided. The power converter that performs DC (direct-current) voltage conversion includes a first bridge including a plurality of first legs, a second bridge including a plurality of second legs, a transformer connected between the first bridge and the second bridge, a plurality of reactors, and a control circuit to control ON and OFF of a plurality of switching elements of each of first legs and the second legs. Each of the first legs includes a switching element on a high voltage side and a switching element on a low voltage side connected in series between a first power line on the high voltage side and a second power line on the low voltage side with an intermediate node in between. Each of the second legs includes a switching element on the high voltage side and a switching element on the low voltage side connected in series between a third power line on the high voltage side and a fourth power line on the low voltage side with an intermediate node in between. The transformer includes a primary winding and a secondary winding. The primary winding is connected to a plurality of the intermediate nodes of the first legs. The secondary winding is connected to a plurality of the intermediate nodes of the second legs and is magnetically coupled to the primary winding. The reactors are respectively connected between a chargeable DC power supply and the intermediate nodes of the first legs. The control circuit controls, in the first bridge, according to a first control command value for controlling a first DC voltage between the first power line and the second power line, ON and OFF of respective switching cycles of the switching elements of the first legs so as to provide an ON period of one switching element of the switching element on the high voltage side and the switching element on the low voltage side of each of the first legs for increasing an absolute value of a reactor current flowing through each of the reactors, and provide an ON period of the other switching element of the switching element on the high voltage side and the switching element on the low voltage side until the absolute value of the reactor current returns to zero after end of the ON period of the one switching element. The control circuit controls, in the second bridge, ON and OFF of respective switching cycles of the switching elements of the second legs so as to reflect a second control command value for controlling a second DC voltage between the third power line and the fourth power line, and cause an ON period length of the switching element on the high voltage side of each of the second legs is substantially equal to an ON period length of the switching element on the high voltage side of each of the first legs, and an ON period length of the switching element on the low voltage side of each of the second legs is substantially equal to an ON period length of the switching element on the low voltage side of each of the first legs.

According to the present disclosure, in a power converter configured to share a primary-side bridge of a DAB circuit and a booster circuit, power conversion performance can be improved by controlling a reactor current for boosting voltage in a discontinuous current mode and achieving a period in which power is transmitted by the DAB circuit.

Embodiments of the present disclosure will be described below in detail with reference to the drawings. The same or corresponding components have the same reference characters allotted, and description thereof will not be repeated in principle.

(Circuit Configuration)

As shown in, a power converteraccording to the present embodiment is connected between a storage batteryand a loadand performs bidirectional DC voltage conversion while electrically isolating storage batteryand loadby a transformer.

Power converterincludes a capacitor Cdisposed on the primary side, a capacitor Cdisposed on the secondary side, reactors L, Lfor a boosting function, a reactor LT, a first bridge, a second bridge, a transformerincluding a primary windingand a secondary winding, a control operation unit, and a gate signal generation unit. A main circuit configuration of power converteris similar to that of the CF-DAB circuit of NPL 1.

First bridgeincludes a leg, which is composed of semiconductor switching elements (hereinbelow, merely referred to as “switching elements” as well) QH and QL, and a leg, which is composed of switching elements QH, QL. In the present embodiment, each switching element can include an insulated gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), and the like. Each switching element includes, as an external element or an internal element, an antiparallel diode (freewheeling diode) for forming a freewheel path.

Switching elements QH and QL constituting legare connected in series between a power line PLon the high voltage side and a power line NLon the low voltage side on the primary side with a node Nin between. Switching elements QH and QL constituting legare connected in series between power line PLand power line NLwith anode Nin between. Legsandcorrespond to one embodiment of “first legs”, and each of nodes N, Ncorresponds to an “intermediate node”. Power line PLcorresponds to one embodiment of a “first power line”, and power line NLcorresponds to one embodiment of a “second power line”.

In the configuration example of, capacitor Cis connected between power line PLand power line NL. In other words, the voltage of capacitor Cis equal to the DC voltage between power lines PLand NL. Storage batteryis connected between anode Ni and power line NL. Reactor Lis connected between node Ni (i.e., the positive electrode of storage battery) and node Nof leg. Reactor Lis connected between node Ni and node Nof leg. Reactor LT is connected in series to primary windingof transformerbetween nodes Nand N. Reactors Land Lcorrespond to one embodiment of “a plurality of reactors”.

Reactor LT may be configured with leakage inductances of magnetic coupling of primary windingand secondary winding. Reactors Land Lmaybe configured to share a magnetic component for reducing the number of components. For example, reactors L, Lcan be configured with a loosely-coupled inductor in which two coils are wound around a common magnetic core. Sharing of reactors Land Lbrings about an effect of increasing impedance values of reactors Land Las viewed from a voltage VTrp between nodes Nand N, which corresponds to an output end voltage of first bridge.

As indicated by the arrows in, for a reactor current ILflowing through reactor Land a reactor current ILflowing through reactor L, the direction of discharging of storage batteryis defined as a positive direction (positive current), and the direction of charging of storage batteryis defined as a negative direction (negative current).

Second bridgeincludes a leg, which is composed of switching elements QH, QL, and a leg, which is composed of switching elements QH, QL. Switching elements QH and QL constituting legare connected in series between a power line PLon the high voltage side and a power line NLon the low voltage side on the secondary side with a node Nin between. Switching elements QH and QL constituting legare connected in series between power line PLand power line NLwith a node Nin between. Legsandcorrespond to one embodiment of “second legs”, and each of nodes N, Ncorresponds to an “intermediate node”. Power line PLcorresponds to one embodiment of a “third power line”, and power line NLcorresponds to one embodiment of a “fourth power line”.

Hereinbelow, each of switching elements QL, QL, QL, QL is also referred to as a “switching element on the low voltage side”, and each of switching elements QH, QH, QH, QH is also referred to as a “switching element on the high voltage side”.

Loadis connected to power lines PLand NL. Capacitor Cis connected in parallel to loadbetween power lines PLand NL. Secondary windingof transformeris connected between nodes Nand N. A voltage VTrs between nodes Nand Ncorresponds to an output end voltage of second bridge.

Power converterperforms voltage control to maintain a DC voltage Vof capacitor Cand a DC voltage Vof capacitor Cat voltage command values VREFand VREF, accompanied by charging or discharging of storage battery. Voltage command value VREFis a command value for controlling a DC voltage between power lines PLand NL, and voltage command value VREFis a command value for controlling a DC voltage between power lines PLand NL. In Embodiment 1, DC voltage Vand DC voltage Vcorrespond to a “first DC voltage” and a “second DC voltage”, respectively.

Though charging/discharging power of storage batteryis not directly indicated, when DC voltage Vof loadis lower than voltage command value VREF, the voltage control is performed accompanied by a power transmission operation (hereinbelow, also referred to as a discharging operation) from storage batteryto load, resulting in generation of discharging power from the storage battery. Contrastingly, when DC voltage Vis higher than voltage command value VREF, the voltage control is performed accompanied by a power transmission operation (hereinbelow, also referred to as a charging operation) from loadto storage battery, resulting in generation of charging power of storage battery.

Control operation unitcalculates a first control command value REFand a second control command value REFfor controlling DC voltages Vand V, detected by voltage sensors (not shown) provided in correspondence with capacitors Cand C, to voltage command values VREFand VREF, respectively. Control operation unitfurther receives input of an output voltage (hereinbelow, referred to as battery voltage) VBAT of storage battery, which is detected by a voltage sensor (not shown) provided in storage battery.

Gate signal generation unitgenerates gate signals SH, SL, SH, SL of first bridgeand gate signals SH, SL, SH, SL of second bridgebased on first control command value REFand second control command value REFdetermined by control operation unit. Switching elements QH, QL, QH, QL of first bridgeare on/off-controlled (switching-controlled) according to gate signals SH, SL, SH, SL, respectively. Similarly, switching elements QH, QL, QH, QL are on/off-controlled (switching-controlled) according to gate signals SH, SL, SH, SL, respectively. Specifically, switching elements QL, QL, QL, QL, QH, QH, QH, QH are turned on during the H level periods of their corresponding gate signals according to gate signals SL, SL, SL, SL, SH, SH, SH, SH, respectively, while these switching elements are turned off during the L level periods. As will be described below, one embodiment of a “control circuit” is composed of control operation unitand gate signal generation unit.

(Control and Circuit Operation During Discharging Operation)

First, control and operation waveform examples during the discharging operation of power converterwill be described with reference to.

is a block diagram for illustrating a control operation during the discharging operation of the power converter according to Embodiment 1.

Referring to, control operation unitincludes deviation operation units,, controllers,, and a limiter. Deviation operation unitcalculates a voltage deviation ΔVof DC voltage V(detection value) from voltage command value VREF(ΔV=VREF−V). Similarly, deviation operation unitcalculates a voltage deviation ΔVof DC voltage V(detection value) from voltage command value VREF(ΔV=VREF−V).

Controllergenerates first control command value REFby a predetermined control operation performed on voltage deviation ΔV. For example, controllergenerates first control command value REFby proportional (P) control of multiplying voltage deviation ΔVby a control gain Ka. First control command value REFis controlled by limiterso as to have a minimum value of zero. In other words, VREF=0 is set when the output value of controlleris a negative value. Consequently, REF=0 is set when DC voltage Vis higher than voltage command value VREF.

Controllergenerates second control command value REFby a predetermined control operation performed on voltage deviation ΔV. For example, controllergenerates second control command value REFby proportional (P) control of multiplying voltage deviation ΔVby a control gain Kb. Controllers,can be configured to perform any control operation, such as proportional-integral (PI) control, not limited to proportional (P) control.

Gate signal generation unitincludes carrier wave generators CG, CG, CG, CG, comparators CMP, CMP, CMP, CMP, a duty ratio operation unit, and logic units LG, LG, LG, LG.

During the discharging operation, gate signal generation unitgenerates gate signals SL, SL, SL, SL on the low voltage side using first control command value REFfrom control operation unitas a duty ratio DL on the low voltage side. Duty ratio DL on the low voltage side is defined by a time ratio of the ON period to the switching cycle in switching elements QL, QL, QL, QL on the low voltage side.

Gate signals SL, SL, SL, SL on the low voltage side during the discharging operation are generated by carrier wave generators CG, CG, CG, CGand comparators CMP, CMP, CMP, CMP.

Carrier wave generators CG, CG, CG, CGgenerate carrier waves CW, CW, CW, CWhaving the same frequency, respectively. In general, a periodic voltage waveform such as a triangular wave or a sawtooth wave is used for carrier waves CW, CW, CW, CW. Between carrier waves CW, CW, CW, CW, a phase difference is set by separate setting of the initial phase. Specifically, carrier wave CWand carrier wave CWare opposite in phase (phase difference of 180 [deg]), and also, a phase difference of 180 [deg] is provided between carrier wave CWand carrier wave CW.

As a result, in first bridge, a phase difference of 180 [deg] is provided between the switching operation of legand the switching operation of leg. Also in second bridge, similarly, a phase difference of 180 [deg] is provided between the switching operation of legand the switching operation of leg. Consequently, first bridgeand second bridgecan operate as a DAB circuit.

Further, a phase difference φ [deg] is provided between carrier waves CWand CWcorresponding to first bridgeand between carrier waves CWand CWcorresponding to second bridge. Peak to peak of each of carrier waves CW, CW, CW, CWcorresponds to 0 to 1.0 of duty ratios DL, DH.

In gate signal generation unit, the phases of carrier waves CWand CWcorresponding to second bridgeare adjusted using second control command value REFfrom control operation unitas this phase difference φ [deg].

As is well known, in the DAB circuit, the direction of power transmission between first bridgeand second bridgeas the DAB circuit is controlled by the direction (lead/lag) of the phase difference of the switching operation between first bridgeand second bridge. Moreover, the transmitted power is controlled by the switching frequency and the amount of phase difference. Specifically, it is known that at the same switching frequency, the transmitted power (absolute value) increases as the amount of phase difference is larger, and that with the same phase difference, the transmitted power (absolute value) is larger as the switching frequency is lower (i.e., as the switching cycle is longer).

When DC voltage Vis lower than voltage command value VREF, as ΔV>0 and REF>0, phase difference φ>0, that is, the phase of the switching operation of second bridgelags behind the phase of the switching operation of first bridge. As a result, power is transmitted from first bridgeto second bridge, allowing DC voltage Vto rise toward voltage command value VREF. At this time, as the absolute value of ΔVis larger, the amount of phase lag due to phase differenceis also set larger, and power transmitted from first bridgeto second bridgealso increases.

Comparator CMPgenerates gate signal SL according to the voltage comparison between first control command value REF(duty ratio DL on the low voltage side) and carrier wave CW. Specifically, gate signal SL is set to the high level (“H level” below) during a period in which REF>CW, and gate signal SL is set to the low level (“L level” below) during a period in which REF≤CW. By similar voltage comparison, comparator CMPgenerates gate signal SL according to voltage comparison between duty ratio DL on the low voltage side and carrier wave CW. Comparator CMPalso generates gate signal SL according to voltage comparison between duty ratio DL on the low voltage side and carrier wave CW, and comparator CMPgenerates gate signal SL according to voltage comparison between duty ratio DL on the low voltage side and carrier wave CW.

Thus, each of gate signals SL, SL, SL, SL is generated to have an ON period length according to first control command value REFfor controlling DC voltage Vto voltage command value VREF. Further, between gate signals SL, SL of first bridgeand gate signals SL, Sof second bridge, a phase difference φ is set according to second control command value REFfor controlling DC voltage Vto voltage command value VREF.

In contrast, gate signals SH, SH, SH, SH on the high voltage side during the discharging operation are generated using, as duty ratio DH on the high voltage side, a third control command value REFcalculated by duty ratio operation unit. Duty ratio DH on the high voltage side is also defined by the time ratio of the ON period to the switching cycle in switching elements QH, QH, QH, QH on the high voltage side.

During the discharging operation, duty ratio operation unitcalculates duty ratio DH on the high voltage side using duty ratio DL on the low voltage side (first control command value REF), DC voltage V, and battery voltage VBAT such that reactor currents IL, ILenter the discontinuous current mode. Herein, description will be given with regard to the technique of calculating duty ratio DH on the high voltage side by a calculation of reactor current IL that encompasses reactor currents IL, IL, assuming that reactors L, Lhave the same inductance value L.

As described above, in first bridge, battery voltage VBAT is applied across reactors L, Lduring the ON periods of switching elements QL, QL on the low voltage side, according to duty ratio DL on the low voltage side. During the ON period of the switching element on the low voltage side, energy is stored in the reactor.

Thus, reactor current IL (IL>0) during this period of the discharging operation rises with a slope (VBAT/L). For this reason, reactor current IL reaches a maximum value (maximum current ILmax) in the switching cycle at the timing at which switching elements QL, QL on the low voltage side are turned off according to duty ratio DL. Assuming that IL=0 at the timing of start of turning on switching elements QL, QL, maximum current ILmax is represented by Expression (1) below using a switching cycle length Ts (a reciprocal of switching frequency fs corresponding to the frequency of the carrier wave, that is, Ts=1/fs).