Superconducting analog-to-digital converter (ADC) system

The invention was made under Government Contract. Therefore, the US Government has rights to the invention as specified in that contract.

The present invention relates generally to computer systems, and specifically to a superconducting analog-to-digital converter (ADC) system.

Superconducting digital technology has provided computing and/or communications resources that benefit from unprecedented high speed, low power dissipation, and low operating temperature. Superconducting digital technology has been developed as an alternative to CMOS technology, and typically comprises superconductor based single flux superconducting circuitry, utilizing superconducting Josephson junctions, and can exhibit typical signal power dissipation of less than 1 nW (nanowatt) per active device at a typical data rate of 20 Gb/s (gigabytes/second) or greater, and can operate at temperatures of around 4 Kelvin.

Analog-to-digital converters (ADCs) are crucial components for computing technologies to implement logic functions. For example, ADCs are essential for both semiconductor-based and superconducting-based technology applications (computation, radar, sensors, communications, etc.) to convert analog information to digital information for processing. In many applications, the properties of ADCs can limit the overall device performance. As an example, superconducting ADCs can be especially attractive since their sensitivity and responsiveness metrics can be limited solely by fundamental constants and the magnetic flux response of associated Josephson junctions.

One example includes a superconducting analog-to-digital converter (ADC) system. The system includes a control line configured to propagate an interrogation pulse and a superconducting quantum interference device (SQUID) comprising a first Josephson junction and a second Josephson junction. The SQUID can be configured to receive an input current. The first Josephson junction can be configured to trigger to provide a first pulse in response to the interrogation pulse and a first polarity of the input current and the second Josephson junction can be configured to trigger to generate a second pulse in response to the interrogation pulse and a second polarity of the input current. The system further includes an output stage configured to propagate the first pulse to an output to indicate the first polarity of the input current.

Another example includes a method for converting an input current to an output pulse. The method includes providing an interrogation pulse on a control line that is inductively coupled to a SQUID that receives the input current to trigger a first Josephson junction of the SQUID to provide a first pulse in response to a first polarity of the input current and to trigger a second Josephson junction of the SQUID to generate a second pulse in response to a second polarity of the input current. The method also includes providing a clock signal to an output stage to propagate the first pulse to an output to indicate the first polarity of the input current.

Another example includes a superconducting ADC system. The system includes a control line configured to propagate an interrogation pulse and a SQUID. The SQUID includes a first inductive coupling to the control line, a second inductive coupling to the control line, a first Josephson junction coupled to the first inductive coupling, and a second Josephson junction coupled to the second inductive coupling. The SQUID can be configured to receive an input current between the first and second inductive couplings such that the first Josephson junction is configured to trigger to provide a first pulse in response to the interrogation pulse and a first polarity of the input current and the second Josephson junction is configured to trigger to generate a second pulse in response to the interrogation pulse and a second polarity of the input current. The system further includes an output stage configured to propagate the first pulse to an output to indicate the first polarity of the input current.

The present invention relates generally to computer systems, and specifically to a superconducting analog-to-digital converter (ADC) system. As described herein, the superconducting ADC system can be configured to convert a polarity of a current to an output pulse (e.g., an RQL pulse) to operate as a single bit ADC. The superconducting ADC system includes a control line that is configured to propagate an interrogation pulse that is provided to read the polarity of the input current. The superconducting ADC system also includes a SQUID that is inductively coupled to the control line and which conducts the input current. The SQUID includes a pair of Josephson junctions that are biased by the input current (e.g., respective approximate equal portions of the input current).

The interrogation pulse induces a trigger current in the SQUID based on the inductive coupling of the SQUID to the control line. The trigger current combines with the input current to trigger one of the pair of Josephson junctions based on the polarity of the input current. For example, the SQUID can include a pair of inductive couplings to the control line, such that each of the inductive couplings can provide for the induced trigger current to be provided through each of the Josephson junctions in a first direction. The input current can be provided in the SQUID between the inductive couplings, such that the input current can be approximately equally provided through the Josephson junctions in either a first direction or a second direction opposite the first direction based on the polarity of the input current.

Therefore, in a first polarity of the input current, a first portion of the input current can be added to the trigger current through a first of the pair of Josephson junctions to trigger the first Josephson junction to generate a first pulse, and a second portion of the input current can be subtracted from the trigger current through a second of the pair of Josephson junctions to not trigger the second Josephson junction. Conversely, in a second polarity of the input current opposite the first polarity, the first portion of the input current can be subtracted from the trigger current through the first Josephson junction to not trigger the first Josephson junction, and the second portion of the input current can be added to the trigger current through the second Josephson junction to trigger the second Josephson junction to generate a second pulse. The first and second pulse can thus be indicative of the polarity of the input current.

The superconducting ADC system can also include a set of output stages to propagate the first and second pulses. The first pulse can be propagated on a first output stage to be provided to an output, such that the first pulse can be provided as an output pulse to indicate the first polarity of the input current. The second pulse can be propagated on a second output stage. As a first example, the second output stage can propagate the second pulse to a second output, such that the second pulse can indicate the second polarity of the input current. As a second example, the second output stage can be terminated, such that the absence of the first pulse on the first output stage can indicate the second polarity of the input current.

illustrates an example block diagram of a superconducting ADC system. The superconducting ADC systemcan be implemented in any of a variety of superconducting circuits to convert an analog signal to a digital signal. The superconducting ADC systemcan be configured to convert a polarity of an input current Ito an output pulse (e.g., an RQL pulse) OUTto operate as a single bit ADC. Thus, multiple superconducting ADC systemscan be implemented for multi-bit ADC functionality.

The superconducting ADC systemincludes a control linethat is configured to propagate an interrogation pulse INthat is provided to read the polarity of the input current I. The control linecan include and/or can be coupled to a Josephson transmission line (JTL) segment to propagate the interrogation pulse INvia a clock signal (not shown). The superconducting ADC systemalso includes a SQUIDthat is inductively coupled to the control lineand which conducts the input current I. As an example, the input current Ican be provided from a current source, such as a SQUID from another superconducting loop. The SQUIDincludes a first Josephson junctionand a second Josephson junctionthat are biased by the input current I. As described in greater detail herein, the input current Ican be split into approximate equal portions that are each provided through a respective one of the Josephson junctionsand.

For example, the SQUIDcan include a pair of inductive couplings to the control line, with each of the inductive couplings being coupled to a respective one of the Josephson junctionsand. Therefore, the interrogation pulse INcan induce a trigger current through each of the Josephson junctionsandin a specific direction (e.g., in a loop around the SQUID). The input current Ican be provided in the SQUIDbetween the inductive couplings, such that the portions of the input current Ican be approximately equally provided through the Josephson junctionsandin either a first direction or a second direction opposite the first direction based on the polarity of the input current I. In this manner, the trigger current combines with the input current Iin the SQUIDto trigger one of the Josephson junctionsandbased on the polarity of the input current I.

As an example, in a first polarity of the input current I, a first portion of the input current Ican be added to the trigger current through the first Josephson junctionto trigger the first Josephson junctionto generate a first pulse, and a second portion of the input current Ican be subtracted from the trigger current through the second Josephson junctionto not trigger the second Josephson junction. Conversely, in a second polarity of the input current Iopposite the first polarity, the first portion of the input current Ican be subtracted from the trigger current through the first Josephson junctionto not trigger the first Josephson junction, and the second portion of the input current Ican be added to the trigger current through the second Josephson junctionto trigger the second Josephson junctionto generate a second pulse. The first and second pulse can thus be indicative of the polarity of the input current I.

The superconducting ADC systemfurther includes a set of output stagesto propagate the first and second pulses (e.g., via respective JTL segments). The output stagescan include a first output stage to propagate the first pulse to an output to provide the output pulse OUT. The presence of the output pulse OUTcan thus indicate the first polarity of the input current I. The output stagescan also include a second output stage to propagate the second pulse. As a first example, the second output stage can propagate the second pulse to a second output to provide the second pulse as a second output pulse (not shown), the presence of which being indicative of the second polarity of the input current I. As a second example, the second output stage can be terminated, such that the absence of the output pulse OUTcan indicate the second polarity of the input current I. In either example, the output pulse OUTcan be indicative of the polarity of the input current I.

illustrates an example circuit diagram of a superconducting ADC system. The superconducting ADC systemcan correspond to an example of the superconducting ADC systemin the example of, and can thus likewise be configured to convert a polarity of an input current Ito an output pulse (e.g., an RQL pulse) OUTto operate as a single bit ADC.

The superconducting ADC systemincludes a control linethat is configured to propagate an interrogation pulse INthat is provided to read the polarity of the input current I. The control lineincludes a JTL segmentthat is biased by a clock signal (e.g., an RQL clock signal comprising an in-phase component and a quadrature-phase component), demonstrated as clock signal CLKto designate a specific phase of the clock signal CLK. Thus, the interrogation pulse INis propagated to the superconducting ADC systemat the specific phase of the clock signal CLK. The superconducting ADC systemalso includes a SQUIDthat is inductively coupled to the control linevia a first inductive couplingand a second inductive coupling. The SQUIDis configured to receive the input current I, such as from a SQUID from another superconducting loop. The SQUIDincludes a first Josephson junction JJand a second Josephson junction JJthat are biased by the input current I. In the example of, the input current Iis provided to the SQUIDbetween the inductive couplingsand, and is therefore split into approximate equal portions through a respective one of the Josephson junctions JJand JJ. As described in greater detail herein, the first Josephson junction JJand the second Josephson junction JJare intended to trigger at opposite polarities with respect to each other in the SQUID, as indicated by the polarity dot designators.

As described above in the example of, the interrogation pulse INcan induce a trigger current through each of the Josephson junctions JJand JJin a specific direction (e.g., in a loop around the SQUID), and the input current Ican be provided in approximately equal portions through the Josephson junctions JJand JJin either a first direction or a second direction opposite the first direction based on the polarity of the input current I. In this manner, the trigger current combines with the input current Iin the SQUIDto trigger one of the Josephson junctions JJand JJbased on the polarity of the input current I. As described in greater detail herein, the first Josephson junction JJcan trigger to provide a first pulse, or the second Josephson junction can trigger to provide a second pulse.

The superconducting ADC systemfurther includes a first output stageand a second output stage. The first output stageis coupled to the first Josephson junction JJand is configured to propagate the first pulse via the first phase of the clock signal CLK. The first output stageincludes a first inductor L, a Josephson junction J, a second inductor L, a JTL segment, and a third inductor Lthrough which the first pulse can propagate at the first phase of the clock signal CLK(e.g., by triggering the Josephson junction Jvia a combination of the first pulse and the bias provided by the first phase of the clock signal CLK). The second output stageis coupled to the second Josephson junction JJand is configured to propagate the second pulse via a second phase of the clock signal CLK. The second output stageincludes a first inductor L, a Josephson junction J, a second inductor L, a JTL segment, and a third inductor Lthrough which the second pulse can propagate at the second phase of the clock signal CLK(e.g., by triggering the Josephson junction Jvia a combination of the second pulse and the bias provided by the second phase of the clock signal CLK). As described in greater detail herein, the second pulse can be generated as a negative pulse, such that the second phase of the clock signal CLKcan be provided as a negative bias (e.g., approximately 180° out-of-phase of the first phase of the clock signal CLK) and DC bias of opposite polarity.

In the example of, the first output stageis configured to provide the first pulse as a first output pulse OUTat a first outputto indicate the first polarity of the input current Iand the second output stageis configured to provide the second pulse as a second output pulse OUTat a second outputto indicate the second polarity of the input current I. As described above, instead of the second pulse being provided as a second output pulse OUT, the second output stagecould instead be terminated, such that the absence of the output pulse OUTcan indicate the second polarity of the input current I.

illustrates a first example diagramof converting an input current to an output pulse by the superconducting ADC system. The diagramdemonstrates the superconducting ADC system. Therefore, reference is to be made to the example ofin the following description of the example of.

The diagramdemonstrates that the input current Ihas a first polarity, in which the input current Iis provided to the SQUID(e.g., from a SQUID), such that the input current Iflows from a terminalthrough the SQUIDto ground. The input current Iis split into a first portion Ithat is provided through the first Josephson junction JJand a second portion Ithat is provided through the second Josephson junction JJ. The first and second portions Iand Ican be approximately equal, and are demonstrated as propagating around the SQUIDin opposite orientations based on the input current Ibeing provided in a symmetrical manner through the SQUID. Particularly, in the example of, the first portion Iis provided in a counter-clockwise manner in the SQUIDand the second portion Iis provided in a clockwise manner in the SQUID.

On the first phase of the clock signal CLK, the interrogation pulse INis provided on the control line. Therefore, the trigger current is induced in the SQUIDvia the inductive couplingsand. In the example of, the trigger current is demonstrated as a first trigger current Ithat is induced by the inductive couplingand as a second trigger current Ithat is induced by the inductive coupling. The first trigger current Ithus flows through the first Josephson junction JJand the second trigger current Ithus flows through the second Josephson junction JJ. The first and second trigger currents Iand Iare demonstrated as being provided in the same counter-clockwise orientation in the SQUID.

Based on the arrangement of the input current Iand the inductive couplingsandwith respect to the SQUID, the portions Iand Iof the input current Iare positively and negatively added to each other through each of the Josephson junctions JJand JJto trigger one of the Josephson junctions JJand JJbased on the polarity of the input current I. In the example of, based on the first polarity of the input current I, the first portion of the input current Iis added to the first trigger current Ibased on the first portion of the input current Iand the first trigger current Ipropagating in the same direction (e.g., counter-clockwise) in the SQUID. Therefore, the addition of the first portion of the input current Iand the first trigger current Ithrough the first Josephson junctionis sufficient to trigger the first Josephson junction JJto generate a first pulse, demonstrated at. Conversely, the second portion of the input current Iis subtracted from the second trigger current Ibased on the second portion of the input current Iand the second trigger current Ipropagating in opposite directions in the SQUID. Therefore, the opposite polarity combination of the second portion of the input current Iand the second trigger current Ithrough the second Josephson junction JJis insufficient to trigger the second Josephson junction JJ.

The first pulsepropagates through the first output stageat the first phase of the clock signal CLKand is provided at the first outputas the first output pulse OUT. Therefore, the presence of the first output pulse OUTis indicative of the first polarity of the input current I.

illustrates a first example diagramof converting an input current to an output pulse by the superconducting ADC system. The diagramdemonstrates the superconducting ADC system. Therefore, reference is to be made to the example ofin the following description of the example of.

The diagramdemonstrates that the input current Ihas a second polarity, in which the input current Iis provided from the SQUID(e.g., from a SQUID), such that the input current Iflows from ground through the SQUIDto a terminal. Similar to as described above, in the example of, the input current Iis split into the first portion Ithat is provided through the first Josephson junction JJand the second portion Ithat is provided through the second Josephson junction JJ. The first and second portions Iand Ican be approximately equal, and are demonstrated as propagating around the SQUIDin opposite orientations based on the input current Ibeing provided in a symmetrical manner through the SQUID. Particularly, in the example of, the first portion Iis provided in a clockwise manner in the SQUIDand the second portion Iis provided in a counter-clockwise manner in the SQUID, and thus opposite the orientations in the example ofbased on the opposite polarity of the input current I.

On the first phase of the clock signal CLK, the interrogation pulse INis provided on the control line. Therefore, the first trigger current Iinduced by the inductive couplingis provided through the first Josephson junction JJand the second trigger current Iinduced by the inductive couplingis provided through the second Josephson junction JJ. The first and second trigger currents Iand Iare demonstrated as being provided in the same counter-clockwise orientation in the SQUID, similar to as demonstrated in the example of.

In the example of, based on the second polarity of the input current I, the first portion of the input current Iis subtracted from the first trigger current Ibased on the first portion of the input current Iand the first trigger current Ipropagating in the opposite directions in the SQUID. Therefore, the opposite polarity combination of the first portion of the input current Iand the first trigger current Ithrough the first Josephson junctionis insufficient to trigger the first Josephson junction JJ. Conversely, the second portion of the input current Iis added to the second trigger current Ibased on the second portion of the input current Iand the second trigger current Ipropagating in the same direction (e.g., counter-clockwise) in the SQUID. Therefore, the addition of the second portion of the input current Iand the second trigger current Ithrough the second Josephson junction JJis sufficient to trigger the second Josephson junction JJto generate a second pulse, demonstrated at. Because of the orientation of the second portion of the input current Iand the second trigger current Iand the polarity of the second Josephson junction JJ, the second Josephson junction JJtriggers to generate the second pulseas a negative pulse.

The second pulsepropagates through the second output stageat the second phase of the clock signal CLKand is provided at the second outputas the second output pulse OUT. Therefore, the presence of the second output pulse OUTis indicative of the second polarity of the input current I. Similar to as described above, one of the outputsandcan be terminated, such that the absence of the pulse at the other one of the outputsandcan be indicative of the opposite polarity of the input current I.

illustrates another example of a superconducting ADC system. The superconducting ADC systemcan correspond to another example of the superconducting ADC system. Therefore, reference is to be made to the example ofin the following description of the example of.

The superconducting ADC systemincludes a control linethat is configured to propagate an interrogation pulse INthat is provided to read the polarity of the input current I. The control lineincludes a JTL segmentthat is biased by a clock signal (e.g., an RQL clock signal comprising an in-phase component and a quadrature-phase component), demonstrated as clock signal CLKto designate a specific phase of the clock signal CLK. Thus, the interrogation pulse INis propagated to the superconducting ADC systemat the specific phase of the clock signal CLK. The superconducting ADC systemalso includes a SQUIDthat is inductively coupled to the control linevia a first inductive couplingand a second inductive coupling. The SQUIDis configured to receive the input current I, and includes a first Josephson junction JJand a second Josephson junction JJthat are biased by the input current I. The SQUIDis thus configured the same as the SQUIDin the example of.

The superconducting ADC systemalso includes a DC bias linethat, along with the control line, is inductively coupled to the SQUID. The DC bias lineis configured to propagate a DC bias current I, such that the current Iinduces a bias current in the SQUIDvia the inductive couplingsand. The induced bias current in the SQUIDcan thus have the same orientation in the SQUIDas the trigger currents that are induced by the interrogation pulse INvia the inductive couplingsand. The addition of the DC bias linecan provide for additional biasing of the Josephson junctions JJand JJ. As a result, the amplitude of the interrogation pulse IN, and thus the induced trigger currents, can be less in the superconducting ADC systemrelative to the superconducting ADC system. Accordingly, by providing the interrogation pulse INat a smaller amplitude, power savings and efficiency can be achieved in the superconducting ADC systemrelative to the superconducting ADC system.

The superconducting ADC systemotherwise operates the same as the superconducting ADC system. Accordingly, in response to the first polarity of the input current I, the first Josephson junction JJtriggers in response to the sum of the first portion of the input current I, the first trigger current, and the induced bias current to generate the first pulse, and the second Josephson junction JJdoes not trigger in response to the second portion of the input current Ibeing subtracted from the sum of the first trigger current and the induced bias current. Conversely, in response to the second polarity of the input current I, the first Josephson junction JJdoes not trigger in response to the second portion of the input current Ibeing subtracted from the sum of the first trigger current and the induced bias current, and the second Josephson junction JJtriggers in response to the sum of the second portion of the input current I, the first trigger current, and the induced bias current to generate the second pulse.

illustrates yet another example of a superconducting ADC system. The superconducting ADC systemcan correspond to another example of the superconducting ADC system. Therefore, reference is to be made to the example ofin the following description of the example of.

The superconducting ADC systemincludes a control linethat is configured to propagate an interrogation pulse INthat is provided to read the polarity of the input current I. The control lineincludes a JTL segmentthat is biased by a clock signal (e.g., an RQL clock signal comprising an in-phase component and a quadrature-phase component), demonstrated as clock signal CLKto designate a specific phase of the clock signal CLK. Thus, the interrogation pulse INis propagated to the superconducting ADC systemat the specific phase of the clock signal CLK. The superconducting ADC systemalso includes a SQUIDthat is inductively coupled to the control linevia a first inductive couplingand a second inductive coupling. The SQUIDis configured to receive the input current I, and includes a first Josephson junction JJand a second Josephson junction JJthat are biased by the input current I.

The SQUIDfurther includes a shunt inductor Lthat extends through the SQUIDto provide symmetry of the SQUIDon both sides of the shunt inductor L. In the example of, the shunt inductor Lis arranged between the inductive couplingsandand between the first and second Josephson junctions JJand JJ. The shunt inductor Lis configured to provide noise suppression with respect to the current line on which the input current Iis provided. As described above, the input current Ican be provided from a SQUID. The shunt inductor Lcan thus operate as a filter to suppress the potential effects of the first and second pulses on the current source (e.g., the SQUID), thereby providing greater impedance matching between the SQUIDand the current source.

The superconducting ADC systemalso includes a DC bias linethat, along with the control line, is inductively coupled to the SQUID. The DC bias lineis configured to propagate a DC bias current I, such that the current Iinduces a bias current in the SQUIDvia the inductive couplingsand. The induced bias current in the SQUIDcan thus have the same orientation in the SQUIDas the trigger currents that are induced by the interrogation pulse INvia the inductive couplingsand. The addition of the DC bias linecan provide for additional biasing of the Josephson junctions JJand JJ. As a result, the amplitude of the interrogation pulse IN, and thus the induced trigger currents, can be less in the superconducting ADC systemrelative to the superconducting ADC system. Accordingly, by providing the interrogation pulse INat a smaller amplitude, power savings and efficiency can be achieved in the superconducting ADC systemrelative to the superconducting ADC system.

The superconducting ADC systemotherwise operates the same as the superconducting ADC system. Accordingly, in response to the first polarity of the input current I, the first Josephson junction JJtriggers in response to the sum of the first portion of the input current I, the first trigger current, and the induced bias current to generate the first pulse, and the second Josephson junction JJdoes not trigger in response to the second portion of the input current Ibeing subtracted from the sum of the first trigger current and the induced bias current. Conversely, in response to the second polarity of the input current I, the first Josephson junction JJdoes not trigger in response to the second portion of the input current Ibeing subtracted from the sum of the first trigger current and the induced bias current, and the second Josephson junction JJtriggers in response to the sum of the second portion of the input current I, the first trigger current, and the induced bias current to generate the second pulse.

In view of the foregoing structural and functional features described above, a methodology in accordance with various aspects of the disclosure will be better appreciated with reference to. It is to be understood and appreciated that the method ofis not limited by the illustrated order, as some aspects could, in accordance with the present disclosure, occur in different orders and/or concurrently with other aspects from that shown and described herein. Moreover, not all illustrated features may be required to implement a methodology in accordance with an aspect of the present examples.

illustrates an example of a methodfor converting an input current (e.g., the input current I) to an output pulse (e.g., the output pulse OUT). At, an interrogation pulse (e.g., the interrogation pulse IN) is provided on a control line (e.g., the control line) that is inductively coupled to a SQUID (e.g., the SQUID) that receives the input current to trigger a first Josephson junction (e.g., the first Josephson junction) of the SQUID to provide a first pulse (e.g., the first pulse) in response to a first polarity of the input current and to trigger a second Josephson junction (e.g., the second Josephson junction) of the SQUID to generate a second pulse (e.g., the second pulse) in response to a second polarity of the input current. At, a clock signal (e.g., the first phase of the clock signal CLK) is provided to an output stage (e.g., the output stages) to propagate the first pulse to an output (e.g., the first output) to indicate the first polarity of the input current.

What have been described above are examples of the present invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the present invention, but one of ordinary skill in the art will recognize that many further combinations and permutations of the present invention are possible. Accordingly, the present invention is intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims. Additionally, where the disclosure or claims recite “a,” “an,” “a first,” or “another” element, or the equivalent thereof, it should be interpreted to include one or more than one such element, neither requiring nor excluding two or more such elements. As used herein, the term “includes” means includes but not limited to, and the term “including” means including but not limited to. The term “based on” means based at least in part on.