One example includes a method for fabricating a substrate-integrated waveguide (SIW). The method includes forming a first metal layer on a carrier surface. The first metal layer can extend along an axis. The method also includes forming a first metal sidewall extending from a first edge of the first metal layer along the axis and forming a second metal sidewall extending from a second edge of the first metal layer opposite the first edge along the axis to form a trough extending along the axis. The method also includes providing a dielectric material over the first metal layer and over the first and second metal sidewalls. The method further includes forming a second metal layer over the dielectric material and over the first and second metal sidewalls. The second metal layer can extend along the axis to enclose the SIW in all radial directions along the axis.
Legal claims defining the scope of protection, as filed with the USPTO.
. A method for fabricating a substrate-integrated waveguide (SIW), comprising:
. The method of, wherein the first metal sidewall and the second metal sidewall are each continuous structure between the first metal layer and the second metal layer at the respective first and second edges of the first metal layer.
. The method of, wherein forming the first metal layer, forming the first metal sidewall, forming the second metal sidewall, providing the dielectric material, and forming the second metal layer comprise forming the first metal layer, forming the first metal sidewall, forming the second metal sidewall, providing the dielectric material, and forming the second metal layer in a multi-level package substrate (MLPS) fabrication process.
. The method of, further comprising grinding the dielectric material and the first and second metal sidewalls down to a first height to tune a frequency band of operation of the SIW.
. The method of, wherein forming the first metal layer, forming the first metal sidewall, forming the second metal sidewall, and forming the second metal layer comprise forming the first metal layer, forming the first metal sidewall, forming the second metal sidewall, and forming the second metal layer at specific respective dimensions to tune a frequency band of operation of the SIW.
. The method of, wherein forming the first metal layer and the second metal layer comprises forming the first metal layer and the second metal layer at a first width to tune a frequency band of operation of the SIW, and wherein forming the first metal sidewall and the second metal sidewall comprises forming the first metal sidewall and the second metal sidewall at a first height to tune the frequency band of operation of the SIW.
. The method of, wherein the first metal layer, the first metal sidewall, the second metal sidewall, and the second metal layer comprise copper, and wherein the dielectric material comprises a thermoplastic material.
. The method of, wherein the SIW is formed in a substrate, the method further comprising coupling an integrated circuit (IC) die to the substrate.
. A method for fabricating an integrated circuit (IC) package, comprising:
. The method of, wherein the first metal sidewall and the second metal sidewall are each continuous structure between the first metal layer and the second metal layer at the respective first and second edges of the first metal layer.
. The method of, wherein forming the SIW further comprises grinding the dielectric material and the first and second metal sidewalls down to a first height to tune a frequency band of operation of the SIW.
. The method of, wherein forming the first metal layer and the second metal layer comprises forming the first metal layer and the second metal layer at a first width to tune a frequency band of operation of the SIW, and wherein forming the first metal sidewall and the second metal sidewall comprises forming the first metal sidewall and the second metal sidewall at a first height to tune the frequency band of operation of the SIW.
. The method of, wherein the first metal layer, the first metal sidewall, the second metal sidewall, and the second metal layer comprise copper, and wherein the dielectric material comprises a thermoplastic material.
. The method of, further comprising using a mold compound to cover the IC die and the SIW.
. The method of, wherein the IC package is arranged as a quad flat no lead (QFN) package.
Complete technical specification and implementation details from the patent document.
This description relates generally to communication systems, and more particularly to a substrate-integrated waveguide.
For high speed transmission and millimeter wave and antenna applications, transmission lines and waveguides are commonly used to transmit signals. A variety of different types of waveguides can be implemented to propagate wireless signals. One type of waveguide is a rectangular waveguide (e.g., having a rectangular cross-section), which is typically implemented for low signal loss properties. A type of rectangular waveguide is a substrate-integrated waveguide (SIW), which can be manufactured with a traditional laminated-based substrate. A typical SIW includes two parallel top and bottom planes connected by fencing vias. A wave can propagate along the typical SIW, but can suffer from the leakage through the spaces between the vias resulting in non-optimal insertion loss and crosstalk.
One example includes a method for fabricating a substrate-integrated waveguide (SIW). The method includes forming a first metal layer on a carrier surface. The first metal layer can extend along an axis. The method also includes forming a first metal sidewall extending from a first edge of the first metal layer along the axis and forming a second metal sidewall extending from a second edge of the first metal layer opposite the first edge along the axis to form a trough extending along the axis. The method also includes providing a dielectric material over the first metal layer and over the first and second metal sidewalls. The method further includes forming a second metal layer over the dielectric material and over the first and second metal sidewalls. The second metal layer can extend along the axis to enclose the SIW in all radial directions along the axis.
Another example described herein includes an SIW formed from a multi-level package substrate (MLPS) fabrication process. The SIW includes a first metal layer extending along an axis and a first metal sidewall extending contiguously from a first edge of the first metal layer along the axis. The SIW also includes a second metal sidewall extending contiguously from a second edge of the first metal layer opposite the first edge along the axis and a second metal layer arranged over the first and second metal sidewalls and extending along the axis to enclose the SIW in all radial directions along the axis. The SIW also includes a dielectric material filling an inner volume between the first and second metal layers and the first and second metal sidewalls and being coupled to at least the first and second metal sidewalls external to the inner volume.
Another example described herein includes an integrated circuit (IC) package. The IC package includes a substrate and an IC die bonded to the substrate. The IC package also includes an SIW formed from a MLPS fabrication process. The SIW includes a first metal layer extending along an axis and a first metal sidewall extending contiguously from a first edge of the first metal layer along the axis. The SIW also includes a second metal sidewall extending contiguously from a second edge of the first metal layer opposite the first edge along the axis and a second metal layer arranged over the first and second metal sidewalls and extending along the axis to enclose the SIW in all radial directions along the axis. The SIW also includes a dielectric material filling an inner volume between the first and second metal layers and the first and second metal sidewalls and being coupled to at least the first and second metal sidewalls external to the inner volume.
This description relates generally to communication systems, and more particularly to a substrate-integrated waveguide (SIW). The SIW can be implemented in any of a variety of applications in which a wireless signal propagates in a waveguide, such as between an integrated circuit (IC) package and an antenna. The SIW can be fabricated from a multi-level package substrate (MLPS) fabrication process, such as a routable lead-frame (RLF) fabrication process, as described in greater detail herein.
The SIW can include a first metal layer extending along an axis. The axis can correspond to a propagation direction of the wireless signal therein. The SIW can also include a first metal sidewall extending contiguously from a first edge of the first metal layer along the axis and a second metal sidewall extending contiguously from a second edge of the first metal layer opposite the first edge along the axis. The SIW also includes a second metal layer arranged over the first and second metal sidewalls and extending along the axis to enclose the SIW in all radial directions along the axis. The SIW also includes a dielectric material filling an inner volume between the first and second metal layers and the first and second metal sidewalls. The SIW further includes a substrate (e.g., formed of the dielectric material) coupled to at least the first and second metal sidewalls external to the inner volume.
Because the SIW is formed from MLPS fabrication processes, the metal sidewalls can be formed as contiguous metal sidewalls from the edges of the first and metal layers with no gaps along the axis. Therefore, as described herein, the metal layers and the metal sidewalls completely enclose an inner volume of the SIW in 360 degrees between first and second ends of the SIW along the axis. Typical SIWs are formed from fabrication techniques that are unable to form the sidewalls as contiguous and gapless, and thus include fencepost vias that extend along the sides of the respective waveguide. Such fencepost vias exhibit leakage of RF energy through the spaces between such vias. However, because the SIW described herein has no gaps in the metal sidewalls along the axis, insertion losses can be mitigated in the SIW, as described herein.
is an example perspective view of a substrate-integrated waveguide (SIW). The SIWcan be implemented in any of a variety of communications applications in which a wireless signal propagates in a waveguide, such as between an integrated circuit (IC) package and an antenna. The SIWincludes a first metal layer, a first metal sidewall, a second metal sidewall, and a second metal layer. As an example, the first and second metal layersandand the first and second metal sidewallsandcan be formed from any of a variety of conductive metals (e.g., copper). The first and second metal layersandand the first and second metal sidewallsandextend along an axisalong the Z-axis of the Cartesian coordinate systemthat corresponds to a propagation direction of a wireless signal or wave through the SIW.
In the example of, the first and second metal sidewallsandextend between respective edges of the first and second metal layersandto enclose an inner volume of the SIWin all radial directions between respective opposite ends along the axis Z. Therefore, there are no gaps in the first and second metal sidewallsandalong the axis Z between the respective opposing ends of the axis Z. The inner volume of the SIWis filled with a dielectric materialin the example of. As an example, the dielectric materialcan be any of a variety of thermoplastic materials. The dielectric materialcan also occupy regions around the SIWexterior to the inner volume of the SIWas part of a substrate, as described in greater detail herein.
In the example of, the first and second metal sidewallsandare demonstrated as contiguous and solid between the first and second metal layersand. As an example, and as described in greater detail herein, the SIWcan be formed from a multi-level package substrate (MLPS) fabrication process to facilitate formation of the contiguous metal sidewallsand. Therefore, because the first and second metal sidewallsandhave no gaps along the axis Z, as opposed to a typical SIW that includes fencepost vias extending along the sides of the respective waveguide, the SIWdoes not exhibit leakage through spaces in the first and second metal sidewallsand. In other words, the SIWdoes not exhibit leakage of RF energy outside of the first and second metal sidewallsand, as opposed to a typical SIW in which RF energy leaks out through the spaces between fencepost vias. As a result, insertion losses can be mitigated in the SIWdescribed herein.
The SIWcan be fabricated at specific dimensions to facilitate wave propagation of a specific frequency band of a wireless signal therein. For example, the first and second metal layersandand the first and second metal sidewallsandcan be formed to have specific respective thicknesses to tune a desired frequency band of operation of the SIW. As another example, the first and second metal layersandcan be formed to have a specific width along the X-axis of the Cartesian coordinate systemand the first and second metal sidewallsandcan be formed to have a specific height along the Y-axis of the Cartesian coordinate systemto tune the desired frequency band of operation of the SIW. Thus, by tuning the dimensions of the SIWduring the fabrication process, the cutoff frequency of the SIWcan be defined to provide for an operational frequency band of the SIW.
As an example, the SIWcan be fabricated to exhibit a cutoff frequency fcbased on the following equation:
As described herein, the SIWcan be formed in a substrate. As an example, the SIWcan be coupled to an IC (e.g., flip chip) die to form an IC package (e.g., quad-flat no lead (QFN)). For example, the SIWcan provide communicative coupling between a waveguide formed on a printed circuit board (PCB) and an antenna or signal source formed on the IC. As an example, the IC die can be soldered onto the substrate (e.g., via solder pads) or bonded in a variety of other ways to couple the IC die and the substrate that includes the SIW. Therefore, the SIWcan facilitate propagation of a wireless signal that is provided to or from the IC.
The examples ofdemonstrate an example of fabrication of the SIW. As described herein, the examples ofare described based on an MLPS fabrication process. However, other fabrication processes can be implemented for fabricating the SIW.
is an example of a first fabrication stepin forming the SIW. The first fabrication stepdemonstrates forming the first metal layeron a carrier surface. For example, the first metal layercan be any of a variety of conductive metals (e.g., copper) that is provided on the carrier surface via a metal plating process (e.g., as provided in a MLPS (e.g., RLF) fabrication process), such as beginning with a metal seed layer and forming additional metal plating thereupon. However, other types of fabrication processes (e.g., deposition, etched from a solid metal layer, printed, etc.) can instead be implemented. As an example, the carrier surfacecan correspond to a metal surface on which SIWis formed, after which the SIWis removed from the carrier surface, as described in greater detail herein. The first metal layercan be formed longitudinally to extend along the Z-axis. As an example, the first metal layercan have a thickness and a width along the X-axis that can define the operational frequency band of the SIW.
is an example of a second fabrication stepin forming the SIW. The second fabrication stepdemonstrates forming a first metal sidewall portionand a second metal sidewall portionon each of respective opposite edges of the first metal layer. The first and second metal sidewall portionsandcan be the same conductive metal as the first metal layer, and can thus be formed integral with the first metal layer. For example, the first and second metal sidewall portionsandcan be formed based on a same metal plating process (e.g., as provided in a MLPS fabrication process) as the first metal layer, but without an initial metal seed layer given that the first and second metal sidewall portionsandare formed on the first metal layer. As described herein, the first and second metal sidewall portionsandform the first and second metal sidewallsandin a later fabrication step. Therefore, the first and second metal sidewall portionsandextend along the Z-axis to form a trough with respect to the first metal layer. Similar to as described above, the first and second metal sidewall portionsandcan each have a thickness that can define the operational frequency band of the SIW.
is an example of a third fabrication stepin forming the SIW. The third fabrication stepdemonstrates depositing a dielectric materialover the carrier surface, and therefore over the first metal layerand the first and second metal sidewall portionsand. As an example, the dielectric materialcan be a thermoplastic material that is compression molded over the first metal layerand the first and second metal sidewall portionsand. As described in greater detail herein, the dielectric materialcan correspond to the dielectric materialthat is enclosed within the SIW.
is an example of a fourth fabrication stepin forming the SIW. The fourth fabrication stepdemonstrates grinding down the dielectric materialand the first and second metal sidewall portionsand. The grinding down of the dielectric materialand the first and second metal sidewall portionsandcan be provided via mechanical grinding (e.g., a sanding disc), as provided in a MLPS fabrication process. The grinding down of the dielectric materialand the first and second metal sidewall portionsandcan reduce a height of the first and second metal sidewall portionsandto set a height of the resultant first and second metal sidewallsand. For example, the height of the first and second metal sidewall portionsandcan be grinded down to set a height of the resultant first and second metal sidewallsandalong the Y-axis to tune the desired frequency band of operation of the SIW. Additionally, by grinding down the dielectric materialand the first and second metal sidewall portionsand, the top surfaces of the first and second metal sidewall portionsandcan be exposed and level with the top of the dielectric material.
is an example of a fifth fabrication stepin forming the SIW. The fifth fabrication stepdemonstrates forming the second metal layerover the exposed respective top surfaces of first and second metal sidewall portionsandand over the portion of the dielectric materialbetween the first and second metal sidewall portionsand. The second metal layercan be the same conductive metal as the first metal layerand the first and second metal sidewall portionsand, and can thus be formed integral with the first metal layerand the first and second metal sidewall portionsand. As an example, the second metal layercan be formed in the same manner as the first metal layerin the first fabrication step(e.g., metal plating as provided in a MLPS fabrication process). Therefore, the second metal layercan have a thickness and a width along the X-axis that can define the operational frequency band of the SIW.
is an example of a sixth fabrication stepin forming the SIW. The sixth fabrication stepdemonstrates depositing more of the dielectric materialover the existing dielectric materialand over the second metal layer. It is noted that the sixth fabrication step, as well as the following seventh fabrication step, are only necessary for leveling the external dielectric materialwith respect to a top surface of the second metal layer. Otherwise, one or both of the fabrication stepsandcan be omitted.
is an example of a seventh fabrication stepin forming the SIW. The seventh fabrication stepdemonstrates grinding down the dielectric materialto level the dielectric materialwith the top surface of the second metal layer, thereby exposing the top surface of the second metal layer. Therefore, the dielectric materialoutside of the inner volume enclosed by the first and second metal layersandand the first and second metal sidewallsandhas a same thickness along the Y-axis as the first and second metal sidewallsand.
is an example of an eighth fabrication stepin forming the SIW. The eighth fabrication stepdemonstrates removal of the finished SIWfrom the carrier surface. The separation of the finished SIWfrom the carrier surfacecan be accomplished by any of a variety of mechanical separation techniques, as are typical in substrate fabrication processes. Therefore, the eighth fabrication stepdemonstrates the SIWthat includes the first and second metal layersand, the first and second metal sidewallsand, the dielectric materialenclosed in the inner volume within the first and second metal layersandand the first and second metal sidewallsand, and the dielectric materialoutside of the inner volume that forms part of the substrate. Additional fabrication steps can be included to fabricate additional portions of an associated circuit on the substrate, such as integrated with the SIW.
is an example diagramof coupling an SIW to an IC die to form an IC package. The diagramincludes a first step, a second step, and a third step. The first stepdemonstrates a substrate, demonstrated in both a side view and a perspective view. The substrateincludes the SIW, such as fabricated in the examples of. The substrateis demonstrated as including a first layer, a second layer, a third layer, and a fourth layer. The first layercan be arranged as a dielectric layer, and can include solder pads (not shown), such as for soldering the IC package to a printed circuit board (PCB). The second layercan include the first metal layerand dielectric material, the third layercan include the first and second metal sidewallsandand dielectric material (therebetween and outside of the SIW), and the fourth layercan include the second metal layerand dielectric material. As an example, the substratecan include additional components (not shown), such as one or more transitions that are coupled to the SIWto propagate the wireless signal between a printed circuit board (PCB) and an antenna that can be formed on the resultant IC package.
The second stepof the diagramdemonstrates the bonding of an IC dieto the substrate. As an example, the IC diecan be soldered to the substrate, such as based on solder pads on a top surface of the substrate. For example, the IC diecan be flip-chip attachment to the substrate. As an example, the IC diecan include an antenna (e.g., as formed by an antenna-on-package (AoP) fabrication process). Thus, the antenna on the IC diecan be communicatively coupled with the SIWthrough the process of bonding the IC dieto the substrate.
The third stepof the diagramdemonstrates forming packaging materialover the IC dieand on the substrateto form an IC package. As an example, the packaging materialcan include an exterior plastic package and molding material formed within the exterior plastic package to surround the IC dieand cover at least a portion of the top surface of the substrate. As an example, the IC packagecan be formed as a quad flat no lead (QFN) package. Accordingly, the IC packagecan be incorporated in a communication system.
In view of the foregoing structural and functional features described above, a methodology in accordance with various aspects of the disclosure will be better appreciated with reference to. It is to be understood and appreciated that the method ofis not limited by the illustrated order, as some aspects could, in accordance with the present disclosure, occur in different orders and/or concurrently with other aspects from that shown and described herein. Moreover, not all illustrated features may be required to implement a methodology in accordance with an aspect of the present examples.
illustrates an example of a methodfor fabricating an SIW (e.g., the SIW). At, a first metal layer (e.g., the first metal layer) is formed on a carrier surface (e.g., the carrier surface). The first metal layer extends along an axis (e.g., the axis). At, a first metal sidewall (e.g., the first metal sidewall) is formed extending from a first edge of the first metal layer along the axis. At, a second metal sidewall (e.g., the second metal sidewall) is formed extending from a second edge of the first metal layer opposite the first edge along the axis to form a trough extending along the axis. At, a dielectric material (e.g., the dielectric material) is provided over the first metal layer and over the first and second metal sidewalls. At, a second metal layer (e.g., the second metal layer) is formed over the dielectric material and over the first and second metal sidewalls. The second metal layer extends along the axis to enclose the SIW in all radial directions along the axis.
In this description, the term “couple” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is directly coupled to device B; or (b) in a second example, device A is indirectly coupled to device B through intervening component C if intervening component C does not substantially alter the functional relationship between device A and device B, so device B is controlled by device A via the control signal generated by device A.
Also, in this description, a device that is “configured to” perform a task or function may be configured (e.g., programmed and/or hardwired) at a time of manufacturing by a manufacturer to perform the function and/or may be configurable (or reconfigurable) by a user after manufacturing to perform the function and/or other additional or alternative functions. The configuring may be through firmware and/or software programming of the device, through a construction and/or layout of hardware components and interconnections of the device, or a combination thereof. Furthermore, a circuit or device described herein as including certain components may instead be configured to couple to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor wafer and/or integrated circuit (IC) package) and may be configured to couple to at least some of the passive elements and/or the sources to form the described structure, either at a time of manufacture or after a time of manufacture, such as by an end user and/or a third party.
The techniques described in this disclosure may also be embodied or encoded in an article of manufacture including a non-transitory computer-readable storage medium. Example non-transitory computer-readable storage media may include random access memory (RAM), read-only memory (ROM), programmable ROM, erasable programmable ROM, electronically erasable programmable ROM, flash memory, a solid-state drive, a hard disk, magnetic media, optical media, or any other computer readable storage devices or tangible computer readable media. The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. In certain examples, a non-transitory storage medium may store data that can, over time, change (e.g., in RAM or cache).
Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.
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April 7, 2026
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