Test and/or measurement system

Embodiments of the present disclosure generally relate to a test and/or measurement system.

Certain types of tests performed on one or more electronic devices under test require a precise synchronization of two or more measurement circuits each comprising an analog-to-digital converter (ADC), such that a temporal relation between the samples obtained by the different ADCs is known.

Phase drifts of clock modules generating clock signals for different components of the measurement circuits based on a reference clock signal pose a major challenge for the synchronization of the measurement circuits, as these phase drifts may negatively impact the synchronization of the measurement circuits and thus the validity of measurement results obtained.

One possibility to address this type of phase drift is to perform a calibration of the test and/or measurement system with external equipment. However, performing a calibration with external equipment is accompanied by additional time and effort that a user of the test and/or measurement system has to expend.

Thus, there is a need for a test and/or measurement system that allows to efficiently compensate for phase drift effects.

The following summary of the present disclosure is intended to introduce different concepts in a simplified form that are described in further detail in the detailed description provided below. This summary is neither intended to denote essential features of the present disclosure nor shall this summary be used as an aid in determining the scope of the claimed subject matter.

Embodiments of the present disclosure provide a test and/or measurement system. In an embodiment, the test and/or measurement system comprises a first measurement circuit and a second measurement circuit. The first measurement circuit comprises a local oscillator (LO) circuit that is configured to generate an LO signal. The first measurement circuit further comprises a first signal distribution circuit, a first analog-to-digital converter (ADC), and a first LO port. The first signal distribution circuit is configured to receive the LO signal and to forward the LO signal to the first LO port. The second measurement circuit comprises a second signal distribution circuit, a second ADC, and a second LO port.

The test and/or measurement system further comprises a processing circuit that is connected to both the first ADC and the second ADC. The second LO port is connected to the first LO port so as to receive the LO signal from the first LO port. The second LO port is connected to the second signal distribution circuit such that the LO signal is forwarded from the second LO port to the second signal distribution circuit.

In an embodiment, the test and/or measurement system has an adjustment mode, wherein, in the adjustment mode, the first signal distribution circuit is configured to forward the LO signal to the first ADC and the second signal distribution circuit is configured to forward the LO signal to the second ADC. The first ADC is configured to digitize the LO signal, thereby obtaining a first digitized LO signal. The second ADC is configured to digitize the LO signal, thereby obtaining a second digitized LO signal. The processing circuit is configured to receive the first digitized LO signal and the second digitized LO signal.

The test and/or measurement system according to one or more aspects of the present disclosure is based on the idea to use the LO signal in order to correct for phase drift occurring in the test and/or measurement system, namely by routing the LO signal to the ADCs in the adjustment mode and forwarding the digitized LO signals to the processing circuit.

As will be described in more detail below, the processing circuit is configured to determine a phase drift between the digitized LO signals, such that phase drifts occurring in the test and/or measurement system can be compensated and the measurement circuits can be properly synchronized.

For example, the first ADC and the second ADC may digitize the LO signals based on a sampling clock that is derived from a reference clock signal, respectively. The sampling clocks of the ADCs may drift with respect to the reference clock signal, respectively.

By determining a phase drift between the digitized LO signals, such phase drifts can be compensated by taking the phase drifts into account for an error correction performed by the processing circuit.

In an embodiment, the first measurement circuit and the second measurement circuit may be efficiently synchronized based on the first digitized LO signal and based on the second digitized LO signal. Accordingly, instead of using external calibration equipment or providing additional internal calibration sources, the LO signal is distributed between the measurement circuits and used for error correction and/or synchronization. As the LO signal has to be generated for measurements anyway, there is no additional cabling effort and/or hardware effort necessary in order to correct for the phase drift and/or in order to synchronize the measurement circuits.

According to an aspect of the present disclosure, the processing circuit, for example, is configured to determine a phase drift between the first digitized LO signal and the second digitized LO signal based on the first digitized LO signal and the second digitized LO signal received in the adjustment mode. The phase drift may be a time delay between the first digitized LO signal and the second digitized LO signal.

In general, the phase drift between the digitized LO signals is a measure for phase drifts occurring in the test and/or measurement system, such as for phase drifts of sampling clocks of the ADCs that may be derived from a reference clock signal provided by the test and/or measurement system.

In an embodiment, the sampling clock used by the first ADC may be provided by a first reference clock signal generator, and the sampling clock used by the second ADC may be provided by a second reference clock signal generator, wherein the first reference clock signal generator and the second reference clock signal generator may be coupled, e.g. by a phase-locked loop. This coupling may also be subject to phase drift, which may be accounted for based on the determined phase drift between the digitized LO signals.

In an embodiment of the present disclosure, the processing circuit is configured to determine the phase drift by applying a correlation operation to the first digitized LO signal and the second digitized LO signal received in the adjustment mode. In general, by applying the correlation operation to the first digitized LO signal and the second digitized LO signal, a displacement between the digitized LO signals and thus a phase drift between the digitized LO signals can be determined.

For example, the correlation operation may comprise determining a cross-correlation between the digitized LO signals. As another example, the correlation operation may comprise a fit function that is applied to the digitized LO signals. In a further example, the correlation operation may comprise a multiplication of the first digitized LO signal and the second digitized LO signal, for example a convolution of the first digitized LO signal with the second digitized LO signal.

According to another aspect of the present disclosure, the test and/or measurement system, for example, is configured to adapt a frequency of the LO signal generated by the LO circuit and/or a phase of the LO signal generated by the LO circuit at least once during the adjustment mode, such that at least two different LO signals having different frequencies and/or phases are generated. As will be described in more detail below, the accuracy of the synchronization between the measurement circuits and/or of the error correction can be enhanced significantly by generating at least two different LO signals having different frequencies and/or different phases.

In an embodiment, the processing circuit may be configured to control the LO circuit to generate the at least two different LO signals having different frequencies and/or phases. However, it is also conceivable that the LO circuit may be configured to receive an external trigger signal, wherein the external trigger signal may cause the LO circuit to generate the different LO signals.

A further aspect of the present disclosure provides, for example, that the first ADC is configured to digitize the at least two different LO signals, thereby obtaining at least two different first digitized LO signals, wherein the second ADC is configured to digitize the at least two different second LO signals, thereby obtaining at least two different second digitized LO signals. The processing circuit may be configured to determine a phase drift between the first digitized LO signal and the second digitized LO signal based on the at least two different first digitized LO signals and based on the at least two different second digitized LO signals received in the adjustment mode. It has turned out that, by choosing appropriate frequencies and/or phases of the at least two different LO signals, the first measurement circuit and the second measurement circuit can be synchronized in a particularly precise manner.

For example, the processing circuit may receive the first digitized LO signal having a first frequency in a certain time period, and may receive the first digitized LO signal having a second frequency after that time period. The processing circuit may digitally extrapolate the first digitized LO signal having the first frequency to the region after the certain time period. The processing circuit may then determine a first reference time at which both first digitized LO signals have a zero-crossing simultaneously.

In an embodiment, the processing circuit may perform the same steps for the second digitized LO signal having the first frequency and the second digitized LO signal having the second frequency, and thus may determine a second reference time.

Determining the first reference time and the second reference time allows to precisely match corresponding samples of the first ADC and of the second ADC, as the sample of the first ADC at the first reference time has to correspond to the sample of the second ADC at the second reference time. Thus, the first ADC and the second ADC can be synchronized in a particularly precise manner by determining the reference times.

Further, a difference between the first reference time and the second reference time may be a measure for the phase drift between the digitized LO signals. Accordingly, phase drift errors may be corrected based on the determined reference times.

In an embodiment, the test and/or measurement system may further comprise a first signal adjustment circuit and/or a second signal adjustment circuit. The first signal adjustment circuit may be interconnected between the first signal distribution circuit and the first ADC. The first signal adjustment circuit may be configured to amplify, filter, and/or attenuate a signal received from the first signal distribution circuit. The second signal adjustment circuit may be interconnected between the second signal distribution circuit and the second ADC. The second signal adjustment circuit may be configured to amplify, filter, and/or attenuate a signal received from the second signal distribution circuit. In general, the signal received by the first signal adjustment circuit may be the LO signal or a measurement signal that is to be analyzed. Likewise, the signal received by the second signal adjustment circuit may be the LO signal or a measurement signal that is to be analyzed.

According to an aspect of the present disclosure, the first measurement circuit further comprises, for example, a first frequency converting circuit as well as a first RF port. Alternatively or additionally, the second measurement circuit further comprises a second frequency converting circuit as well as a second RF port. The first RF port may be configured to receive a first measurement signal, wherein the first frequency converting circuit is connected to the first RF port, wherein the first frequency converting circuit is configured to down-convert the first measurement signal to an intermediate frequency, and wherein the first signal distribution circuit is configured to selectively connect the first frequency converting circuit or the first RF port to the first ADC. The second RF port may be configured to receive a second measurement signal, wherein the second frequency converting circuit is connected to the second RF port, wherein the second frequency converting circuit is configured to down-convert the second measurement signal to an intermediate frequency, and wherein the second signal distribution circuit is configured to selectively connect the second frequency converting circuit or the second RF port to the second ADC.

In general, the first measurement signal may be a signal received from a device under test. If the first measurement signal is a radio frequency (RF) signal, the first measurement signal may be down-converted in frequency and then forwarded to the first ADC. If the first measurement signal is a baseband signal, the first frequency converting unit may be bypassed, and the first measurement signal may be forwarded to the first ADC bypassing the first frequency converting unit.

Likewise, the second measurement signal may be a signal received from a device under test. If the second measurement signal is a radio frequency (RF) signal, the second measurement signal may be down-converted in frequency and then forwarded to the second ADC. If the second measurement signal is a baseband signal, the second frequency converting unit may be bypassed, and the second measurement signal may be forwarded to the second ADC bypassing the second frequency converting unit.

In an embodiment, the first measurement signal and the second measurement signal may correspond to the same measurement signal. Alternatively, the first measurement signal and the second measurement signal may correspond to different measurement signals.

In an embodiment of the present disclosure, the test and/or measurement system has a first measurement mode, wherein, in the first measurement mode, the first signal distribution circuit is configured to forward the LO signal to both the first LO port and the first frequency converting circuit, and wherein the second distribution circuit is configured to forward the LO signal from the second LO port to the second frequency converting circuit. Accordingly, in the first measurement mode, the first frequency converting circuit may be configured to down-convert the first measurement signal based on the LO signal, for example by mixing the first measurement signal with the LO signal. Likewise, in the first measurement mode, the second frequency converting circuit may be configured to down-convert the second measurement signal based on the LO signal, for example by mixing the second measurement signal with the LO signal.

Accordingly, the first measurement mode may be associated with analyzing RF measurement signals that have to be down-converted in frequency before analysis.

In a further embodiment of the present disclosure, the test and/or measurement system has a second measurement mode, wherein, in the second measurement mode, the first signal distribution circuit is configured to forward the first measurement signal to the first ADC, and wherein the second signal distribution circuit is configured to forward the second measurement signal to the second ADC.

Accordingly, the second measurement mode may be associated with analyzing baseband measurement signals that do not have to be down-converted in frequency before analysis.

In the second measurement mode, a signal path between the first RF port and the first ADC may be free of frequency converting circuits, and a signal path between the second RF port and the second ADC may be free of frequency converting circuits.

In an embodiment, the first frequency converting circuit and the second frequency converting circuit may be bypassed in the second measurement mode.

In an embodiment of the present disclosure, the first ADC is configured to digitize the first measurement signal, thereby obtaining a first digitized measurement signal, wherein the second ADC is configured to digitize the second measurement signal, thereby obtaining a second digitized measurement signal.

In the first measurement mode described above, the first digitized measurement signal is obtained by digitizing the first measurement signal that is down-converted in frequency by the first frequency converting unit. Likewise, the second digitized measurement signal is obtained by digitizing the second measurement signal that is down-converted in frequency by the second frequency converting unit.

In the second measurement mode described above, the first digitized measurement signal is obtained by digitizing the first measurement signal without prior frequency-conversion. Likewise, the second digitized measurement signal is obtained by digitizing the second measurement signal without prior frequency-conversion.

In another embodiment of the present disclosure, the processing circuit is configured to determine a phase drift between the first digitized LO signal and the second digitized LO signal based on the first digitized LO signal and the second digitized LO signal received in the adjustment mode, wherein the processing circuit is configured to correct a phase drift between the first digitized measurement signal and the second digitized measurement signal based on the phase drift determined. In other words, measurement data obtained by the measurement circuits, for example in the first measurement mode or in the second measurement mode, can be corrected for phase drifts occurring in the test and/or measurement system based on the digitized LO signals obtained in the adjustment mode.

In an embodiment, by determining the phase drift between the first digitized LO signal and the second digital LO signal, samples of the first digitized measurement signal corresponding to samples of the second digitized measurement signal can be identified, such that the digitized measurement signals can be correctly aligned or synchronized for analysis of the digitized measurement signals.

In an embodiment, the at least two measurement circuits may comprise a third measurement circuit, wherein the third measurement circuit comprises a third signal distribution circuit, a third ADC, and a third LO port, wherein the third LO port is connected to the first LO port so as to receive the LO signal.

In an embodiment, the second LO port and the third LO port may be connected to the first LO port by a star connection, such that the LO signal is forwarded from the first LO port to the second LO port and to the third LO port independently.

In an embodiment of the present disclosure, the at least two measurement circuits comprise a third measurement circuit, wherein the third measurement circuit comprises a third signal distribution circuit, a third ADC, and a third LO port, wherein the third LO port is connected to the second LO port so as to receive the LO signal.

Accordingly, the first LO port, the second LO port, and the third LO port may be connected in series, i.e. in a daisy chain, such that the LO signal is first forwarded from the first LO port to the second LO port, and then from the second LO port to the third LO port.

According to an aspect of the present disclosure, the at least two measurement circuits, for example, comprise a third measurement circuit, wherein the third measurement circuit comprises a third signal distribution circuit, a third ADC, and a third LO port, wherein the third LO port is connected to the first LO port so as to receive the LO signal, and wherein the third LO port is connected to the third signal distribution circuit such that the LO signal is forwarded from the third LO port to the third signal distribution circuit. In the adjustment mode, the third ADC is configured to digitize the LO signal, thereby obtaining a third digitized LO signal, wherein the processing circuit is configured to receive the third digitized LO signal. Accordingly, the processing circuit may correct measurement results for phase drifts occurring in the test and/or measurement system and/or may synchronize the measurement circuits based on the first digitized LO signal, the second digitized LO signal, and the third digitized LO signal.

The explanations and aspects given above with respect to the first measurement circuit and the second measurement circuit likewise apply to the third measurement circuit.

It is to be understood that the at least two measurement circuits may comprise an arbitrary number of measurement circuits that may be synchronized as described above with respect to the first measurement circuit and the second measurement circuit.

In an embodiment, the processing circuit may be configured to determine a phase drift between the first digitized LO signal, the second digitized LO signal, and the third digitized LO signal based on the first digitized LO signal, the second digitized LO signal, and the third digitized LO signal received in the adjustment mode. For example, the processing circuit may be configured to determine pairwise phase drifts between the first digital LO signal, the second digitized LO signal, and the third digitized LO signal.