Power splitters including a tunable multimode interference coupler

The disclosure relates to photonics chips and, more specifically, to structures for a power splitter that include a multimode interference coupler and methods of forming such structures.

Photonics chips are used in many applications and systems including, but not limited to, data communication systems and data computation systems. A photonics chip includes a photonic integrated circuit comprised of photonic components, such as modulators, polarizers, and optical couplers, that are used to manipulate light received from a light source, such as a laser or an optical fiber.

A power splitter is a photonic component that is commonly used in photonics chips to divide optical power between multiple waveguides with a desired coupling ratio. Conventional power splitters have a fixed power splitting ratio, which prevents designers from compensating for fabrication imperfections and dynamically balancing the interferometer for high-extinction and high signal-to-noise ratio performance.

Improved structures for a power splitter that include a multimode interference coupler and methods of forming such structures are needed.

In an embodiment of the invention, a structure for a power splitter is provided. The structure comprises a multimode interference coupler including a grating having a plurality of grating lines, an input waveguide core, and an output waveguide core. The grating lines are disposed between the input waveguide core and the output waveguide core. The structure further comprises a resistive heating element adjacent to the grating lines.

In an embodiment of the invention, a method of forming a structure for a power splitter is provided. The method comprises forming a multimode interference coupler including a grating having a plurality of grating lines, an input waveguide core, and an output waveguide core. The grating lines are disposed between the input waveguide core and the output waveguide core. The method further comprises forming a resistive heating element adjacent to the grating lines.

With reference toand in accordance with embodiments of the invention, a structurefor a power splitter includes a multimode interference couplerthat is disposed on, and over, a dielectric layerand a substrate. In an embodiment, the dielectric layermay be comprised of a dielectric material, such as silicon dioxide, and the substratemay be comprised of a semiconductor material, such as single-crystal silicon. In an embodiment, the dielectric layermay be a buried oxide layer of a silicon-on-insulator substrate. The multimode interference coupleris separated from the substrateby the dielectric material of the intervening dielectric layer. In an alternative embodiment, one or more additional dielectric layers comprised of, for example, silicon dioxide may be disposed between the multimode interference couplerand the upper surface of the dielectric layer.

In an embodiment, the multimode interference couplermay be comprised of a material having a refractive index that is greater than the refractive index of silicon dioxide. In an embodiment, the multimode interference couplermay be comprised of a semiconductor material, such as single-crystal silicon, amorphous silicon, or polysilicon. In an alternative embodiment, the multimode interference couplermay be comprised of a dielectric material, such as silicon nitride, silicon oxynitride, or aluminum nitride. In alternative embodiments, other materials, such as a III-V compound semiconductor, may be used to form the multimode interference coupler.

In an embodiment, the multimode interference couplermay be formed by patterning a layer with lithography and etching processes. In an embodiment, an etch mask may be formed with a lithography process over a layer, and unmasked sections of the layer may be etched and removed with an etching process. In an embodiment, the multimode interference couplermay be formed by patterning the semiconductor material, such as single-crystal silicon, of the device layer of a silicon-on-insulator substrate. In an embodiment, the multimode interference couplermay be formed by patterning a deposited layer comprised of its constituent material, such as polysilicon.

The multimode interference couplermay include an input waveguide core, an input waveguide core, an output waveguide core, an output waveguide core, and a gratingdisposed between the input waveguide cores,and the output waveguide cores,. The gratingmay have a length given by a distance along a longitudinal axisfrom the grating lineclosest to the input waveguide cores,to the grating lineclosest to the output waveguide cores,. The gratingmay include multiple grating linesthat have a spaced arrangement along the longitudinal axis. The grating linesare separated by gaps G, which are open spaces that are disposed along the longitudinal axisbetween adjacent pairs of the grating linesand that may expose portions of the dielectric layer. The grating linesmay include a width W in a direction parallel to the longitudinal axisand a length L in a direction transverse to the longitudinal axis. In an embodiment, the width W of the grating linesmay vary with longitudinal position over the length of the grating. The gaps G between the grating linesmay have a width dimension in a direction parallel to the longitudinal axis. In an embodiment, the width dimension of the gaps G between the grating linesmay vary with longitudinal position over the length of the grating.

In an embodiment, the period of the grating, which may be defined as the sum of the width W of the grating linesand the width dimension of the gaps G, may be constant over the length of the grating. In an embodiment, the duty cycle of the grating linesmay be apodized or non-uniform to provide the variation in the width W of grating linesand the width dimension of the gaps G varying over the length of the grating. The duty cycle, which is dimensionless, may represent a ratio of the solid region included in the grating linesto the entire period.

In an embodiment, the width dimension of the gaps G may be smallest adjacent to the input waveguide cores,and output waveguide cores,, and largest at the center of the grating. In an embodiment, the width dimension of the gaps G may progressively increase from a minimum value adjacent to the input waveguide cores,to a maximum value at the center of the grating, and the width dimension of the gaps G may progressively increase from a minimum value adjacent to the output waveguide cores,to a maximum value at the center of the grating. In an embodiment, the duty cycle of the grating linesmay vary according to a Gaussian distribution () in which the width dimension of the gaps G between the grating linesincreases slowly adjacent to the input waveguide cores,, increases more rapidly in a transition region, increases slowly and decreases slowly on opposite sides of the center of the grating, decreases more rapidly in a transition region, and then decreases slowly adjacent to output waveguide cores,. In an exemplary embodiment, the gaps G may range in numerical value from about 0.08 microns to about 0.12 microns. In an embodiment, the duty cycle of the grating linesmay be apodized to define an aperiodic arrangement in which the pitch of the grating linesis constant over the length of the grating. In an alternative embodiment, the pitch and duty cycle of the grating linesmay be uniform to define a periodic arrangement. In an embodiment, the pitch of the grating lines, which defines a period of the grating, may range in numerical value from about a value of 0.1 times the light wavelength of operation to about 0.3 times the light wavelength of operation. In an embodiment, the duty cycle of the grating linesmay range in numerical value from about 0.4 to about 0.7.

The grating linesare disposed inside an envelope defined by the variation in the length L of the grating linesover the length of the grating. In an embodiment, the length L of the grating linesmay be smallest adjacent to the input waveguide cores,and output waveguide cores,, and largest at the center of the grating. In an embodiment, the length L of the grating linesmay progressively increase from a minimum value adjacent to the input waveguide cores,to a maximum value at the center of the grating, and the length L of the grating linesmay progressively increase from a minimum value adjacent to the output waveguide cores,to a maximum value at the center of the grating. In an embodiment, the length L of the grating linesmay vary on each side of the center of the gratingaccording to a non-linear function, such as a quadratic function, a cubic function, a parabolic function, a sine function, a cosine function, a Bezier function, or an exponential function. In an embodiment, the length L of the grating lineson each side of the center of the gratingmay change according to a quadratic function to ensure smooth side edges and reduced scattering. In an embodiment, the grating linesand gaps G characterizing the gratingmay be dimensioned and positioned at small enough pitch such that the gratingis configured to be a subwavelength grating that does not radiate or reflect light at a wavelength of operation, such as a wavelength in a range of 400 nanometers to 3,000 nanometers.

The structurefurther includes a resistive heating elementand a resistive heating elementthat are positioned adjacent to the grating. In that regard, the grating linesare laterally disposed between the resistive heating elementand the resistive heating elementsuch that each grating lineextends lengthwise between the resistive heating elementand the resistive heating element. The resistive heating elements,collectively define a heater that may be used to vary the temperature of the grating lines. The resistive heating elements,may be configured to generate heat by Joule heating under the control of a variable electrical signal, and the generated heat may be transferred by conduction from the resistive heating elements,to the grating lines. In an embodiment, the resistive heating elementmay extend adjacent to the grating linesover the entire length of the gratingand the resistive heating elementmay also extend adjacent to the grating linesover the entire length of the grating.

In an embodiment, each of the resistive heating elements,may include a stripcomprised of a semiconductor material, such as silicon, and a silicide layerthat is formed on the strip. In an embodiment, the stripsand the grating linesof the gratingmay be comprised of the same material. In an embodiment, the stripsmay be characterized as bus waveguide cores that are concurrently formed along with the multimode interference couplerand that extend parallel to the longitudinal axisof the grating. The silicide layersmay be formed on the stripsby a silicidation process that involves one or more annealing steps to form a silicide phase by reacting the semiconductor material of the stripswith a layer comprised of a silicide-forming metal, such as nickel, that is deposited on the strips. An initial annealing step of the silicidation process may consume all or part of the silicide-forming metal to form the silicide layers. Following the initial annealing step, any non-reacted silicide-forming metal may be removed by wet chemical etching. The silicide layersmay then be subjected to an additional annealing step at a higher temperature to form a lower-resistance silicide phase.

With reference toin which like reference numerals refer to like features inand at a subsequent fabrication stage, a dielectric layermay be formed over the multimode interference couplerand resistive heating elements,. The dielectric layermay be comprised of a dielectric material, such as silicon dioxide, having a refractive index that is less than the refractive index of the material constituting the multimode interference coupler. The dielectric layermay be deposited and then planarized following deposition.

Portions of the dielectric layerfill the gaps G between the grating linesof the gratingwith dielectric material. The portions of the dielectric material of the dielectric layerinside the gaps G and the grating linesmay define a metamaterial structure in which the material constituting the grating lineshas a higher refractive index than the dielectric material of the dielectric layer. The metamaterial structure can be treated as a homogeneous material having an effective refractive index that is intermediate between the refractive index of the material constituting the grating linesand the refractive index of the dielectric material constituting the dielectric layer.

Contactsmay be formed in the dielectric layerthat are physically and electrically connected to the resistive heating elements,. The contactsmay be comprised of a metal, such as tungsten, that is deposited in openings patterned by lithography and etching processes in the dielectric layer. The contactsmay connect the resistive heating elements,with a power source that can be operated to supply a variable electrical signal that causes Joule heating of the resistive heating elements,. Portions of the dielectric layerseparate the resistive heating elements,and contactsfrom the grating lines. In an alternative embodiment, the resistive heating elements,may be connected to the grating linesby a thin slab layer of material that has a higher thermal conductivity than the dielectric layerand that provides a path for enhanced heat conduction.

A dielectric layermay be formed over the dielectric layer, and interconnects,may be formed in the dielectric layer. The interconnects,may be comprised of a metal, such as copper, that is deposited in openings patterned in the dielectric layer. The interconnects,, which extend as bridges across the multimode interference coupler, couple the resistive heating elementto the resistive heating element. Additional metallization levels (not shown) may be formed over the dielectric layerthat couple the interconnectto power and the interconnectto ground.

In use, the multimode interference couplermay receive light from either the input waveguide coreor the input waveguide coreas input to the structure. The resistive heating elements,are configured to generate heat by Joule heating under the control of a variable electrical signal from the power supply, and the generated heat is transferred by conduction from the resistive heating elements,to the grating linesof the grating. The temperature of the grating linesis elevated by the transferred heat. The localized temperature change experienced by the grating linesis effective to change the splitting ratio of the multimode interference coupler, which changes the proportionality of the input power that is supplied to the different arms,and effectively enables the tunability of the multimode interference coupler.

The multimode interference couplerand resistive heating elements,of the structurecooperate to provide a tunable power splitter. The tunable power splitter may be characterized by a compact footprint in comparison to conventional power splitters. The splitting ratio may be thermally tunable using the resistive heating elements,with a low power consumption. The tunable power splitter may exhibit a low insertion loss and may maximize the total transmission spectrum.

With reference toand in accordance with alternative embodiments, a Mach-Zehnder interferometermay include an input optical coupler provided by the multimode interference couplerand resistive heating elements,() of the structure, an output optical coupler, arms,that are separately routed from the input optical coupler to the output optical coupler, and a ring resonatorthat may be disposed adjacent to the arm. The input waveguide cores,of the multimode interference couplermay define a pair of input ports to the Mach-Zehnder interferometer, and the output waveguide cores,of the multimode interference couplermay be connected to the arms,. The output optical couplermay include a pair of output ports from the Mach-Zehnder interferometer.

The output optical couplerand arms,of the Mach-Zehnder interferometerare formed from waveguide cores,that include portions providing the arms,and portions providing the output optical coupler. The portions of the waveguide cores,diverge from the output of the multimode interference couplerto a parallel alignment with a routing that laterally separates the arms,to limit crosstalk. In an embodiment, the arms,of the Mach-Zehnder interferometermay be unbalanced in that the armmay be shorter than the arm. In an alternative embodiment, the arms,of the Mach-Zehnder interferometermay be balanced in that the arms,may have equal lengths. The output optical couplerof the Mach-Zehnder interferometermay be a directional coupler in which adjacent portions of the waveguide coreand the waveguide coreare routed with a proximity characterized by a separation that supports light transfer. In an embodiment, the output optical couplermay be a 50-50 directional coupler.

The ring resonatormay be formed from a waveguide corethat has a closed geometrical shape. The waveguide coreof the ring resonatorincludes a portion that is disposed adjacent to a portion of the waveguide corein the armof the Mach-Zehnder interferometer. In an embodiment, the adjacent portions of the waveguide coreand the waveguide coredefine a light coupling region. In an embodiment, the ring resonatormay be configured with a ring shape. In an alternative embodiment, the ring resonatormay be configured with an oblong or racetrack shape. In an alternative embodiment, the ring resonatormay be omitted from the Mach-Zehnder interferometer.

The utilization of the structureas a tunable input optical coupler may operate to significantly increase the extinction ratio of the Mach-Zehnder interferometercompared to a conventional Mach-Zehnder interferometer that lacks the structure.

The methods as described above are used in the fabrication of integrated circuit chips. The resulting integrated circuit chips can be distributed by the fabricator in raw wafer form (e.g., as a single wafer that has multiple unpackaged chips), as a bare die, or in a packaged form. The chip may be integrated with other chips, discrete circuit elements, and/or other signal processing devices as part of either an intermediate product or an end product. The end product can be any product that includes integrated circuit chips, such as computer products having a central processor or smartphones.

References herein to terms modified by language of approximation, such as “about”, “approximately”, and “substantially”, are not to be limited to the precise value specified. The language of approximation may correspond to the precision of an instrument used to measure the value and, unless otherwise dependent on the precision of the instrument, may indicate a range of +/−10% of the stated value(s).

References herein to terms such as “vertical”, “horizontal”, etc. are made by way of example, and not by way of limitation, to establish a frame of reference. The term “horizontal” as used herein is defined as a plane parallel to a conventional plane of a semiconductor substrate, regardless of its actual three-dimensional spatial orientation. The terms “vertical” and “normal” refer to a direction in the frame of reference perpendicular to the horizontal, as just defined. The term “lateral” refers to a direction in the frame of reference within the horizontal plane.

A feature “connected” or “coupled” to or with another feature may be directly connected or coupled to or with the other feature or, instead, one or more intervening features may be present. A feature may be “directly connected” or “directly coupled” to or with another feature if intervening features are absent. A feature may be “indirectly connected” or “indirectly coupled” to or with another feature if at least one intervening feature is present. A feature “on” or “contacting” another feature may be directly on or in direct contact with the other feature or, instead, one or more intervening features may be present. A feature may be “directly on” or in “direct contact” with another feature if intervening features are absent. A feature may be “indirectly on” or in “indirect contact” with another feature if at least one intervening feature is present. Different features “overlap” if a feature extends over, and covers a part of, another feature.

The descriptions of the various embodiments of the present invention have been presented for purposes of illustration but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.