Two-phase paralleled switching converter, and switching circuit and control method thereof

This application claims priority to and the benefit of Chinese Patent Application No. 202211026262.6, filed on Aug. 25, 2022, which is incorporated herein by reference in its entirety.

The present invention relates generally to electronic circuits, and more particularly but not exclusively to switching converters, and switching circuits and control method thereof.

With the development of the computer and electronic industry, high efficiency, low output ripple and high load dynamic performance are required in switching converters. Therefore, it is necessary to design a switching converter with a new topology instead of conventional single-phase switching converters to meet the above requirements.

According to an embodiment of the present invention, a switching circuit for a switching converter is provided. The switching converter has an input terminal configured to receive an input voltage and an output terminal configured to provide an output voltage. The switching circuit comprises: a first switch, a second switch, a third switch a fourth switch and a fifth switch. The first switch has a first terminal and a second terminal, wherein the first terminal of the first switch is coupled to the input terminal. The second switch has a first terminal and a second terminal, wherein the first terminal of the second switch is coupled to the second terminal of the first switch through a first energy storage device. The third switch has a first terminal and a second terminal, wherein the first terminal of the third switch is coupled to the second terminal of the first switch and is coupled to the first terminal of the second switch through the first energy storage device. The fourth switch has a first terminal and a second terminal, wherein the first terminal of the fourth switch is coupled to the second terminal of the third switch, and the second terminal of the fourth switch is coupled to the second terminal of the second switch. The fifth switch has a first terminal and a second terminal, wherein the first terminal of the fifth switch is coupled to the second terminal of the third switch and the first terminal of the fourth switch, the second terminal of the fifth switch is coupled to the second terminal of the second switch and the second terminal of the fourth switch through a second energy storage device. The first terminal of the second switch, the second terminal of the third switch, the first terminal of the fourth switch, and the first terminal of the fifth switch are coupled to the output terminal through an energy storage circuit.

According to another embodiment of the present invention, a switching converter having an input terminal configured to receive an input voltage and an output terminal configured to provide an output voltage is provided. The switching converter comprises an energy storage circuit and a switching circuit. The switching circuit comprises: a first switch, a second switch, a third switch a fourth switch and a fifth switch. The first switch has a first terminal and a second terminal, wherein the first terminal of the first switch is coupled to the input terminal. The second switch has a first terminal and a second terminal, wherein the first terminal of the second switch is coupled to the second terminal of the first switch through a first energy storage device. The third switch has a first terminal and a second terminal, wherein the first terminal of the third switch is coupled to the second terminal of the first switch and is coupled to the first terminal of the second switch through the first energy storage device. The fourth switch has a first terminal and a second terminal, wherein the first terminal of the fourth switch is coupled to the second terminal of the third switch, and the second terminal of the fourth switch is coupled to the second terminal of the second switch. The fifth switch has a first terminal and a second terminal, wherein the first terminal of the fifth switch is coupled to the second terminal of the third switch and the first terminal of the fourth switch, the second terminal of the fifth switch is coupled to the second terminal of the second switch and the second terminal of the fourth switch through a second energy storage device. The first terminal of the second switch, the second terminal of the third switch, the first terminal of the fourth switch, and the first terminal of the fifth switch are coupled to the output terminal through the energy storage circuit.

According to yet another embodiment of the present invention, a control method for a switching converter is provided. The switching converter has a first switch, a second switch, a third switch, a fourth switch, a fifth switch, an input terminal configured to receive an input voltage, and an output terminal configured to provide an output voltage. The control method comprises several main steps. (I) Coupling a first terminal of the first switch to the input terminal of the switching converter. (II) Coupling a first terminal of the second switch to a second terminal of the first switch. (III) Coupling a first terminal of the third switch to the second terminal of the first switch and the first terminal of the second switch. (IV) Coupling a first terminal of the fourth switch to a second terminal of the third switch, and coupling a second terminal of the fourth switch to the second terminal of the second switch. (V) Coupling a first terminal of the fifth switch to the second terminal of the third switch and the first terminal of the fourth switch, and coupling a second terminal of the fifth switch to the second terminal of the second switch and the second terminal of the fourth switch. The first terminal of the second switch, the second terminal of the third switch, the first terminal of the fourth switch, and the first terminal of the fifth switch are coupled to the output terminal through an energy storage circuit.

The use of the same reference label in different drawings indicates the same or like components.

Various embodiments of the present invention will be described in detail below, and it should be noted that the embodiments described here are only for illustration. However, the present invention is not limited thereto. In the following description, numerous specific details, such as example circuits and example values for these circuit components, and methods are illustrated in order to provide a thorough understanding of the present invention. It will be apparent for persons having ordinary skill in the art that the present invention can be practiced without one or more specific details, or with other methods, components, materials. In other instances, well-known circuits, materials or methods are not shown or described in detail in order to avoid obscuring the present invention.

Throughout this description, the phrases “in one embodiment”, “in an embodiment”, “in some embodiments”, “in an example”, “in some examples”, “in one implementation”, and “in some implementations” as used to include both combinations and sub-combinations of various features described herein as well as variations and modifications thereof. These phrases used herein does not necessarily refer to the same embodiment, although it may. Additionally, persons having ordinary skill in the art will understand that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. The similar elements are provided with similar reference numerals. As used herein, the term “and/or” includes any combinations of one or more of the listed items.

shows a switching converterin accordance with an embodiment of the present invention. The switching converterhas an input terminalconfigured to receive an input voltage VIN, an output terminalconfigured to provide an output voltage VO, and a switching circuit. In the embodiment as shown in, the switching circuitcomprises switches QA, QB, QA, QB, and Q. The switches QA, QB, QA, QB, and Qmay be MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), JFETs (Junction Field-effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), and any other suitable power devices.

The switching converterconverts the input voltage VIN to the output voltage VO through turning on and off the switches QA, QB, QA, QB, and Qrespectively. The switch QA has a first terminalcoupled to the input terminaland a second terminal. The switch QB has a first terminaland a second terminal. The first terminalof the switch QB is coupled to the second terminalof the switch QA through an energy storage device, and the second terminalof the switch QB is coupled to a reference ground. In one embodiment, the energy storage deviceis an inductor or a capacitor. The switch QA has a first terminaland a second terminal. The first terminalof the switch QA is coupled to the second terminalof the switch QA. The switch QB has a first terminaland a second terminal. The first terminalof the switch QB is coupled to the second terminalof the switch QA. The second terminalof the switch QB is coupled to the second terminalof the switch QB (i.e., reference ground). The switch Qhas a first terminaland a second terminal. The first terminalof the switch Qis coupled to the second terminalof the switch QA. The second terminalof the switch Qis coupled to the second terminalof the switch QB and the second terminalof the switch QB (i.e., reference ground) through an energy storage device. In one embodiment, the energy storage devicemay be an inductor or a capacitor. In the embodiment as shown in, the switching converterfurther comprises an energy storage circuit. In one embodiment, the first terminalof the switch QB is coupled to the output terminalthrough the energy storage circuit, the second terminalof the switch QA and the first terminalof the switch QB are coupled to the output terminalthrough the energy storage circuit. In one embodiment, the energy storage circuit may be an inductor or a capacitor.

schematically shows a switching converterin accordance with an embodiment of the present invention. In the embodiment as shown in, the energy storage devicesandare capacitors. Persons having ordinary skill in the art should understand that the energy storage devicesandcould be inductors or other suitable energy storage devices. In the embodiment as shown in, the energy storage circuitcomprises an inductor Land an inductor L. The second terminalof the switch QA, the first terminalof the switch QB, and the first terminalof the switch Qare coupled to the output terminalthrough the inductor L. The first terminalof the switch QB is coupled to the output terminalthrough the inductor L. In one embodiment, the energy storage circuitfurther comprises an output capacitor CO coupled between the input terminaland the reference ground.

When the switching converteroperates normally, both of the voltage across the capacitorsandare half of the input voltage VIN (i.e., 0.5VIN). The voltage stress across the switches QA, QB, QA, QB, and Qduring turning on and off are all half of the input voltage VIN (i.e., 0.5VIN). Thus, the switching loss of the switching converterdecreases. Besides, the decreasing of the voltage stress reduces the cost of the switches, thereby reducing the cost of the switching converter.

The switching circuitfor example, may comprise but not limited to 5 different states S-Sas shown into transmit power.

shows a schematic diagramA when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switches QA and QB are maintained on, while the switches QB, QA, and Qare maintained off. The voltage across the inductor Lis −VO, the slope of the current Iflowing through the inductor Lis −VO/L. The current Iflows from the input terminalthrough the switch QA, the inductor L, and the reference ground, and flows back to the input terminal, to supply power to the capacitor CO and a load (not shown). The voltage across the inductor Lis 0.5VIN−VO, the slope of the current Iflowing through the inductor Lis (0.5VIN−VO)/L.

shows a schematic diagramB when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switches QB, QA, and Qare maintained on, while the switches QA and QB are maintained off. The voltage across the inductor Lis 0.5VIN−VO, the slope of the current Iflowing through the inductor Lis (0.5VIN−VO)/L. The voltage across the inductor Lis −VO, the slope of the current Iflowing through the inductor Lis −VO/L. The capacitorcharges the capacitorby a charge current Ichr. In one embodiment, a per-charge circuit may be used to decrease the charge current Ichr. In another embodiment, the charge current Ichr is decreased by turning on the switch Qafter a delay. Ideally, the voltage across the capacitoris eventually equal to the voltage across the capacitor.

shows a schematic diagramC when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switches QB and QA are maintained on, while the switches QA, QB, and Qare maintained off. The voltage across the inductor Lis 0.5VIN−VO, the slope of the current Iflowing through the inductor Lis (0.5VIN−VO)/L. The voltage across the inductor Lis −VO, the slope of the current Iflowing through the inductor Lis −VO/L.

shows a schematic diagramD when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switches QB and QB are maintained on, while the switches QA, QA, and Qare maintained off. The voltage across the inductor Lis −VO, the slope of the current Iflowing through the inductor Lis −VO/L. The voltage across the inductor Lis −VO, the slope of the current Iflowing through the inductor Lis −VO/L.

shows a schematic diagramE when a switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switches QA and Qare maintained on, while the switches QB, QA, and QB are maintained off. The voltage across the capacitoris 0.5 VIN. The voltage across the inductor Lis 0.5 VIN−VO. The slope of the current Iflowing through the inductor Lis (0.5VIN−VO)/L. The voltage across the inductor Lis 0.5VIN−VO. The slope of the current Iflowing through the inductor Lis (0.5VIN−VO)/L.

In the embodiments of the present invention, the maximum output voltage VO is up to 0.5VIN. Response to different ranges of the output voltage VO, the switching circuitoperates in different states sequentially. In one embodiment, when the output voltage VO is in a range of 0V-0.25VIN, the switching circuitrepeatedly operates in states S, S, S, and Sin sequence. In one embodiment, when the output voltage VO is in a range of 0.25VIN-0.5VIN, the switching circuitrepeatedly operates in states S, S, S, and Sin sequence. However, the charge current between the capacitorand the capacitoris large when the operating state of the switching circuitchanges from the state Sto the state S. Thus, in another embodiment, when the output voltage VO is in a range of 0.25VIN-0.5VIN, the switching circuitrepeatedly operates in states S, S, S, S, and Sin sequence to reduce the charge current between the capacitorsand. In the state S, the pre-charge circuit may be used to balance the voltage between the capacitorand the capacitor.

According to the switching converter of the embodiments of the present invention, the capacitorsandare buffer capacitors used to decrease the input voltage VIN to 0.5VIN. The switching converter of the embodiments of the present invention could be considered as a two-phase paralleled switching converter with the input voltage of 0.5VIN. Whether the range of the output voltage VO is 0V-0.25VIN or the relationship between the input voltage VIN and the output voltage VO is D=2VO/VIN, where the duty cycle D may represent the ratio of the on-time period of a switch (e.g., QA or QA) to a switching period in one switching period. The duty cycle of a conventional buck converter is VO/VIN, where the duty cycle may represent the ratio of the on-time period of a high side switch to a switching period in one switching period. Thus, the duty cycle of the switching converter of the embodiments of the present invention is double to the duty cycle of the conventional switching converter. A larger duty cycle D of the present invention facilitates the design of a high switching frequency control system.

When in DCM (Discontinuous Conduction Mode), the switching circuitmay comprise but not limited to another three different states S-S, as shown in.

shows a schematic diagramF when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switch QA is maintained on, while the switches QB, QA, QB, and Qare maintained off. The power is transmitted to the output terminalthrough the inductor L. The current Iflowing through the inductor Lis OA.

shows a schematic diagramG when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switch QB is maintained on, while the switches QA, QB, QA, and Qare maintained off. The current Iflowing through the inductor Ldecreases gradually but still greater than OA. The current Iflowing through the inductor Lis OA.

shows a schematic diagramH when the switching circuitoperates in the state Sin accordance with an embodiment of the present invention. When the switching circuitoperates in the state S, the switch QB is maintained on, while the switches QA, QA, QB, and Qare maintained off. The current Iflowing through the inductor Ldecreases gradually but still greater than OA. The current Iflowing through the inductor Lis OA.

In one embodiment, when in DCM, the switching circuitrepeatedly operates in states S, S, S, Sand Sin sequence, the output voltage VO is range from 0V-0.25VIN. Persons having ordinary skill in the art will understand that the switching circuitmay repeatedly operate in other suitable states in sequence.

Compared with the switching converter having the same input and output specifications, the switching converter of the embodiments of the present invention has higher efficiency, better load dynamic performance, lower output ripple, and larger duty cycle. Since the circuit topology reduces the switching stress to half of the input voltage VIN, thus the switching loss is reduced, and the efficiency of the switching converter of the embodiments of the present invention is improved. Besides, switches with a lower voltage rating could be used to reduce the cost of the switching converter. Since the circuit topology divides the switching converter into two out of phase parts with the same input and output specifications, thus the equivalent switching frequency is doubled, and the switching converter of the embodiments of the present invention has better load dynamic performance and lower output ripple. Compared with the conventional switching converter, the switching converter of the embodiments of the present invention has larger duty cycle, as a result, larger switching on-time period is presented. The larger duty cycle helps to reduce the design difficulty of the high switching frequency system with a peak current control.

shows a flowchart of a control methodfor a switching converter in accordance with an embodiment of the present invention, including steps St-St. The switching converter has an input terminal for receiving an input voltage and an output terminal for providing an output voltage.

In the step St, coupling a first terminal of a first switch to the input terminal of the switching converter; coupling a first terminal of a second switch to a second terminal of the first switch; coupling a first terminal of a third switch to the second terminal of the first switch and the first terminal of the second switch; coupling a first terminal of a fourth switch to a second terminal of the third switch; coupling a second terminal of the fourth switch to a second terminal of the second switch; coupling a first terminal of a fifth switch to the second terminal of the third switch and the first terminal of the fourth switch; and coupling a second terminal of the fifth switch to the second terminal of the second switch and the second terminal of the fourth switch. The first terminal of the second switch, the second terminal of the third switch, and the first terminal of the fourth switch are coupled to the output terminal through an energy storage circuit.

In the step St, when the output voltage is lower than half of the input voltage, the switching converter repeatedly operates in states S, S, S, and Sin sequence. In the state S: maintaining the first switch and the fourth switch on, and maintaining the second switch, the third switch, and the fifth switch off. In the state S: maintaining the second switch and the third switch on, and maintaining the first switch, the fourth switch, and the fifth switch off. In the state S: maintaining the second switch and the fourth switch on, and maintaining the first switch, the third switch, and the fifth switch off.

In the step St, when the output voltage is higher than half of the input voltage, the switching converter repeatedly operates in states S, S, S, S, and Sin sequence or repeatedly operates in states S, S, S, and Sin sequence. In the state S: maintaining the second switch, the third switch, and the fifth switch on, and maintaining the first switch and the fourth switch off. In the state S: maintaining the first switch and the fifth switch on, and maintaining the second switch, the third switch, and the fourth switch off.

In the step St, when in the DCM, the switching converter repeatedly operates in states S, S, S, S, and Sin sequence. In the state S: maintaining the first switch on, and maintaining the second switch, the third switch, the fourth switch, and the fifth switch off. In the state S: maintaining the third switch on, and maintaining the first switch, the second switch, the fourth switch, and the fifth switch off. In the state S: maintaining the second switch on, and maintaining the first switch, the third switch, the fourth switch, and the fifth switch off.

It should be noted that the order of the steps in the above flowchart is not limited to that shown in, for example, two consecutive steps may be performed simultaneously or in reverse order.

Although the invention has been described with reference to several exemplary embodiments, it should be understood that by persons skilled in the art that the present disclosure is not limited to what has been particularly shown and described herein above. Rather the scope of the present disclosure is defined by the claims and includes both combinations and sub-combinations of the various features described hereinabove as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not in the prior art.