Display panel including signal pads with varying dimensions

The present application claims priority to and the benefit of Korean Patent Application No. 10-2020-0105447, filed on Aug. 21, 2020, in the Korean Intellectual Property Office, the entire content of which is hereby incorporated by reference.

Aspects of some example embodiments of the present inventive concept relate to a display panel.

Recently, flat panel display devices such as liquid crystal display devices, organic light emitting display devices, etc., have been widely used. A display device may include pixels located in a display area and signal lines located in the display area and connected to the pixels. Also, the display device may further include signal pads and fan-out lines located around the display area and transmitting a signal and/or a voltage generated from the driving integrated circuit to the signal lines.

In order to implement a relatively narrow bezel, a width of the fan-out area in which the fan-out lines are may also be relatively narrow. However, as the number of fan-out lines connected to one driving integrated circuit increases, and as the number of driving integrated circuits used in a display panel increases due to large display devices, limits may be placed on the amount that the width of the fan-out area can be reduced.

The above information disclosed in this Background section is only for understanding of the background of the inventive concepts, and, therefore, it may contain information that does not constitute prior art.

Aspects of some example embodiments of the present inventive concept relate to a display panel. For example, some embodiments of the present inventive concept relate to the display panel and a display device including the same.

Aspects of some embodiments of the present inventive concept include a display panel with relatively reduced dead space.

Aspects of some example embodiments of the present inventive concept also include a display panel in which contact failure between signal pads and signal terminals is relatively reduced.

Aspects of some example embodiments of the present inventive concept include a display device with relatively reduced dead space.

Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts.

A display panel according to some embodiments may include a display substrate including a display area and a pad area spaced apart from a side of the display area in a first direction, and first to (n)th signal pads (where n is an integer of 2 or more) located in the pad area on the display substrate, extending in the first direction, and spaced apart from each other in a second direction perpendicular to the first direction. A (k)th signal pad among the first to (n)th signal pads (where k is an integer between 1 and n) is located between the first signal pad and the (n)th signal pad. A length of each of (k)th to (n)th signal pads among the first to (n)th signal pads in the first direction gradually increases. A width of each of the (k)th to (n)th signal pads in the second direction gradually decreases.

According to some embodiments, the first to (n)th signal pads are spaced apart from each other by a same distance in the second direction.

According to some embodiments, areas of the first to (n)th signal pads are the same as each other in a plan view.

According to some embodiments, each of the first to (n)th signal pads includes a first end adjacent to the side of the display area and a second end opposite to the first end.

According to some embodiments, a first reference line connecting first ends of first to (k-1)th signal pads among the first to (n)th signal pads and a second reference line connecting first ends of the (k) to (n)th signal pads are defined. Each of the first and second reference lines extends in a diagonal direction with respect to the second direction. The first and second reference lines are symmetrical to each other.

According to some embodiments, a third reference line connecting second ends of the first to (n)th signal pads is defined. The third reference line is parallel to the second direction.

According to some embodiments, a distance in the first direction between the side of the display area and a first end of each of the (k)th to (n)th signal pads gradually decreases.

According to some embodiments, distances in the first direction between the side of the display area and second ends of the (k)th to (n)th signal pads are the same as each other.

According to some embodiments, the display substrate further includes a fan-out area positioned between the side of the display area and the pad area. The display panel further includes first to (n)th signal lines located in the display area on the display substrate, and first to (n)th fan-out lines in the fan-out area on the display substrate and connecting the first to (n)th signal pads and corresponding ones of the first to (n)th signal lines, respectively. A (k)th fan-out line among the first to (n)th fan-out lines connects the (k)th signal pad and a (k)th signal line among the first to (n)th signal lines.

According to some embodiments, each of the (k)th signal pad, the (k)th fan-out line, and the (k)th signal line extends in the first direction.

According to some embodiments, each of the (n)th signal pad and the (n)th signal line extends in the first direction. The (n)th fan-out line extends in a diagonal direction with respect to the first direction.

According to some embodiments, an end of each of the first to (n)th fan-out lines contacts a corresponding one of the first to (n)th signal pads. Another end of each of the first to (n)th fan-out lines contacts a corresponding one of the first to (n)th signal lines. A distance in the first direction between the side of the display area and the end of each of (k)th to (n)th fan-out lines among the first to (n)th fan-out lines gradually decreases.

According to some embodiments, lengths of the first to (n)th fan-out lines are the same as each other.

According to some embodiments, the display panel further comprising at least one power pad in the pad area on the display substrate and spaced apart from the (n)th signal pad in the second direction.

According to some embodiments, a length of the power pad in the first direction is the same as a length of the (n)th signal pad in the first direction.

According to some embodiments, a width of the power pad in the second direction is the same as a width of the (n)th signal pad in the second direction.

A display panel according to some embodiments may include a display substrate including a display area and a plurality of pad areas spaced apart from a side of the display area in a first direction and arranged in a second direction perpendicular to the first direction, and a plurality of pad portions in corresponding ones of the plurality of pad areas on the display substrate, respectively. Each of the plurality of pad portions includes a plurality of signal pads extending in the first direction and spaced apart from each other in the second direction. A length of each of the plurality of signal pads in the first direction gradually increases closer to an end and another end of each of the plurality of pad areas. A width of each of the plurality of signal pads in the second direction gradually decreases closer to the end and the another end of each of the plurality of pad areas.

According to some embodiments, the plurality of signal pads included in each of the plurality of pad portions are spaced apart from each other by a same distance in the second direction.

According to some embodiments, areas of the plurality of signal pads included in each of the plurality of pad portions are the same as each other in a plan view.

A display device according to some embodiments may include a display panel including a display substrate including a display area and a pad area spaced apart from a side of the display area in a first direction, and a plurality of signal pads in the pad area on the display substrate, a flexible circuit film including a base film, and a plurality of signal terminals on the base film and overlapping each of the plurality of signal pads, and a conductive film between the display panel and the flexible circuit film. The plurality of signal terminals include first to (n)th signal terminals (where n is an integer of 2 or more) extending in the first direction, and spaced apart from each other in a second direction perpendicular to the first direction. A (k)th signal terminal among the first to (n)th signal terminals (where k is an integer between 1 and n) is between the first signal terminal and the (n)th signal terminal. A length of each of (k)th to (n)th signal terminals among the first to (n)th signal terminals in the first direction gradually increases. A width of each of the (k)th to (n)th signal terminals in the second direction gradually decreases.

The display panel according to some embodiments may include the signal pads that gradually increase in length outwardly from the central portion of the pad area. Accordingly, width of the fan-out area may be relatively reduced. Therefore, it is possible to implement a narrow bezel by reducing the width of the dead space.

The display device according to some embodiments may include the signal pads spaced apart from each other in a direction perpendicular to the length direction, and the signal terminals overlapping corresponding ones of the signal pads, respectively. Therefore, even in a large display device in which a plurality of driving integrated circuits are used, contact failure between the signal pads and the signal terminals may be prevented or reduced.

It is to be understood that both the foregoing general description and the following detailed description are merely examples and explanatory and are intended to provide further explanation of the invention as claimed.

Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.

is a block diagram illustrating a display device according to some embodiments.

Referring to, a display devicemay include a display paneland a panel driver. The panel driver may include a driving controller CON, a gate driver GDV, and a data driver DDV.

The display panelmay include a plurality of pixels PX and a plurality of signal lineselectrically connected to the pixels PX. The signal linesmay include gate lines GL and data lines DL. For example, each of the data lines DL may extend in a first direction DR1. Each of the gate lines GL may extend in a second direction DR2 crossing the first direction DR1. The pixels PX may emit light by receiving signals and/or voltages from the signal lines.

The driving controller CON may generate a gate control signal GCTRL, a data control signal DCTRL, and output image data ODAT based on an input image data IDAT and an input control signal CTRL provided from an external device. For example, the input image data IDAT may be RGB data including red image data, green image data, and blue image data (although embodiments are not limited thereto, and the input image data may include any other suitable image data format, for example, RGBG, etc.). The input control signal CTRL may include a master clock signal and an input data enable signal. The input control signal CTRL may further include a vertical synchronization signal and a horizontal synchronization signal.

The gate driver GDV may generate gate signals based on the gate control signal GCTRL provided from the driving controller CON. For example, the gate control signal GCTRL may include a vertical start signal and a gate clock signal. The gate driver GDV may sequentially output the gate signals to the gate lines GL. For example, the gate driver GDV may include gate driving integrated circuits.

According to some embodiments, the signal linesmay further include connection lines electrically connecting the gate driver GDV and the gate lines GL. For example, each of the connection lines may extend in the first direction DR1 and may be spaced apart from each other in the second direction DR2. Each of the connection lines may electrically connect a gate line GL among the gate lines GL and the gate driver GDV. That is, each of the gate lines GL may receive the gate signals from the gate driver GDV through a corresponding one of the connection lines. In this case, the gate driver GDV and the data driver DDV may be arranged in the same direction (e.g. the first direction) with respect to the display panel.

The data driver DDV may generate data voltages based on the data control signal DCTRL and the output image data ODAT provided from the driving controller CON. For example, the data control signal DCTRL may include an output data enable signal, a horizontal start signal, and a load signal. The data driver DDV may output the data voltages to the data lines DL. For example, the data driver DDV may include data driving integrated circuits.

is a plan view illustrating the display device of.is an exploded perspective view illustrating an area “A” of.

Referring to, according to some embodiments, the display devicemay include a display panel, a flexible circuit film, a conductive film, and a printed circuit board.

The display panelmay include a display substrateand at least one pad portion. The display substratemay include a display area DA and a non-display area NDA positioned around the display area DA (e.g., in a periphery or outside a footprint of the display area DA). Images may be displayed in the display area DA.

The non-display area NDA may include a pad area PA and a fan-out area FAN positioned between the display area DA and the pad area PA.

The pixels PX and the signal linesmay be located in the display area DA on the display substrate. For example, the pixels PX may be arranged in a matrix form or configuration in the first direction DR1 and the second direction DR2. Each of the pixels PX may include at least one thin film transistor and a pixel electrode connected thereto. The thin film transistor may include a gate electrode extending from each of the gate lines GL, a source electrode extending from each of the data lines DL, and a drain electrode connected to the pixel electrode.

The pad portion may be located in the pad area PA on the display substrate. The pad portion may include a plurality of signal pads. The signal padsmay be located on an upper surface of the display substrate. For example, the signal padsmay include gate signal pads and data signal pads. The gate signal pads may be electrically connected to corresponding ones of the gate lines GL, respectively. The data signal pads may be electrically connected to corresponding ones of the data lines DL, respectively. For example, the pad portion may further include at least one power pad or dummy pad.

According to some embodiments, as shown in, the display substratemay include a plurality of pad areas PA. The display panelmay include a plurality of pad portions. Each of the pad portions may be located in a corresponding one of the pad areas PA on the display substrate.

For example, as shown in, the pad areas PA may be located on a side of the display substrate. The pad areas PA may be spaced apart from a side of the display area DA in the first direction DR1 and may be arranged along the second direction DR2. The side of the display area DA may be adjacent to the flexible circuit film. For another example, the pad areas PA may be located on another side of the display substratefacing or adjacent to the side.

The flexible circuit filmmay include a base film, a terminal portion located on the base film, and at least one driving integrated circuitlocated on the base film. For example, as shown in, the display devicemay include a plurality of flexible circuit films.