Self-sufficient neural tissue stimulator

The present application is a U.S. National Phase of International Application No. PCT/EP2022/061445 entitled “SELF-SUFFICIENT NEURAL TISSUE STIMULATOR,” and filed on Apr. 29, 2022. International Application No. PCT/EP2022/061445 claims priority to European Patent Application No. 21171554.5 filed on Apr. 30, 2021. The entire contents of each of the above-listed applications are hereby incorporated by reference for all purposes.

The invention discloses a neural tissue stimulator, characterized in that the neural tissue stimulator comprises a multiple of microneedles and a chip comprising at least one comparator with adaptive level, sequence control circuit, at least one capacitor stack built by n capacitors and 2n switches, at least one buffer capacitor outside the at least one capacitor stack, at least two additional switches outside the at least one capacitor stack, a CMOS-Logic, wherein further, the neural tissue stimulator comprises an interposer layer comprising holes for the multiple of microneedles and a lid. The neural tissue stimulator is characterized in, that the chip is located on one surface of the interposer layer and that the lid and the interposer layer form a capsule for the chip. Further, each microneedle of the array of microneedles has a distal end which protrudes from the chip, wherein the distal ends of at least two microneedles of the array of microneedles have a different electrical insoaimlation. Further, the neural tissue stimulator is adapted to be electrically self-sufficient.

Neural tissue stimulation has evolved to (i) treat chronic pain; (ii) treat neurological disorders, e.g., Parkinson's Disease and epilepsy; (iii) treat paraplegia; (iv) treat systemic diseases, e.g. arterial hypertension, sleep apnea, heart failure; and (v) connect external electronic devices to biological neural networks for data transfer and exchange.

Neural tissue stimulation (neuromodulation) has been introduced more than 30 years ago and has undergone a significant technological evolution. This was driven by (i) progress in understanding of electrical impulse propagation physiology over neural tissue such as brain, spinal cord and peripheral nerve tissue; (ii) progress in semiconductor, lead and battery technology; and (iii) progress in surgical access technologies.

Today's neural tissue stimulators typically have a diameter size of several centimeters and are placed outside the brain or the spinal cord. Long leads connect from the stimulator to the stimulation target site, where they are fixated and electrically connected to neural tissue. Limited numbers of electrodes provide connection to the stimulated target site. Leads consist of electrical wires coated with bio-compatible material. Unfortunately, over time these leads are ingrown by connective tissue.

Furthermore, until today all neural tissue stimulators are powered by a built-in chemical battery and therefore need repetitive device replacements over a patient's lifetime. This requires surgery with associated risks. Another option is to recharge the battery. These systems suffer from the fact that additional technical devices outside the patient's body must be used to charge the neural tissue stimulator, which still makes it necessary to check the neural tissue stimulator's performance status and perform a battery charging procedure either by a technician or by the patient if necessary. A procedure which is usually unfavorable for the patient.

Besides limitations in power supply, the designs of the semiconductor-to-tissue interfaces are limiting factors for clinical usage of existing neural tissue stimulation technologies.

Limited numbers of electrode numbers lack anatomical specificity of stimulated target sites with limitations to achieve desired clinical stimulation effects.

Intradural stimulation sites with extradural lead-to-battery connection require permanent lead access over the dura barrier into the intradural cavity, with the associated risks of cerebral fluid leakage and infection entrance.

Extradural electrode placement and stimulation sites exponentially decrease stimulation specificity and increase electrical energy drainage.

These factors have led to a plateau of clinical usability of current neurostimulator technologies.

Therefore, it is the purpose of the invention to overcome the above-mentioned disadvantages of the state of the art and to provide a neural tissue stimulator which is electrically self-sufficient and therefore (i) can be implanted to be fully contained in the intradural cavity, and (ii) does not need a recharge procedure for a battery or even a whole replacement by a new one due to an empty battery.

Therefore, the present invention provides a neural tissue stimulator, characterized in that the device comprises

Further a method for stimulating neural tissue utilizing a neural tissue stimulator according to the invention is disclosed. The method is characterized in that

The neural tissue stimulator according to the invention comprises a multiple of microneedles which form an array of microneedles. Every microneedle of the array of microneedles has a proximal and a distal end. In one embodiment of the invention, the microneedle according to the invention has a proximal end, which is shaped cylindrical with a diameter between 0.05 mm and 0.5 mm, preferably the proximal end has a diameter of 0.2 mm and a height between 0.05 mm and 0.5 mm, preferably with a height of 0.2 mm.

In a further embodiment of the invention the microneedle according to the invention has a proximal end which is shaped like a cuboid with a width and depth between 0.05 mm and 0.5 mm, preferably the width and depth of the cuboid is 0.2 mm. The height of the cuboid is between 0.05 mm and 0.5 mm, preferably the cuboid has a height of 0.2 mm.

From the proximal end, the microneedle comprises a tapered portion which connects a distal end with the proximal end. The distal end is needle shaped and has a length between 0.5 mm and 5.0 mm. The distal end of the microneedle is at least partially electrically conductive and shear stress resistant in the range of 5 to 50 Newton, which is comparable to the shear stress resistance of bonding wires. Preferably the microneedle is milled from one piece. Due to its length of the microneedle can be inserted into deeper layers of neural tissue, which enables targeted neural tissue stimulation. The gross anatomical structure of the entire central nervous system as well as the histoarchitecture of the human brain tissue follows a layered build-up. Therefore, neurological processes (such as certain information handling, memory function, emotions, neurohormonal regulation, motor actions and others) are localized in distinct anatomical target zones in distinctly different depth layers of the central nervous system. Medical neurostimulation requires precise localization and depth of stimulus deployment to reach the desired target zone driven by the clinical use case scenario. For that existing electrode designs are limited. The present invention enables unique new features for highly specific brain tissue stimulation especially with respect to the reach into deeper layers of neural tissue.

Preferably, the diameters of the distal ends of the multiple of microneedles are between 0,001 mm and 0.1 mm, preferably between 0.01 mm and 0.1 mm, most preferably the diameters of the distal ends of the multiple of microneedles are 0.02 mm. Thereby, the distal ends of the microneedles approximate neural cellular dimensions. The dimensions of the microneedles are therefore a lot smaller than any other electrodes in use today. In one embodiment of the invention up to approximately 5 microneedles can be positioned per mmon a chip.

The small dimensions of the microneedles offer several advantages over the state of the art. Firstly, microneedles according to the invention couple directly electrically to only a few distinct nerve cells or their axons. This allows highly selective targeting of stimulation to areas in the brain/spinal cord, which are exclusively needed (e.g. movement-dependent stimulation of motoneuron axons in patients after spinal cord injury). Unintended and potentially painful stimulation to neighboring neural structures can be avoided. Further, the high number and redundancy of microneedles within the array allow for individualized programming of neural tissue stimulation depending on anatomy and structure of the neural target tissue in any given patient. Further, microneedles according to the invention are able to sense cellular electrical activity, harvest energy directly from inside the neural tissue and/or emit an electrical pulse directly into the neural tissue due to their small dimensions. Thereby, advantageously the stimulation threshold is lowered.

Further due to the fact that the neural tissue stimulator according to the invention is able to harvest energy no external energy supply e.g. by a battery is necessary. Advantageously, this allows that the entire device can be implanted to be fully contained within the intradural cavity for brain and spinal cord applications. This will avoid medical implants which permanently cross the dura barrier with the risk of cerebral liquor leakage and intracerebral infection routes. State of the art devices are not suitable for this purpose, since conventional electrodes connect from within the brain tissue to externally implanted battery/electronics.

In one preferred embodiment of the invention the neural tissue stimulator is adapted to be implanted in living beings in a way to be fully contained within the intradural cavity. This is enabled since no external energy supply is necessary and further the dimensions of the neural tissue stimulator can be adapted to the dimensions of the implantation site in the body. The device of the invention is suited to be inserted and used in living beings, which means in human being as well as in animals.

In one embodiment of the invention all microneedles of the array of microneedles have the same length. In a further embodiment of the invention the microneedles of the array of microneedles have different lengths. Advantageously, in the latter embodiment the microneedles of the array of microneedles can be adapted in length to reach certain depth layers of neural tissue with different functionality and information content.

In a preferred embodiment of the invention the neural tissue stimulator comprises between 5 and 1 000 000 microneedles, preferably between 25 and 10 000 microneedles, most preferably between 100 and 2500 microneedles.

Principally the multiple of microneedles can be arranged on the chip in every way. In a preferred embodiment of the invention, the multiple of microneedles is arranged symmetrically to each other on the chip. Thereby, advantageously a largest possible number of microneedles can be arranged on the surface of the chip. Further, the regularity in the order of the microneedles simplifies production processes.

The microneedles comprise a material of the group comprising Platin/Iridium (PtIr), gold, and fine metals. The material of the microneedles should be suitable for solder-connection with the chip or the interposer layer. Further, according to the invention, all materials comprised in the multiple of microneedles are bio-compatible and insensitive to body liquids. Bio-compatible in conjunction with the present invention means that no toxic interactions occur between the bio-compatible material and tissue, e.g. human tissue.

Further, preferably, each microneedle is adapted to be able to harvest cellular energy, to electrically stimulate live tissue and to sense intrinsic cellular electrical activity. According to the invention, every microneedle of the multiple of microneedles is operable independent of the other microneedles. Which means that one microneedle could harvest energy while a neighboring microneedle is sensing intrinsic cellular electrical activity. The tasks of each microneedles can be redistributed at any time and thus adapted to the current requirements of the neural tissue stimulator.

According to the invention at least two microneedles of the array of microneedles have different electrical insolation. Which means that the distal end of at least one microneedle is partially covered by an electrically insulating material, thereby not the whole distal end of this microneedle is electrically conductive. By covering the distal ends of different microneedles of the array of microneedles at different length with an electrically insulating material it is possible to stimulate different depth layers of the central nervous system. This feature is enormously beneficial to enable a local high resolution stimulation. A good example for the associated advantages is spinal cord stimulation for paraplegia. The problem with conventional electrodes is that the stimulation of larger areas/depths is too imprecise, resulting in painful side effects and unwanted movements. This does not occur using the device of the present invention.

Suitable electrically insulating material for covering the distal end of a microneedle can be selected from the group comprising Parylene-C and other plastics, Silicon Dioxide (SiO) and other ceramics. These materials are bio-compatible and insensitive to body liquids.

In one embodiment of the in invention the distal end of one microneedle is partially covered by an electrically insulating material and all other microneedles of the array of microneedles are uncovered. In a further embodiment the distal end of more than one microneedle of the array of microneedles is covered by an electrically insulating material, wherein the distal ends of at least two microneedles are covered by an electrically insulating material at a different length.

Further, the neural tissue stimulator according to the invention comprises a chip and an interposer layer. In one embodiment of the invention the proximal end of each microneedle is soldered to the surface of the chip, which ensures that each microneedle of the array of a multiple of microneedles has a direct contact to the chip. In a further embodiment of the invention the proximal end of each microneedle is soldered to the surface of the interposer layer of the neural tissue stimulator. According to the invention each microneedle of the array of a multiple of microneedles is isolated from each other microneedle of the array of a multiple of microneedles. Further, the distal end of every microneedle protrudes from the chip and/or the interposer layer.

According to the invention the chip comprises all devices necessary to control the neural tissue stimulator's functions. Therefore, the chip comprises at least one comparator with adaptive level, a sequence control circuit, at least one capacitor stack built by n capacitors and 2n switches, at least one buffer capacitor outside the at least one capacitor stack, at least two additional switches outside the at least one capacitor stack and a CMOS-Logic, wherein n E N.

Self-Sufficiency Energy Harvesting

In a preferred embodiment of the invention the chip comprises at least one comparator with adaptive level, at least one capacitor stack built by n capacitors and 2n switches, at least one buffer capacitor outside the at least one capacitor stack, at least two additional switches outside the at least one capacitor stack for each needle of the array of microneedles.

According to the invention the 2n switches of the at least one capacitor stack couple the n capacitors selectively to at least one microneedle of the array of microneedles. Further, the n capacitors of the at least one capacitor stack are dedicated to be sequentially charged by at least one microneedle of the array of microneedles one after the other. And the at least one buffer capacitor outside the at least one capacitor stack is dedicated to be charged from the n capacitors of the capacitor stack at once.

Hence, the chip according to the invention comprises at least one capacitor stack, wherein the capacitor stack is built by n capacitors and 2n switches, wherein n∈N. The capacitor stack can comprise as much capacitors as can be accommodated constructively. In one embodiment of the invention n is between 2 and 20, more preferably between 2 and 14. The n capacitors of the capacitors stack are dedicated to be sequentially charged by at least one microneedle of the array of microneedles, which functions as DC input source, one after the other.

The 2n switches of the capacitor stack couple the n capacitors selectively to at least one microneedle of the array of microneedles in a way that every capacitor is sequentially charged by the DC input made available by the at least one microneedle of the array of microneedles one after the other. The DC input is made available since the microneedles couple directly electrically to neural cells and derive the electrical signal. Thereby, the DC input by the neural cells can be intermittent, which means the DC-voltage is not always present. The controlling and sequencing of the switches is generated from a usual CMOS-Logic, which is common to Microelectronics.

At least one buffer capacitor is situated outside the capacitor stack, which works as a buffer. According to the invention, the at least one buffer capacitor is dedicated to be charged from the n capacitors of the at least one capacitor stack at once. In a preferred embodiment of the invention, the chip comprises one buffer capacitor outside the capacitor stack. In a further preferred embodiment of the invention the chip comprises two buffer capacitors outside the capacitor stack.

Furthermore, the chip comprises at least two additional switches outside the capacitor stack. In a preferred embodiment of the invention the chip comprises two additional switches outside the capacitor stack. The additional switches are dedicated to selectively couple the capacitor stack to the at least one buffer capacitor outside the capacitor stack or to a further optional capacitor stack.

In a further preferred embodiment the chip comprises four additional switches outside the capacitor stack. Preferably the chip comprises four additional switches outside the at least one capacitor stack if the chip comprises a first buffer capacitor outside the at least one capacitor stack and a second buffer capacitor outside the at least one capacitor stack. In this embodiment two additional switches are dedicated to selectively connect the at least one capacitor stack to the first buffer capacitor outside the capacitor stack and the two further additional switches are dedicated to selectively connect the at least one capacitor stack to the second buffer capacitor outside the capacitor stack.

Accordingly, in one preferred embodiment the chip according to the invention comprises two buffer capacitors outside the capacitor stack as buffer capacitors outside the at least one capacitor stack and four additional switch outside the at least one capacitor stack.

From its physical construction as a stack, the n capacitors of the capacitor stack are all connected in series electrically. Furthermore, in one embodiment of the invention, the at least one capacitor stack comprises at least three conductive plates wherein the conductive plates have a top-side and a bottom-side and wherein the top-side of at least one conductive plate is part of a first capacitor and the bottom-side of the at least one conductive plate is part of a neighboring further capacitor. Furthermore, the capacitor stack comprises an isolating material between the conductive plates in a way that a capacitor is built.

In a preferred embodiment of the invention, a capacitor stack with n capacitors comprises m=n+1 conductive plates. According to the invention the first conductor n=1 is built between the bottom-side of the first conductive plate (m=1) and the top-side of the second conductive plate (m=2). The neighboring conductor (n=2) is built between the bottom-side of the second conductive plate (m=2) and the top-side of the third conductive plate (m=3) and so on.

The capacitance of the capacitors built according to the invention is quite wide ranging from 1 nF down to 1 fF and even below. It depends on plate geometries and the dielectric material employed between the plates. Typical dielectric materials are SiO2 or plastic, but other dielectric materials are possible.

The arrangement of the conductors in a capacitor stack with n capacitors according to the invention has the advantage that the inner conductive plates, which means plates m=2 to m=n form no or just very small parasitic capacitances to the outside of the stack. Parasitic capacitances are well known in the art. They arise at the interfaces of capacitors to the surrounding and are unwanted as those have to be charged at every charge cycle of the capacitor. This process lowers the charging efficiency of the capacitor and therefore its end-charging voltage. Accordingly, in the state of the art every capacitor has two interfaces to the surrounding and therefore two interfaces where parasitic capacitances arise.

The capacitor stack according to the invention is able to provide n capacitors, wherein only the first and the last capacitor have a substantial interface to the surrounding. Therefore, advantageously, only at these two interfaces parasitic capacitances will form. Accordingly, the charging efficiency of the n capacitors of the capacitor stack is increased as well as the end-charging voltage.

Furthermore, in a preferred embodiment of the invention, all capacitors are connected in series electrically.

In one preferred embodiment of the invention the at least one capacitor stack built by n capacitors and 2n switches, the at least one buffer capacitor outside the at least one capacitor stack and the at least two additional switches outside the at least one capacitor stack are configured as an integrated circuit wherein switches are realized as transistors and capacitors are realized by conductive plates from integrated circuit technology.

Preferably the conductive plates are made of material selected from the group comprising metal or polysilicon or any other conductive material from integrated circuit technology. Suitable metals are copper and aluminum and tungsten.

In one embodiment of the invention the isolating material is selected from the group comprising SiO, SiN and HfO and stacks thereof.

As described above the capacitor stack is internally nearly perfect if it comes to storing the applied charges, as the field is nicely confined internally. Unfortunately at the first and last conductive plates still some parasitic capacitances will form. In view not to lose the energy stored in those external parasitic capacitances, according to the invention, an inductor can be applied to perform intermediate storage in a resonant circuit configuration.