Display device

This application claims priority to Korean Patent Application No. 10-2023-0035563, filed in the Republic of Korea on Mar. 20, 2023, the entire contents of which are hereby expressly incorporated by reference into the present application.

Embodiments of the disclosure relate to a display device with improved displaying capabilities.

Since the dawn of the information age, there has been ever increasing demands for various types of display devices that are able to quickly and efficiently display information. Accordingly, various display devices, such as liquid crystal display (LCD), plasma display panel (PDP), quantum dot light emitting display (QLED), and organic light emitting display (OLED), are being used and continuously improved.

The recent growth of such display devices leads to development of transparent display devices that allow users to view objects or images positioned on an opposite side of the display device through the display panel that displays images.

These transparent display devices can be applied to various products, such as partition walls, glass at transportation facilities, building glass, advertising electronic signage, cooler doors, and screen doors due to their space utilization, interior design, and other advantages.

These transparent display devices have a variety of applications but have drawbacks, such as deteriorated sharpness and visibility of images displayed on the display device due to light transmission. Accordingly, the inventors of the disclosure have invented a display device that enhances the sharpness and visibility of images displayed on the display device by adjusting the light transmittance of the transparent display device.

Embodiments of the disclosure can provide a display device capable of adjusting light transmittance without being limited to a size or arrangement of pixels.

Embodiments of the disclosure can provide a display device capable of enhancing the sharpness and visibility of images displayed on the display device by adjusting light transmittance.

Embodiments of the disclosure can provide a display device capable of low power consumption by enhancing the sharpness and visibility of images displayed on the display device.

Embodiments of the disclosure can provide a display device comprising a first polarizing plate, a transmittance adjusting member disposed on the first polarizing plate, a transparent display panel disposed on the transmittance adjusting member and including a light emitting element, and a second polarizing plate disposed on the transparent display panel.

Embodiments of the disclosure can provide the display device, wherein the transmittance adjusting member includes a first transparent electrode, a liquid crystal layer positioned on the first transparent electrode, and a second transparent electrode positioned on the liquid crystal layer.

Embodiments of the disclosure can provide the display device, wherein the transmittance adjusting member includes a first phase film and a second phase film positioned on the first phase film.

According to embodiments of the disclosure, there can be provided a display device capable of adjusting light transmittance without being limited to the size or arrangement of pixels.

According to embodiments of the disclosure, there can be provided a display device capable of enhancing the sharpness and visibility of images displayed on the display device by adjusting light transmittance.

According to embodiments of the disclosure, there can be provided a display device capable of low power consumption by enhancing the sharpness and visibility of images displayed on the display device.

In the following description of examples or embodiments of the disclosure, reference will be made to the accompanying drawings in which it is shown by way of illustration specific examples or embodiments that can be implemented, and in which the same reference numerals and signs can be used to designate the same or like components even when they are shown in different accompanying drawings from one another. Further, in the following description of examples or embodiments of the disclosure, detailed descriptions of well-known functions and components incorporated herein will be omitted when it is determined that the description can make the subject matter in some embodiments of the disclosure rather unclear. The terms such as “including”, “having”, “containing”, “constituting” “make up of”, and “formed of” used herein are generally intended to allow other components to be added unless the terms are used with the term “only”. As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

Terms, such as “first”, “second”, “A”, “B”, “(A)”, or “(B)” can be used herein to describe elements of the disclosure. Each of these terms is not used to define essence, order, sequence, or number of elements etc., but is used merely to distinguish the corresponding element from other elements.

When it is mentioned that a first element “is connected or coupled to”, “contacts or overlaps” etc. a second element, it should be interpreted that, not only can the first element “be directly connected or coupled to” or “directly contact or overlap” the second element, but a third element can also be “interposed” between the first and second elements, or the first and second elements can “be connected or coupled to”, “contact or overlap”, etc. each other via a fourth element. Here, the second element can be included in at least one of two or more elements that “are connected or coupled to”, “contact or overlap”, etc. each other.

When time relative terms, such as “after,” “subsequent to,” “next,” “before,” and the like, are used to describe processes or operations of elements or configurations, or flows or steps in operating, processing, manufacturing methods, these terms can be used to describe non-consecutive or non-sequential processes or operations unless the term “directly” or “immediately” is used together.

In addition, when any dimensions, relative sizes etc. are mentioned, it should be considered that numerical values for an elements or features, or corresponding information (e.g., level, range, etc.) include a tolerance or error range that can be caused by various factors (e.g., process factors, internal or external impact, noise, etc.) even when a relevant description is not specified. Further, the term “may” fully encompasses all the meanings of the term “can”.

Hereinafter, various embodiments of the disclosure are described in detail with reference to the accompanying drawings.

is a view illustrating a system configuration of a display deviceaccording to embodiments of the disclosure. All components of each display deviceaccording to all embodiments of the disclosure are operatively coupled and configured.

Referring to, a display deviceaccording to embodiments of the disclosure can include a display paneland driving circuits for driving the display panel.

The driving circuits can include a data driving circuitand a gate driving circuit. The display devicecan further include a controllercontrolling the data driving circuitand the gate driving circuit.

The display panelcan include a substrate SUB and signal lines, such as a plurality of data lines DL and a plurality of gate lines GL disposed on the substrate SUB. The display panelcan include a plurality of subpixels SP connected to the plurality of data lines DL and the plurality of gate lines GL.

The display panelcan include a display area DA in which images are displayed and a non-display area NDA in which no image is displayed. In the display panel, a plurality of subpixels SP for displaying images can be disposed in the display area DA, and the driving circuitsand, and the controllercan be electrically connected or disposed in the non-display area NDA. Further, pad units for connection of integrated circuits or a printed circuit can be disposed in the non-display area NDA.

The data driving circuitis a circuit for driving the plurality of data lines DL, and can supply data signals to the plurality of data lines DL. The gate driving circuitis a circuit for driving the plurality of gate lines GL, and can supply gate signals to the plurality of gate lines GL. The controllercan supply a data control signal DCS to the data driving circuitto control the operation timing of the data driving circuit. The controllercan supply a gate control signal GCS for controlling the operation timing of the gate driving circuitto the gate driving circuit.

The controllercan start scanning according to a timing implemented in each frame, convert input image data input from the outside into image data Data suited for the data signal format used in the data driving circuit, supply the image data Data to the data driving circuit, and control data driving at an appropriate time suited for scanning.

To control the gate driving circuit, the controllercan output various gate control signals GCS including a gate start pulse GSP, a gate shift clock GSC, and a gate output enable signal GOE.

To control the data driving circuit, the controllercan output various data control signals DCS including, e.g., a source start pulse SSP, a source sampling clock SSC, and a source output enable signal SOE.

The controllercan be implemented as a separate component from the data driving circuit, or the controller, along with the data driving circuit, can be implemented as an integrated circuit.

The data driving circuitreceives the image data Data from the controllerand supply data voltages to the plurality of data lines DL, thereby driving the plurality of data lines DL. The data driving circuitis also referred to as a ‘source driving circuit.’

The data driving circuitcan include one or more source driver integrated circuit (SDICs).

For example, each source driver integrated circuit (SDIC) can be connected with the display panelby a tape automated bonding (TAB) method or connected to a bonding pad of the display panelby a chip on glass (COG) or chip on panel (COP) method or can be implemented by a chip on film (COF) method and connected with the display panel.

The gate driving circuitcan output a gate signal of a turn-on level voltage or a gate signal of a turn-off level voltage according to the control of the controller. The gate driving circuitcan sequentially drive the plurality of gate lines GL by sequentially supplying gate signals of the turn-on level voltage to the plurality of gate lines GL.

The gate driving circuitcan be connected with the display panelby the TAB method or connected to a bonding pad of the display panelby a COG or COP method or can be connected with the display panelaccording to the COF method. Alternatively, the gate driving circuitcan be formed in a gate in panel (GIP) type, in the non-display area NDA of the display panel. The gate driving circuitcan be disposed on the substrate SUB or can be connected to the substrate SUB. In other words, the gate driving circuitthat is of a GIP type can be disposed in the non-display area NDA of the substrate SUB. The gate driving circuitthat is of a chip-on-glass (COG) type or chip-on-film (COF) type can be connected to the substrate SUB.

Meanwhile, at least one of the data driving circuitand the gate driving circuitcan be disposed in the display area DA. For example, at least one of the data driving circuitand the gate driving circuitcan be disposed not to overlap the subpixels SP or to overlap all or some of the subpixels SP.

When a specific gate line GL is opened by the gate driving circuit, the data driving circuitcan convert the image data Data received from the controllerinto an analog data voltage and supply it to the plurality of data lines DL.

The data driving circuitcan be connected to one side (e.g., an upper or lower side) of the display panel. Depending on the driving scheme or the panel design scheme, data driving circuitscan be connected with both the sides (e.g., both the upper and lower sides) of the display panel, or two or more of the four sides of the display panel.

The gate driving circuitcan be connected to one side (e.g., a left or right side) of the display panel. Depending on the driving scheme or the panel design scheme, gate driving circuitscan be connected with both the sides (e.g., both the left and right sides) of the display panel, or two or more of the four sides of the display panel.

The controllercan be a timing controller used in typical display technology, a control device that can perform other control functions as well as the functions of the timing controller, or a control device other than the timing controller, or can be a circuit in the control device. The controllercan be implemented as various circuits or electronic components, such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a processor.

The controllercan be mounted on a printed circuit board or a flexible printed circuit and can be electrically connected with the data driving circuitand the gate driving circuitthrough the printed circuit board or the flexible printed circuit.

The display deviceaccording to embodiments of the disclosure can be a display including a backlight unit, such as a liquid crystal display, or can be a self-emission display, such as an organic light emitting diode (OLED) display, a quantum dot display, or a micro light emitting diode (LED) display.

According to an embodiment, when the display deviceis an OLED display, each subpixel SP can include an organic light emitting diode (OLED), which is self-luminous, as a light emitting element. According to an embodiment, when the display deviceis a quantum dot display, each subpixel SP can include a light emitting element formed of a quantum dot, which is a self-luminous semiconductor crystal. If the display deviceaccording to embodiments is a micro LED display, each subpixel SP can include a micro LED, which is self-emissive and formed of an inorganic material, as the light emitting element.

is an equivalent circuit diagram illustrating a subpixel SP of a display deviceaccording to embodiments of the disclosure.

Referring to, each of a plurality of subpixels SP disposed on a display panelof a display deviceaccording to embodiments of the disclosure can include a light emitting element ED, a driving transistor DRT, a scan transistor SCT, and a storage capacitor Cst.

Referring to, the light emitting element ED can include a pixel electrode PE and a common electrode CE and can include a light emitting layer EL positioned between the pixel electrode PE and the common electrode CE.

The pixel electrode PE of the light emitting element ED can be an electrode disposed in each subpixel SP, and the common electrode CE can be an electrode commonly disposed in all the subpixels SP. Here, the pixel electrode PE can be an anode electrode, and the common electrode CE can be a cathode electrode. Conversely, the pixel electrode PE can be a cathode electrode, and the common electrode CE can be an anode electrode.

For example, the light emitting element ED can be an organic light emitting diode (OLED), a light emitting diode (LED), or a quantum dot light emitting element.

The driving transistor DRT is a transistor for driving the light emitting element ED, and can include a first node N, a second node N, and a third node N.