Display device and multi-panel display device

This application claims priority to Korean Patent Application No. 10-2020-0125518 filed on Sep. 28, 2020, in the Korean Intellectual Property Office, the entire contents of which are expressly incorporated herein by reference into the present application.

The present disclosure relates to a display device and a multi-panel display device, and more particularly, to a display device and a multi-panel display device which are capable of implementing a narrow bezel with a high reliability by delaying migration of a metal component generated in a side line.

Generally, display devices include a display panel having a display area in which images are displayed and a non-display area defined along a periphery of the display area, a plurality of driving circuits disposed in the non-display area, and a printed circuit board (PCB) which supplies control signals to the plurality of driving circuits. A plurality of link lines which connects the display panel and the driving circuits are disposed in the non-display area.

The non-display area is blocked by a black matrix of the display panel or a case so that the images are not substantially displayed. As such, this area is generally referred to as a bezel area.

In order to increase an effective display screen size with the same area, the driving circuits and the link lines are disposed in a lower portion of the display panel corresponding to the non-display area and a side line is disposed on a side surface of the display panel to electrically connect the display panel and the driving circuits.

In the meantime, the size and the shape of the display are gradually diversified and in recent years, extra-large displays are attracting attention. In the ultra-large displays, it may be difficult to implement an ultra-large screen with one panel, so that a multi-display panel display device in which a plurality of display panels is disposed to be adjacent to each other is being used. Such a multi-panel display device can implement an ultra-large screen by disposing a plurality of display panels in a tile pattern. However, in the multi-panel display device, seams are formed between the adjacent display panels due to the bezel areas of the adjacent display panels. The seams can be visibly recognized by the user so that when one image is displayed on the entire screen, a sense of disconnection and awkwardness can be felt. Accordingly, the bezel area of each display panel needs to be minimized.

Further, a circuit integration degree of the display can be gradually increased so that the width of a wiring line and an interval between wiring lines are gradually reduced. Therefore, a migration phenomenon that a metal component which configures the wiring line is ionized to disperse therearound may occur, which may contribute to a short defect between wiring lines.

Accordingly, an object to be achieved by the present disclosure is to provide a display device and a multi-panel display device which have a high reliability by suppressing a migration phenomenon caused in a side line while having a narrow bezel.

An object of the present disclosure is to provide a display device which improves an adhesion between the side line and the substrate and is capable of protecting the display device from the external impact.

Objects of the present disclosure are not limited to the above-mentioned objects, and other objects, which are not mentioned above, can be clearly understood by those skilled in the art from the following descriptions.

According to an aspect of the present disclosure, a display device includes a first substrate including a display area and a non-display area which encloses the display area, a display unit disposed on an upper surface of the first substrate, a plurality of signal lines which is disposed on the upper surface of the first substrate and is electrically connected to the display unit, a plurality of link lines disposed below the first substrate, a plurality of polymer patterns which is disposed on a side surface of the first substrate and connects each signal line and each link line to each other, and a plurality of side lines which electrically connects the plurality of signal lines and the plurality of link lines and is disposed on the plurality of polymer patterns to overlap each polymer pattern.

According to another aspect of the present disclosure, a multi-panel display device includes a plurality of display devices disposed to be adjacent to each other. Each of the plurality of display devices includes a first substrate including a display area and a non-display area which encloses the display area, a display unit disposed on an upper surface of the first substrate, a plurality of signal lines which is disposed on the upper surface of the first substrate and is electrically connected to the display unit, a plurality of link lines disposed below the first substrate, a plurality of polymer patterns which is disposed on a side surface of the first substrate and connects each signal line and each link line to each other, a plurality of side lines which electrically connects the plurality of signal lines and the plurality of link lines and is disposed on the plurality of polymer patterns to overlap each polymer pattern, and a protective layer which covers the plurality of side lines and includes a black material.

Other detailed matters of the exemplary embodiments are included in the detailed description and the drawings.

According to the present disclosure, it is possible to delay the migration phenomenon while improving the adhesion of the side line. By doing this, a mechanical physical property of the side line is improved and the reliability of the display device is improved.

Further, according to the present disclosure, a bezel area of the display device is narrow, and a fine-pitch line pattern can be implemented while maintaining a high reliability.

Further, according to the present disclosure, a limitation such as a thermal damage of the display unit due to an energy which is irradiated to harden a paste for forming wiring lines during a process of forming the side lines can be solved or addressed, so as to reduce/eliminate the failure rate and improve the display quality.

The effects according to the present disclosure are not limited to the contents exemplified above, and more various effects are included in the present specification.

Advantages and characteristics of the present disclosure and a method of achieving the advantages and characteristics will be clear by referring to exemplary embodiments described below in detail together with the accompanying drawings. However, the present disclosure is not limited to the exemplary embodiments disclosed herein but will be implemented in various forms. The exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosures of the present disclosure and the scope of the present disclosure. Therefore, the present disclosure will be defined only by the scope of the appended claims.

The shapes, sizes, ratios, angles, numbers, and the like illustrated in the accompanying drawings for describing the exemplary embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Like reference numerals generally denote like elements throughout the specification. Further, in the following description of the present disclosure, a detailed explanation of known related technologies can be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. The terms such as “including,” “having,” and “consist of” used herein are generally intended to allow other components to be added unless the terms are used with the term “only”. Any references to singular can include plural unless expressly stated otherwise.

Components are interpreted to include an ordinary error range even if not expressly stated.

When the position relation between two parts is described using the terms such as “on”, “above”, “below”, and “next”, one or more parts can be positioned between the two parts unless the terms are used with the term “immediately” or “directly”.

When an element or layer is disposed “on” another element or layer, another layer or another element can be interposed directly on the other element or therebetween.

Although the terms “first”, “second”, and the like are used for describing various components, these components are not confined by these terms. These terms are merely used for distinguishing one component from the other components and may not define order. Therefore, a first component to be mentioned below can be a second component in a technical concept of the present disclosure.

Like reference numerals generally denote like elements throughout the specification.

A size and a thickness of each component illustrated in the drawing are illustrated for convenience of description, and the present disclosure is not limited to the size and the thickness of the component illustrated.

The features of various embodiments of the present disclosure can be partially or entirely adhered to or combined with each other and can be interlocked and operated in technically various ways, and the embodiments can be carried out independently of or in association with each other.

Throughout the specification, unless otherwise specified, a particle size is a particle size at a point (D50) at which an accumulated volume is 50% in an accumulative particle size distribution.

Hereinafter, the present disclosure will be described in detail with reference to the drawings.

are views for explaining a display device according to an exemplary embodiment of the present disclosure. All components of each display device according to all embodiments of the present disclosure are operatively configured and coupled.

More specifically,is a schematic cross-sectional view of a display device according to an exemplary embodiment of the present disclosure.is a schematic top view of a first substrate in a display device according to an exemplary embodiment of the present disclosure.is a side view of a display device according to an exemplary embodiment of the present disclosure.

Referring to, a display deviceaccording to the exemplary embodiment of the present disclosure includes a first substrate, a display unit, a sealant, a second substrate, a signal line, a link line, a polymer pattern, a side line, and a protective layer. Hereinafter, each component will be described in more detail.

The first substrateis a base substrate for supporting various components of the display unit. The first substratecan be formed of an insulating material. For example, the first substratecan be a glass substrate or a plastic film. The first substratecan have a flexibility so as to be bendable as needed.

In the first substrate, a display area DA and a non-display area NDA enclosing the display area DA can be defined. The display area DA is an area where images are actually displayed in the display deviceand in the display area DA, the display unitwhich will be described below is disposed. The non-display area NDA is an area where images are not actually displayed so that the non-display area NDA can be defined as an edge area of the first substratewhich encloses the display area DA.

In the non-display area NDA, various wiring lines, such as a gate line and a data line which are connected to the thin film transistor of the display unitdisposed in the display area DA, can be disposed. Further, in the non-display area NDA, a driving circuit, for example, a data driving integrated circuit chip or a gate driving integrated circuit chip can be disposed and a plurality of pads can be disposed but is not limited thereto.

A plurality of pixels PX is defined in the display area DA of the first substrate. Each of the plurality of pixels PX is an individual unit which emits light and can include red, green, and blue pixels. If necessary, a white pixel can be included. In each of the plurality of pixels PX, the display unitis formed.

The display unitdisplays images. For example, the display unitcan include an organic light emitting diode and a circuit unit for driving the organic light emitting diode. Specifically, the organic light emitting diode can include an anode, at least one organic layer, and a cathode so that electrons and holes are coupled to emit light. The organic layer includes an organic light emitting layer, and additionally, can include a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, but is not limited thereto. For example, the circuit unit can include a plurality of thin film transistors, a capacitor, and a plurality of wiring lines to drive the organic light emitting diode.

When the display deviceis driven in a top emission manner, the circuit unit is disposed on the first substrateand the organic light emitting diode can be disposed on the circuit unit. Specifically, the thin film transistor is disposed on the first substrate, a planarization layer is disposed on the thin film transistor, and the anode, the plurality of organic layers including an organic light emitting layer, and the cathode are sequentially disposed on the planarization layer to configure the display unit.

As another example, the display unitcan include a liquid crystal display element and a circuit unit. Specifically, the liquid crystal display element includes a back light and a liquid crystal layer and displays images by adjusting an optical transmittance of liquid crystals.

The second substrateis disposed on the display unitto be opposite to the first substrate. The second substrateis an encapsulation substrate which blocks moisture or air permeating from the outside and protects the display unitfrom a physical impact. For example, the second substratecan be a material selected from glass, a metal foil, and a plastic substrate, but is not limited thereto and can be an encapsulation layer formed by being coated with an organic material and/or an inorganic material.

The sealantis disposed between the first substrateand the second substratein the non-display area NDA. The sealantis disposed to enclose an outer periphery of the display unitand bonds the first substrateand the second substrate. The sealantblocks moisture and oxygen permeating from a side surface of the display unitand can be referred to as a dam. When the encapsulation layer which is formed by being coated with the organic material and/or the inorganic material is used as the second substrate, the encapsulation layer itself has adhesiveness so that the first substrateand the second substratecan be bonded to each other. Accordingly, when the second substratedoes not have a plate shape but is an encapsulation layer formed by being coated with the organic material and/or the inorganic material, the sealantcan be omitted.

The plurality of signal linesis disposed on an upper surface (also referred to as a front surface) of the first substrateand the plurality of link linesis disposed below the first substrate, e.g., on a lower surface (also referred to as a rear surface) of the first substrate. The plurality of signal linesis electrically connected to the component of the display unitto transmit a signal to the display unit. The plurality of link linesis wiring lines which connect the plurality of signal linesformed on the upper surface of the first substrateand the driving circuit.

Specifically, referring totogether, the plurality of signal linesdisposed on the upper surface of the first substratecan be a plurality of gate lines GL and a plurality of data lines DL. The plurality of gate lines GL and the plurality of data lines DL are electrically connected to the thin film transistor of the display unitdisposed in the display area DA to transmit a gate signal and a data signal.

In the meantime, the plurality of link linesdisposed on the lower surface of the first substratecan be a plurality of gate link lines and a plurality of data link lines. The plurality of gate link lines is wiring lines which connect the plurality of gate lines GL disposed on the upper surface of the first substrateand the gate driving circuit. The plurality of data link lines is wiring lines which connect the plurality of data lines DL disposed on the upper surface of the first substrateand the data driving circuit. The plurality of gate link lines and the plurality of data link lines can extend from an end of the lower surface of the first substrateto a center of the lower surface of the first substrate.

Further, on the lower surface of the first substrate, a gate driving circuit is disposed to be electrically connected to the plurality of gate link lines and a data driving circuit can be disposed to be electrically connected to the plurality of data link lines. At this time, the gate driving circuit and the data driving circuit can be formed directly on the lower surface of the first substrateand can be disposed on the lower surface of the first substratein a chip on film manner. As another example, the gate driving circuit and the data driving circuit can be connected to the printed circuit board. The printed circuit board can transmit various signals to the plurality of signal linesand the display unitformed on the first substrate.

Referring to, each of the plurality of signal linescan include a first pad unit PADand each of the plurality of link linescan include a second pad unit PAD. The first pad unit PADcan be a conductive layer extending from the plurality of signal linesand the second pad unit PADcan be a conductive layer extending from the plurality of link lines.

The plurality of polymer patternsis disposed on the side surface of the first substrate. Each polymer patternextends along the side surface of the first substrateto physically connect each signal linedisposed on the upper surface of the first substrateand each link linedisposed on the lower surface of the first substrate.

For example, one polymer patternis in contact with an end of one signal linedisposed on the upper surface of the first substrateand an end of one link linedisposed on the lower surface of the first substrate.

Further, each polymer patternis in contact with the first pad unit PADand the second pad unit PAD. For example, each polymer patternis disposed to be in contact with the side surface of the first substratecontinuously from the first pad unit PADof each signal lineto the second pad unit PADof each link line.

If necessary, each polymer patterncan be disposed to selectively cover a part of the upper surface of the first pad unit PADand a part of the lower surface of the second pad unit PAD. For example, one end of each polymer patternis in contact with the end of the first pad unit PADand a part of the upper surface of the first pad unit PADand the other end is in contact with the end of the second pad unit PADand a part of the lower surface of the second pad unit PAD.

The plurality of polymer patternscan include a first polymer pattern and a second polymer pattern. The first polymer pattern is disposed to continuously cover an end of the gate line GL formed on the upper surface of the first substrate, a side surface of the first substrate, and an end of the gate link line formed on the lower surface of the first substrate. Further, the second polymer pattern is disposed to continuously cover an end of the data line DL formed on the upper surface of the first substrate, the side surface of the first substrate, and an end of the data link line formed on the lower surface of the first substrate.