HDR OLED display power control

This application is a continuation of U.S. patent application Ser. No. 17/815,480, filed Jul. 27, 2022, the entirety of which is hereby incorporated herein by reference for all purposes.

Organic Light Emitting Diode (OLED) displays utilize arrays of OLEDs that emit light when electricity is conducted through them. OLED displays that reproduce high dynamic range (HDR) data can display images with greater brightness and dynamic range as compared to standard dynamic range (SDR) data.

According to one aspect of the present disclosure, an organic light emitting diode (OLED) display system is configured to reproduce high dynamic range (HDR) video via an OLED array in a manner that reduces power consumption. The OLED display system comprises an OLED array of OLED pixels and a power management system configured to provide power to the OLED pixels. The power management system includes at least one voltage generator that generates OLED voltages for OLED emission in the OLED array. A timing microcontroller comprises a decoder/encoder configured to receive HDR pixel data and output display pixel data. A memory stores instructions executable by the timing microcontroller to sample a sampled portion of the HDR pixel data and determine a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data. The luminance index value is used to control the at least one voltage generator.

Another aspect provides, at an organic light emitting diode (OLED) display system configured to reproduce high dynamic range (HDR) video via an OLED array, a method for reducing power consumption of the OLED display system, method comprising: receiving HDR pixel data from an HDR data source; sampling a sampled portion of the HDR pixel data; determining a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data; and using the luminance index value to control at least one voltage generator that generates OLED voltages for OLED emission in the OLED array.

Another aspect provides a computing device comprising an organic light emitting diode (OLED) display system having a default maximum luminance capability, the OLED display system configured to reproduce high dynamic range (HDR) video. The OLED display system comprises an OLED array of OLED pixels and a power management system configured to provide power to the OLED pixels, with the power management system comprising at least one voltage generator that generates OLED voltages for OLED emission in the OLED array.

A timing microcontroller comprises a decoder/encoder configured to receive HDR pixel data and output display pixel data. A memory stores instructions executable by the timing microcontroller to sample a sampled portion of the HDR pixel data, and to determine a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data. The luminance index value is used to control the at least one voltage generator in a manner that dynamically adjusts the default maximum luminance capability to a runtime maximum luminance capability that is lower than the default maximum luminance capability.

This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.

Organic Light Emitting Diode (OLED) display devices are generally configured with a peak brightness default value or setting that represents the peak brightness capability of the device. With many OLED display devices, an external source such as a graphics controller or an image data source device provides a reference brightness level to the display. In some examples an OLED display device can use this externally-provided reference level to control its default peak brightness settings.

OLED displays that reproduce high dynamic range (HDR) data can display images with greater brightness and dynamic range as compared to standard dynamic range (SDR) data. For example, some HDR OLED displays can achieve a peak brightness of between approximately 500 nits and 1000 nits. HDR data received by such displays includes luminance information. Accordingly, reference brightness levels are generally not provided by external devices to HDR reproduction systems. Instead, upon beginning HDR reproduction, OLED displays generally set their reference brightness level to the highest luminance capability of the device to ensure that it can reproduce the brightest elements of the content it will receive.

In many examples, only portions of the HDR data received by the OLED display will require the display to utilize its highest luminance capability. For example, a two-hour HDR video can contain a cumulative total of one minute of scenes requiring a luminance of 800 nits or above, while the remaining content of the video may average just 100 or 200 nits. However, to maintain the capability of displaying a peak luminance of 800 nits or greater when required, many OLED display devices continuously consume significant power, even when the display is actually displaying much dimmer content, such as 100 or 200 nits. Accordingly, significant power is dissipated in one or more parasitic circuits of the OLED pixels. Such dissipated power unnecessarily consumes power resources. Further, this power usage can negatively impact battery life in portable and other devices that rely on rechargeable power supplies.

To address one or more of these issues, examples are disclosed that relate to OLED display devices and related methods and circuits for reducing voltage levels used for OLED emission in reproducing HDR video content. Advantageously and as described in more detail below, examples of the present disclosure sample incoming HDR data at runtime to determine a luminance index value of the sampled portion. This value is then utilized to control one or more voltage generators in a manner that dynamically adjusts the default maximum luminance capability of the OLED device to a runtime maximum luminance capability that is lower than the default maximum luminance capability. In this manner and as described further below, power consumption of a parasitic circuit at each OLED node is significantly reduced, while the device's peak brightness capabilities are still available and can be utilized as needed. Additionally, configurations of the present disclosure dynamically change the dynamic range of OLED displays, thereby increasing gray levels and suppressing digital artifacts in dark images.

1 FIG. 100 104 100 104 106 108 With reference now to, an example computing devicethat includes an OLED display systemaccording to the present disclosure is provided. In some examples, the computing devicecomprises a tablet computing device, smartphone, wearable computing device, or other portable computing device. In other examples, OLED display systems of the present disclosure may be utilized in a variety of other devices, including but not limited to monitors, televisions, and automotive displays. As described further below, the OLED display systemreceives HDR pixel datafrom an external HDR data source, such as a streaming service.

104 100 112 114 112 118 120 114 104 In the present example and as described further below, the OLED display systemof computing deviceincludes a timing microcontrollerand a power management system. The timing microcontrollerincludes memoryand one or more processorsfor storing and executing instructions to control one or more voltage generators of the power management systemin a manner that optimizes and reduces power consumption of the OLED display systemwhen displaying HDR content.

100 124 104 128 129 100 100 112 8 FIG. In this example, the computing deviceincludes a batterythat stores and provides power to the OLED display system. One or more processorsserve as a platform for executing an operating system and other software stored in memoryof the computing device. Additional aspects of the computing deviceand timing microcontrollerare described in more detail below with reference to. It will also be appreciated that the foregoing example is presented for exemplary purposes only, and that a variety of other computing device configurations and architectures can utilize OLED display systems that utilize the principles of the present disclosure.

2 FIG. 112 134 134 140 106 142 104 With reference now to, the timing microcontrollerincludes an HDR pixel data to display pixel data decoder/encoder. As described in more detail below, and in one potential advantage of the present disclosure, the HDR pixel data to display pixel data decoder/encoderincludes a luminance histogram analyzerthat generates a luminance histogram of sampled portions of the HDR pixel data, and determines a luminance index valuefrom the luminance histogram. Advantageously, and as described further below, by dynamically determining a luminance index value at runtime for each sampled portion of HDR pixel data, configurations of the present disclosure can utilize this real time luminance data to reduce power consumption of the OLED display system.

134 106 140 The HDR pixel data to display pixel data decoder/encoderincludes an HDR Electro-Optical Transfer Function (EOTF) decoder that transfers the electronic signal of the HDR pixel datainto an optical signal to linearize the HDR pixel data. Linearized HDR pixel data represents luminance data as well as color chromaticity data in a linear scale. Portions of the linearized HDR pixel data are then sampled by the luminance histogram analyzerover a sampling window (e.g., sampling rate). In one example, a sampled portion of the HDR pixel data corresponds to a sampling of one frame of HDR pixel data. In other examples, other sampling windows can be utilized. For example, sampled portions of the HDR pixel data may be captured over sampling windows of between one frame and 240 frames of the HDR pixel data. In some examples, HDR pixel data from multiple frames of a sampling window are averaged to generate an average HDR pixel data for the sampling window.

106 140 140 146 140 146 142 104 142 104 Using the sampled portion of the HDR pixel data, the luminance histogram analyzergenerates a luminance histogram of the sampled portion. Using this luminance histogram, the luminance histogram analyzerdetermines a reference white level(e.g., maximum luminance level) for the sampled portion of HDR pixel data. Additionally, and as described in more detail below, the luminance histogram analyzerconverts the reference white levelto a luminance index value, which represents a domestic relative luminance value for the particular OLED display system. Advantageously and as described further below, the luminance index valueis propagated to one or more voltage generators that utilize this value to dynamically adjust a maximum luminance capability of the OLED display systemand thereby reduce power consumption of the display system.

150 152 146 146 140 152 104 146 152 156 154 Once a luminance histogram has been generated, an HDR to Display Color Space Converterconverts the linearized HDR pixel data to display pixel data via a color transform matrix. In different examples, the color transform matrix can be a 3×3 matrix, a 3-dimensional Look-Up-Table, or other configuration. The linearized display pixel data is then scaled by a luminance scalerutilizing the reference white level. In some examples, the reference white levelextracted by the luminance histogram analyzercan be utilized by the luminance scalerto dynamically change the dynamic range of the OLED display systemand increase available gray levels. For example, the reference white levelcan be utilized to increase the number of gray levels used to display dark portions of content and to suppress digital artifacts in dark images. Once the linearized display pixel data is scaled by luminance scaler, the scaled linearized display pixel data is then coded back to non-linear display pixel databy a Display Opto-Electric Transfer Function (OETF).

3 FIG. 104 130 134 130 106 160 162 164 166 With reference now to, a schematic diagram of an example logical signal architecture that may be utilized by OLED display systemwill now be described. As noted above, timing microcontrollerincludes the HDR pixel data to display pixel data decoder/encoderdescribed above. In this example, the timing microcontrollerreceives multiple inputs, including the HDR pixel data, a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a clock signal. In different examples, these signals are encoded by various high-speed differential signal standards, such as a Display Port (DP) signal, embedded DP signal, High-Definition Media Interface (HDMI) signal, or Display Serial Interface (DSI) signal.

130 156 134 130 170 172 176 178 180 104 130 182 184 188 190 180 130 192 194 196 198 180 3 FIG. The timing microcontrolleroutputs the nonlinear display pixel datagenerated by the HDR pixel data to display pixel data decoder/encoder. The timing microcontrolleralso outputs a variety of other signals, including sample line selector (scan) clockand its shift register start pulseto a first level shifterthat is communicatively coupled to row sample selectorsfor the OLED arrayof the OLED display system. The timing microcontrolleralso outputs a Pulse Width Modulation (PWM) scan clocksignal and its PWM width pulseto a second level shifterthat is communicatively coupled to row PWM driversfor the OLED array. The timing microcontrolleralso outputs pixel sample clock, pixel sample start pulse, and column driver output enablesignals to the column drivers. Additionally, and as indicated in, the OLED arraycomprises a plurality of OLEDs arranged in X columns (from Line 0 to Line X−1) and Y rows (from Line 0 to Line Y−1).

142 140 130 104 142 140 130 180 142 202 206 202 206 210 180 4 FIG. 5 FIG. As noted above and in different examples, the luminance index valuegenerated by the luminance histogram analyzerof the timing microcontrolleris utilized to control one or more voltage generators of the OLED display system. With reference now to, in one example the luminance index valuegenerated by the luminance histogram analyzerof the timing microcontrolleris provided to and utilized by two voltage converters for each OLED node in the OLED array. More particularly, in this example the luminance index valueis provided to a pixel DAC reference voltage generatorand to an electroluminescent (EL) cathode bias voltage generatorfor each OLED node. In the present example and with reference now toand described further below, the pixel DAC reference voltage generatorsand EL cathode bias voltage generatorsare located in a power management integrated circuitof a power management system that distributes power to the OLED array.

4 FIG. 5 FIG. 202 142 208 198 180 202 142 208 With reference again to, the pixel DAC reference voltage generatoruses the luminance index valueto generate a pixel DAC reference voltage Vreffor the column driversof the OLED array(see also). In the present example, the pixel DAC reference voltage generatoruses the luminance index valueto select the pixel DAC reference voltage Vreffrom a first pre-set look up table (LUT) of pixel DAC reference voltages.

206 142 212 206 142 212 5 FIG. In a similar manner, the EL cathode bias voltage generatoruses the luminance index valueto generate an EL cathode bias voltage ELVSSfor the cathode side of the OLED node (see also). In the present example, the EL cathode bias voltage generatoruses the luminance index valueto select the EL cathode bias voltage ELVSSfrom a second pre-set LUT of EL cathode bias voltages.

142 In this manner, as described in more detail below and in one potential advantage of the present disclosure, by utilizing the dynamically determined luminance index valueof each sampled portion of HDR data, which corresponds to the maximum luminance level of such sampled portion, configurations of the present disclosure control these voltage generators in a manner that dynamically adjusts the default maximum luminance capability of the OLED device to a runtime maximum luminance capability that is lower than the default maximum luminance capability. Accordingly, power consumption at each OLED node is significantly reduced.

5 FIG. 210 142 134 202 206 210 216 220 210 212 206 224 180 210 228 230 190 208 198 210 234 236 198 210 240 242 178 With reference now to, the power management ICreceives the luminance index valuefrom the HDR pixel data to display pixel data decoder/convertor, and the pixel DAC reference voltage generatorand EL cathode bias voltage generatoruse the luminance index value to generate voltages as described above. The power management ICis connected to groundand receives voltage VCCfrom a power source. In different examples the power management ICmay use a plurality of different power source levels in order to optimize DC/DC efficiency. The power management IC outputs EL cathode bias voltages ELVSS(from EL cathode bias voltage generator) and ELVDDvoltages to the OLED nodes in OLED array. The power management ICalso outputs unselected voltage levelsand selected voltage levelsto the row PWM drivers, and delivers the pixel DAC reference voltages Vrefto the column drivers. The power management ICprovides logic powerand groundto the column drivers. The power management ICalso outputs unselected voltage levelsand selected voltage levelsto the row sample selectors.

6 FIG. 6 FIG. 6 FIG. 180 With reference now to, an exemplary circuit of one OLED node of the OLED arrayis illustrated. It will be appreciated that the circuit ofis one example of a circuit that can implement aspects of the present disclosure, and that many other variations are possible. For example, while the circuit ofutilizes three transistors, other configurations of the present disclosure can utilize circuits having four or more transistors and/or other components.

250 198 156 208 202 250 208 254 178 254 258 254 In this example, a column (i) DACof the column driversreceives display pixel datacorresponding to OLED pixel (i, j) and pixel DAC reference voltages Vreffrom pixel DAC reference voltage generator. The column (i) DACuses the pixel DAC reference voltages Vrefto generate a column (i) DAC bias voltage for driving a level sample transistor. When row (j) line is selected by row (j) sample selector, the level sample transistorbecomes conductive and the column (i) DAC bias voltage is held by a level hold capacitor. When row (j) line is unselected, the level sample transistorbecomes non-conductive and the column DAC bias voltage is retained until the next sample and column DAC bias voltage are received.

6 FIG. 262 212 206 264 264 224 212 190 268 264 With continued reference to, in this example the column DAC bias voltage determines the impedance of the drive transistor. As described above, the EL cathode bias voltage ELVSSis generated by the EL cathode bias voltage generatorfor the cathode side of the OLED. Driving current to OLEDis induced accordingly from ELVDDto ELVSSto cause OLED emission. In this example, row (j) PWM drivercontrols a PWM switching transistorto modulate the induced current and enable finer variations of illumination of OLED.

208 212 254 262 262 212 224 262 6 FIG. In one potential advantage of the present disclosure, by utilizing a pixel DAC reference voltage Vrefand EL cathode bias voltage ELVSSthat are dynamically-determined for a given sampled portion of the HDR pixel data, a column (i) DAC bias voltage is generated for driving the level sample transistorand drive transistorin a manner that dynamically controls the luminance capability of the OLED based on an actual maximum content luminance required for the sampled portion of HDR pixel data. In the example circuit ofand as noted above, the impedance of the drive transistoris determined by this column (i) DAC bias voltage, and thereby is utilized to dynamically reduce power dissipated by the parasitic circuit as described further below. In this manner, for each sampled portion of the HDR pixel data, the EL cathode bias voltage ELVSSis closer to ELVDDvoltage, thereby reducing the voltage drop across the drive transistorand correspondingly reducing power dissipated by the parasitic circuit, as compared to utilizing a default maximum luminance capability that is equal to or approaching the actual maximum luminance capability of the OLED display system. Accordingly, power consumption at each OLED node is significantly reduced as compared to systems that utilize a static default maximum luminance.

6 FIG. 142 202 206 262 For example, in one prophetic example of a use-case scenario, the OLED node ofhas a default maximum luminance capability of 1000 nits. A sampled portion of the HDR pixel data requires a peak luminance of just 200 nits. By determining a luminance index valueof the sampled portion of HDR pixel data that corresponds to the actual peak luminance of 200 nits, the OLED display system utilizes the luminance index value to control the pixel DAC reference voltage generatorand the EL cathode bias voltage generatorin a manner that dynamically adjusts the default maximum luminance capability to a runtime maximum luminance capability of approximately 200 nits. Accordingly, the voltage drop across the drive transistorand corresponding parasitic circuit power consumption are significantly reduced as compared to utilizing voltages to maintain the default maximum luminance capability of 1000 nits.

180 208 212 In this manner, each OLED node of the OLED arrayutilizes pixel DAC reference voltages Vrefand EL cathode bias voltages ELVSSthat correspond to luminance index values to continuously and dynamically adjust a default maximum luminance capability to a runtime maximum luminance capability for each sampling window of HDR pixel data.

7 7 FIGS.A-B 1 6 8 FIGS.-and 1 FIG. 300 300 300 100 300 With reference now to, a flow diagram is provided depicting an example methodfor reducing power consumption of an OLED display system configured to reproduce HDR video via an OLED array. The following description of methodis provided with reference to the systems, computing devices, and components described herein and shown in. In some examples, the methodis performed at the computing deviceof. In other examples, the methodis performed in other contexts using other suitable components.

304 300 308 300 312 300 316 300 320 300 324 300 7 FIG.A Atof, the methodincludes receiving HDR pixel data from an HDR data source. Atthe methodincludes sampling a sampled portion of the HDR pixel data. Atthe methodincludes determining a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data. Atthe methodincludes using the luminance index value to control at least one voltage generator that generates OLED voltages for OLED emission in the OLED array. Atthe methodincludes wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator that generates a pixel DAC reference voltage. Atthe methodincludes using the luminance index value to select the pixel DAC reference voltage from a pre-set table of pixel DAC reference voltages.

7 FIG.B 328 300 332 300 336 300 340 300 344 300 With reference now to, atthe methodincludes providing the pixel DAC reference voltage to a column DAC of a column driver for the OLED array. Atthe methodincludes wherein the column DAC utilizes the pixel DAC reference voltage to generate a Column DAC bias voltage that determines an impedance of a drive transistor for a selected OLED pixel of the OLED array. Atthe methodincludes wherein the at least one voltage generator comprises an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage. Atthe methodincludes using the luminance index value to select the EL cathode bias voltage from a pre-set table of EL cathode bias voltages. Atthe methodincludes wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator that generates a pixel DAC reference voltage and an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage, the method comprising using the luminance index value to control the pixel digital-to-analog converter (DAC) reference voltage generator and the EL cathode bias voltage generator.

In some embodiments, the methods and processes described herein may be tied to a computing system of one or more computing devices. In particular, such methods and processes may be implemented as a computer-application program or service, an application-programming interface (API), a library, and/or other computer-program product.

8 FIG. 7 7 FIGS.A-B 400 400 300 schematically shows a non-limiting embodiment of a computing systemthat can enact one or more of the examples described above. For example, computing systemcan be used to execute instructions to perform the methodofand/or potentially perform other functions.

400 400 100 400 1 FIG. Computing systemis shown in simplified form. Computing systemcan take the form of one or more personal computers, server computers, tablet computers, network computing devices, mobile computing devices, mobile communication devices (e.g., smart phone), wearable computing devices, and/or other computing devices. In some examples, the computing deviceofcomprises one or more aspects of the computing system.

400 402 404 406 400 408 410 8 FIG. Computing systemincludes a logic subsystem, a storage subsystem, and a display subsystem. Computing systemcan optionally include an input subsystem, a communication subsystem, and/or other components not shown in.

402 402 402 300 7 7 FIGS.A-B Logic subsystemincludes one or more physical devices configured to execute instructions. For example, logic subsystemcan be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions can be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise arrive at a desired result. For example, logic subsystemcan be used to execute instructions to perform the methodof.

402 402 402 402 402 Logic subsystemcan include one or more processors and/or microcontrollers configured to execute software instructions. Additionally or alternatively, logic subsystemcan include one or more hardware or firmware logic machines configured to execute hardware or firmware instructions. Processors and microcontrollers of logic subsystemcan be single-core or multi-core, and the instructions executed thereon can be configured for sequential, parallel, and/or distributed processing. Individual components of logic subsystemoptionally can be distributed among two or more separate devices, which can be remotely located and/or configured for coordinated processing. Aspects of logic subsystemcan be virtualized and executed by remotely accessible, networked computing devices configured in a cloud-computing configuration.

404 402 404 300 404 7 7 FIGS.A-B Storage subsystemincludes one or more physical devices configured to hold instructions executable by logic subsystemto implement the methods and processes described herein. For example, storage subsystemcan hold instructions executable to perform the methodof, and/or potentially perform other functions. When such methods and processes are implemented, the state of storage subsystemcan be transformed—e.g., to hold different data.

404 404 404 Storage subsystemcan include removable and/or built-in devices. Storage subsystemcan include optical memory (e.g., CD, DVD, HD-DVD, Blu-Ray Disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and/or magnetic memory (e.g., hard-disk drive, floppy-disk drive, tape drive, MRAM, etc.), among others. Storage subsystemcan include volatile, nonvolatile, dynamic, static, read/write, read-only, random-access, sequential-access, location-addressable, file-addressable, and/or content-addressable devices.

404 It will be appreciated that storage subsystemincludes one or more physical devices. However, aspects of the instructions described herein alternatively may be propagated by a communication medium (e.g., an electromagnetic signal, an optical signal, etc.) that is not held by a physical device for a finite duration.

402 404 Aspects of logic subsystemand storage subsystemcan be integrated together into one or more hardware-logic components. Such hardware-logic components can include field-programmable gate arrays (FPGAs), program- and application-specific integrated circuits (PASIC/ASICs), program- and application-specific standard products (PSSP/ASSPs), SoCs, and complex programmable logic devices (CPLDs), for example.

400 402 404 The terms “program” and “application” may be used to describe an aspect of computing systemimplemented to perform a particular function. In some cases, a program or application may be instantiated via logic subsystemexecuting instructions held by storage subsystem. It will be understood that different programs and applications may be instantiated from the same service, code block, object, library, routine, API, function, etc. Likewise, the same program or application may be instantiated by different services, code blocks, objects, routines, APIs, functions, etc. The terms “program” and “application” may encompass individual or groups of executable files, data files, libraries, drivers, scripts, database records, etc.

406 404 404 406 Display subsystemcan be used to present a visual representation of data held by storage subsystem. This visual representation can take the form of images, text, a graphical user interface (GUI), or other displayed content. As the herein described methods and processes change the data held by the storage subsystem, and thus transform the state of the storage machine, the state of display subsystemcan likewise be transformed to visually represent changes in the underlying data.

406 406 104 402 404 Display subsystemcan include one or more display devices utilizing virtually any type of technology. In some examples, display subsystemcomprises the OLED display systemdescribed herein. Such display devices can be combined with logic subsystemand/or storage subsystemin a shared enclosure, or such display devices can be peripheral display devices.

408 408 408 300 When included, input subsystemcan comprise or interface with one or more user-input devices such as a keyboard, mouse, touch screen, or joystick. In some embodiments, the input subsystemcan comprise or interface with selected natural user input (NUI) componentry. Such componentry can be integrated or peripheral, and the transduction and/or processing of input actions can be handled on- or off-board. Example NUI componentry can include a microphone for speech and/or voice recognition; an infrared, color, stereoscopic, and/or depth camera for machine vision and/or gesture recognition; a head tracker, eye tracker, accelerometer, and/or gyroscope for motion detection and/or intent recognition; as well as electric-field sensing componentry for assessing brain activity. For example, input subsystemcan be configured to receive user inputs while performing the methodand/or displaying content.

410 400 410 410 400 410 300 When included, communication subsystemcan be configured to communicatively couple computing systemwith one or more other computing devices. Communication subsystemcan include wired and/or wireless communication devices compatible with one or more different communication protocols. As non-limiting examples, the communication subsystem can be configured for communication via a wireless telephone network, or a wired or wireless local- or wide-area network. In some embodiments, communication subsystemcan allow computing systemto send and/or receive messages to and/or from other devices via a network such as the Internet. For example, communication subsystemcan be used receive or send data to another computing system. As another example, communication subsystem may be used to communicate with other computing systems during execution of methodin a distributed computing environment.

The following paragraphs provide additional support for the claims of the subject application. One aspect provides an organic light emitting diode (OLED) display system configured to reproduce high dynamic range (HDR) video and reduce power consumption, the OLED display system comprising: an OLED array of OLED pixels; a power management system configured to provide power to the OLED pixels, the power management system comprising at least one voltage generator that generates OLED voltages for OLED emission in the OLED array; a timing microcontroller comprising a decoder/encoder configured to receive HDR pixel data and output display pixel data; and a memory storing instructions executable by the timing microcontroller to: sample a sampled portion of the HDR pixel data; determine a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data; and use the luminance index value to control the at least one voltage generator. The OLED display system may additionally or alternatively include instructions executable to cause a luminance histogram analyzer of the decoder/encoder to (1) generate a luminance histogram of the sampled portion of the HDR pixel data and (2) determine the luminance index value from analyzing the luminance histogram. The OLED display system may additionally or alternatively include, wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator, and the pixel DAC reference voltage generator uses the luminance index value to generate a pixel DAC reference voltage. The OLED display system may additionally or alternatively include instructions executable to use the luminance index value to select the pixel DAC reference voltage from a pre-set table of pixel DAC reference voltages. The OLED display system may additionally or alternatively include instructions executable to provide the pixel DAC reference voltage to a column DAC of a column driver for the OLED array. The OLED display system may additionally or alternatively include, wherein the column DAC utilizes the pixel DAC reference voltage to generate a Column DAC bias voltage, and the Column DAC bias voltage determines an impedance of a drive transistor for a selected OLED pixel of the OLED array. The OLED display system may additionally or alternatively include, wherein the at least one voltage generator comprises an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage. The OLED display system may additionally or alternatively include instructions executable to use the luminance index value to select the EL cathode bias voltage from a pre-set table of EL cathode bias voltages. The OLED display system may additionally or alternatively include providing the EL cathode bias voltage to a cathode of a selected OLED pixel of the OLED array. The OLED display system may additionally or alternatively include, wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator that generates a pixel DAC reference voltage and an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage, and the instructions are executable to use the luminance index value to control the pixel digital-to-analog converter (DAC) reference voltage generator and the electroluminescent (EL) cathode bias voltage generator. The OLED display system may additionally or alternatively include instructions executable to sample the sampled portion of the HDR pixel data over a sampling window of between one frame and 240 frames of the HDR pixel data.

Another aspect provides, at an organic light emitting diode (OLED) display system configured to reproduce high dynamic range (HDR) video via an OLED array, a method for reducing power consumption of the OLED display system, the method comprising: receiving HDR pixel data from an HDR data source; sampling a sampled portion of the HDR pixel data; determining a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data; and using the luminance index value to control at least one voltage generator that generates OLED voltages for OLED emission in the OLED array. The method may additionally or alternatively include, wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator that generates a pixel DAC reference voltage. The method may additionally or alternatively include using the luminance index value to select the pixel DAC reference voltage from a pre-set table of pixel DAC reference voltages. The method may additionally or alternatively include providing the pixel DAC reference voltage to a column DAC of a column driver for the OLED array. The method may additionally or alternatively include, wherein the column DAC utilizes the pixel DAC reference voltage to generate a Column DAC bias voltage that determines an impedance of a drive transistor for a selected OLED pixel of the OLED array. The method may additionally or alternatively include, wherein the at least one voltage generator comprises an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage. The method may additionally or alternatively include using the luminance index value to select the EL cathode bias voltage from a pre-set table of EL cathode bias voltages. The method may additionally or alternatively include, wherein the at least one voltage generator comprises a pixel digital-to-analog converter (DAC) reference voltage generator that generates a pixel DAC reference voltage and an electroluminescent (EL) cathode bias voltage generator that generates an EL cathode bias voltage, the method comprising using the luminance index value to control the pixel digital-to-analog converter (DAC) reference voltage generator and the EL cathode bias voltage generator.

Another aspect provides a computing device comprising an organic light emitting diode (OLED) display system having a default maximum luminance capability, the OLED display system configured to reproduce high dynamic range (HDR) video, the OLED display system comprising: an OLED array of OLED pixels; a power management system configured to provide power to the OLED pixels, the power management system comprising at least one voltage generator that generates OLED voltages for OLED emission in the OLED array; a timing microcontroller comprising a decoder/encoder configured to receive HDR pixel data and output display pixel data; and a memory storing instructions executable by the timing microcontroller to: sample a sampled portion of the HDR pixel data; determine a luminance index value of the sampled portion of the HDR pixel data, wherein the luminance index value corresponds to a maximum luminance of the sampled portion of the HDR pixel data; and use the luminance index value to control the at least one voltage generator in a manner that dynamically adjusts the default maximum luminance capability to a runtime maximum luminance capability that is lower than the default maximum luminance capability.

It will be understood that the configurations and/or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated and/or described may be performed in the sequence illustrated and/or described, in other sequences, in parallel, or omitted. Likewise, the order of the above-described processes may be changed.

The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and/or properties disclosed herein, as well as any and all equivalents thereof.