Array substrate, manufacturing method therefor, light-emitting device, and tiled display device

The present application claims the priority of the Chinese patent application filed on Jul. 30, 2021 before the Chinese Patent Office with the application number of 202110883921.7 and the title of “ARRAY SUBSTRATE, MANUFACTURING METHOD THEREFOR, LIGHT-EMITTING DEVICE, AND TILED DISPLAY DEVICE”, which is incorporated herein in its entirety by reference.

The present application relates to the technical field of displaying, and particularly relates to an array base plate and a fabricating method thereof, a light emitting apparatus and a spliced displaying apparatus.

With the rapid development of the technique of displaying, display products of Mini LED (Mini Light Emitting Diode) and Micro LED (Micro Light Emitting Diode) have attracted broad attention. One of the advantages of the Micro/Mini LED display products is that they can realize splicing with a large area, i.e., splicing of a plurality of array base plates, thereby obtaining a display product of an extra-large size.

The embodiments of the present application employ the following technical solutions:

a device region; and a peripheral region adjacent to the device region; both of the device region and the peripheral region comprise a substrate and a reflecting layer located on the substrate; the device region further comprises an inter-layer-medium layer and a plurality of devices, and the inter-layer-medium layer is located at least between the substrate and the reflecting layer; the reflecting layer has a plurality of hollow regions in a direction perpendicular to the substrate, and the devices are located within the hollow regions; an orthographic projection on the substrate of a part of the reflecting layer that is located within the device region and an orthographic projection of the inter-layer-medium layer on the substrate partially overlap, a part of the reflecting layer that is located within the peripheral region covers a part of the substrate that is located within the peripheral region, and an outer contour of the substrate and an outer contour of the peripheral region of the array base plate are the same; and the devices include at least a light emitting device. In an aspect, there is provided an array base plate, wherein the array base plate comprises:

an orthographic projection of the first reflecting sublayer on the substrate is located within the device region and the peripheral region; an orthographic projection on the substrate of a part of the first reflecting sublayer that is located within the device region and the orthographic projection of the inter-layer-medium layer on the substrate partially overlap, and the first reflecting sublayer covers the part of the substrate that is located within the peripheral region; and an orthographic projection of the second reflecting sublayer on the substrate is located within the orthographic projection of the first reflecting sublayer on the substrate. In some embodiments of the present application, the reflecting layer comprises a first reflecting sublayer and a second reflecting sublayer, and the second reflecting sublayer is located on one side of the first reflecting sublayer that is further from the substrate;

the orthographic projection of the second reflecting sublayer on the substrate and an orthographic projection on the substrate of a part of the first reflecting sublayer that is located within the peripheral region do not overlap. In some embodiments of the present application, the orthographic projection of the second reflecting sublayer on the substrate is located within the device region; and

an orthographic projection on the substrate of a part of the second reflecting sublayer that is located within the peripheral region and an orthographic projection on the substrate of a part of the first reflecting sublayer that is located within the peripheral region overlap. In some embodiments of the present application, an orthographic projection of the second reflecting sublayer on the substrate is located within the peripheral region and the device region; and

In some embodiments of the present application, the first reflecting sublayer and the second reflecting sublayer have equal thicknesses in the direction perpendicular to the substrate.

the auxiliary reflecting part is located on the inter-layer-medium layer, and the auxiliary reflecting part is connected to the reflecting layer. In some embodiments of the present application, the array base plate further comprises an auxiliary reflecting part; and

the hollow regions expose part of area of the inter-layer-medium layer, an orthographic projection of the first reflecting part on the substrate is located within the hollow regions, and directly contacts the inter-layer-medium layer; and the second reflecting part directly contacts a surface of the reflecting layer that is further from the substrate, and an orthographic projection of the second reflecting part on the substrate overlaps with an orthographic projection of the reflecting layer on the substrate. In some embodiments of the present application, the auxiliary reflecting part comprises a first reflecting part and a second reflecting part, and the first reflecting part and the second reflecting part are of an integral structure;

In some embodiments of the present application, the array base plate further comprises a plurality of packaging units corresponding to the devices, orthographic projections of the packaging units on the substrate cover orthographic projections of the devices on the substrate, and the orthographic projections of the packaging units on the substrate partially overlap with an orthographic projection of the reflecting layer on the substrate.

the inter-layer-medium layer comprises a first insulating layer and a first planarization layer, and the first planarization layer is located at least between the first insulating layer and the reflecting layer. In some embodiments of the present application, the device region of the array base plate further comprises a buffer layer and a first electrically conductive layer that are sequentially arranged on the substrate, and the inter-layer-medium layer is located on one side of the first electrically conductive layer that is further from the substrate; and

In some embodiments of the present application, the device region of the array base plate further comprises a second electrically conductive layer, a second insulating layer, a second planarization layer and a third insulating layer that are arranged sequentially in stack on the buffer layer, and the third insulating layer is located on one side of the first electrically conductive layer that is further from the first insulating layer.

the first bonding pad is electrically connected to a first weld leg of one of the devices by the first opening, and the second bonding pad is electrically connected to a second weld leg of the device by the second opening. In some embodiments of the present application, the first electrically conductive layer comprises at least one first bonding pad and at least one second bonding pad, the inter-layer-medium layer has at least one first opening and at least one second opening in the direction perpendicular to the substrate, the first opening exposes a region where the first bonding pad is located, and the second opening exposes a region where the second bonding pad is located; and

In some embodiments of the present application, the array base plate further comprises a plurality of supporting columns, the supporting columns are located on one side of the reflecting layer that is further from the substrate, and orthographic projections of the supporting columns on the substrate and orthographic projections of the devices on the substrate do not overlap.

An embodiment of the present application further provides a light emitting apparatus, wherein the light emitting apparatus comprises the array base plate stated above.

the diffuser plate is located on a light exiting side of the array base plate. In some embodiments of the present application, the light emitting apparatus further comprises a diffuser plate, a quantum-dot film, a diffuser sheet and a composite film that are arranged sequentially in stack; and

An embodiment of the present application further provides a spliced displaying apparatus, wherein the spliced displaying apparatus comprises at least two light emitting apparatuses stated above.

array base plate, wherein the method is applied to fabricating the array base plate stated above, and the method comprises: providing a mother-board substrate, wherein the mother-board substrate is delimited into at least one device region and a cutting region adjacent to the device region; forming the inter-layer-medium layer within the device region of the mother-board substrate; forming the reflecting layer within the device region and the cutting region of the mother-board substrate, wherein the reflecting layer has a plurality of hollow regions in a direction perpendicular to the mother-board substrate; the inter-layer-medium layer is located at least between the mother-board substrate and the reflecting layer; and an orthographic projection on the mother-board substrate of the part of the reflecting layer that is located within the device region and an orthographic projection of the inter-layer-medium layer on the mother-board substrate partially overlap, and a part of the reflecting layer that is located within the cutting region covers the cutting region of the mother-board substrate; bonding the plurality of devices within the device region of the mother-board substrate, wherein the devices are located within the hollow regions; and cutting at a back side of the mother-board substrate along a cutting line, to obtain at least one instance of the array base plate, wherein the cutting line is located within the cutting region, and the back side refers to a surface of the mother-board substrate that is further from the devices. An embodiment of the present application further provides a method for fabricating an

grinding an edge of the array base plate by using a perpendicular grinding technique. In some embodiments of the present application, after the step of cutting at the back side of the mother-board substrate along the cutting line, to obtain at least one instance of the array base plate, the method further comprises:

in a direction perpendicular to the array base plate, grinding a side of the substrate and a side of the reflecting layer of the array base plate simultaneously, wherein the side of the substrate and the side of the reflecting layer are coplanar. In some embodiments of the present application, the step of grinding the edge of the array base plate by using the perpendicular grinding technique comprises:

forming a first reflecting sublayer, wherein an orthographic projection of the first reflecting sublayer on the mother-board substrate is located within the device region and the cutting region; and forming a second reflecting sublayer, wherein an orthographic projection of the second reflecting sublayer on the mother-board substrate is located within the device region; or forming a first reflecting sublayer, wherein an orthographic projection of the first reflecting sublayer on the mother-board substrate is located within the device region and the cutting region; and forming a second reflecting sublayer, wherein an orthographic projection of the second reflecting sublayer on the mother-board substrate is located within the device region and the cutting region. In some embodiments of the present application, the step of forming the reflecting layer within the device region and the cutting region of the mother-board substrate comprises:

forming an auxiliary reflecting part on the inter-layer-medium layer, wherein the auxiliary reflecting part is connected to the reflecting layer. In some embodiments of the present application, after the step of bonding the plurality of devices within the device region of the mother-board substrate, and before the step of cutting at the back side of the mother-board substrate along the cutting line, to obtain at least one instance of the array base plate, the method further comprises:

The above description is merely a summary of the technical solutions of the present application. In order to more clearly know the elements of the present application to enable the implementation according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present application more apparent and understandable, the particular embodiments of the present application are provided below.

The technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings of the embodiments of the present application. Apparently, the described embodiments are merely certain embodiments of the present application, rather than all of the embodiments. All of the other embodiments that a person skilled in the art obtains on the basis of the embodiments of the present application without paying creative work fall within the protection scope of the present application.

Unless stated otherwise in the context, throughout the description and the claims, the term “comprise” is interpreted as the meaning of opened containing, i.e., “including but not limited to”. In the description of the present disclosure, the terms “one embodiment”, “some embodiments”, “exemplary embodiments”, “example”, “specific example” or “some examples” are intended to indicate that specific features, structures, materials or characteristics related to the embodiment or example are comprised in at least one embodiment or example of the present disclosure. The illustrative indication of the above terms does not necessarily refer to the same one embodiment or example. Moreover, the specific features, structures, materials or characteristics may be comprised in any one or more embodiments or examples in any suitable manner.

In the embodiments of the present application, unless stated otherwise, the meaning of “plurality of” is “two or more”. The terms that indicate orientation or position relations, such as “upper”, are based on the orientation or position relations shown in the drawings, and are merely for conveniently describing the present application and simplifying the description, rather than indicating or implying that the component or element must have the specific orientation and be constructed and operated according to the specific orientation. Therefore, they should not be construed as a limitation on the present application.

In order to facilitate the clear description on the technical solutions of the embodiments of the present application, in the embodiments of the present application, terms such as “first” and “second” are used to distinguish identical items or similar items that have substantially the same functions and effects, and a person skilled in the art can understand that the terms such as “first” and “second” do not limit the quantity.

The exemplary embodiments are described herein with reference to sectional views and/or plan views as idealized illustrative figures. In the drawings, in order for clarity, the thicknesses of the layers and the regions are exaggerated. Therefore, alterations from the shapes of the figures as the result of, for example, fabricating techniques and/or tolerances can be envisaged. Therefore, the exemplary embodiments should not be interpreted as limited to the shapes of the regions shown herein, but should include the shape deviations caused by, for example, fabrication. For example, an etching region illustrated as rectangular generally has a curved feature. Therefore, the regions shown in the drawings are essentially illustrative, and their shapes are not intended to illustrate the practical shapes of the regions of the device, and are not intended to limit the scopes of the exemplary embodiments.

1 a FIG. 2 a, 2 d FIG. 1 20 1 a device region A; and a peripheral region B adjacent to the device region A shown in. Both of the device region A and the peripheral region B comprise a substrateand a reflecting layerlocated on the substrate. An embodiment of the present application provides an array base plate. Referring toorthe array base plate comprises:

30 12 30 1 20 20 1 12 The device region A further comprises an inter-layer-medium layerand a plurality of devices, and the inter-layer-medium layeris located at least between the substrateand the reflecting layer. The reflecting layerhas a plurality of hollow regions L in the direction perpendicular to the substrate, and the devicesare located within the hollow regions L.

1 20 30 1 20 1 1 An orthographic projection on the substrateof a part of the reflecting layerthat is located within the device region A and an orthographic projection of the inter-layer-medium layeron the substratepartially overlap, a part of the reflecting layerthat is located within the peripheral region B covers a part of the substratethat is located within the peripheral region B, and the outer contour of the substrateand the outer contour of the peripheral region B of the array base plate are the same.

12 12 Multiple types of devicesarranged in an array are provided within the device region A of the array base plate. The devicesinclude at least a light emitting device, and may further include any one of sensing devices, minisized driving chips and other types of devices. It can be understood that the different types of devices have unequal quantities, or the different types of devices have unequal densities of the array arrangement.

The peripheral region B refers to the region between the device region A and the boundary of the array base plate. In the practical production process, a plurality of array base plates are formed by cutting a mother board; in other words, the size of the peripheral region B may be decided according to the practical cutting process.

It should be noted that the width of the peripheral region B refers to the spacing between the boundary of the array base plate and the device region A. The value range of the widths at the positions of the peripheral region B is 0.2 mm-2 mm. For example, they may be 0.2 mm, 1 mm, 1.2 mm, 1.5 mm or 2 mm.

1 a FIG. 2 a, In the array base plate, referring toorif the bonding region is not taken into consideration, the region other than the peripheral region B is the device region A.

12 1 1 Regarding any one of the devicesthat is closest to the boundary of the array base plate, the range of the distance between the geometric center of its orthographic projection on the substrateand the edge of the array base plate (the outer contour of the peripheral region B) in the direction parallel to the plane where the substrateis located is 1 mm-5 mm. For example, the distance may be 1 mm, 1.2 mm, 1.5 mm, 2 mm, 3 mm, 4 mm and 5 mm.

2 d FIG. 1 12 1 12 As an example, referring to, the distance between the geometric center of the orthographic projection on the substrateof the devicelocated at the top left corner of the array base plate and the edge of the array base plate in the direction X is 4 mm, and the distance between the outer contour of the device region A and the outer contour of the peripheral region B in the direction X is 0.7 mm. The distance between the geometric center of the orthographic projection on the substrateof the devicelocated at the top left corner of the array base plate and the edge of the array base plate in the direction Y is 2 mm or 3 mm, and the distance between the outer contour of the device region A and the outer contour of the peripheral region B in the direction Y is 0.7 mm. In other words, all of the devices on the array base plate are located within the area where the device region A is located.

1 The substratemay be a rigid substrate. The material of the rigid substrate may be any one of glass, quartz, PET, plastic and so on. The thickness of the rigid substrate may be 0.2 mm-1 mm. As an example, the thickness of the rigid substrate is 0.2 mm, 0.4 mm, 0.5 mm, 0.7 mm or 1 mm.

The light emitting device may be a Mini Light Emitting Diode (abbreviated as Mini LED) or Micro Light Emitting Diode (abbreviated as Micro LED), which is not limited herein.

12 12 As an example, all of the plurality of devicesmay be Mini Light Emitting Diodes or Micro Light Emitting Diodes that emit a blue light. Alternatively, the plurality of devicesmay include all of three types of light emitting diodes or Micro Light Emitting Diodes emitting a red light, emitting a green light and emitting a blue light.

20 Because the light rays emitted by the light emitting devices are emitted to the periphery, the reflecting layercan reflect the light rays emitted by the light emitting devices to the light-exiting surface of the array base plate, to increase the light utilization ratio of the light emitting devices.

20 20 As an example, the color of the reflecting layeris the white color, so that the reflecting layerhas a high reflectivity.

20 20 In some embodiments, the reflecting layermay be of a sheet-like structure having a plurality of hollow regions L. Alternatively, the reflecting layermay also be fabricated on the array base plate by sputtering, film coating, spread coating and so on.

20 2 As an example, the material of the reflecting layermay comprise a white ink. The components of the white ink include a resin (for example, an epoxy resin and a polytetrafluoroethylene resin), titanium dioxide (with the chemical formula of TiO), an organic solvent (for example, dipropylene glycol methyl ether) and so on.

20 20 20 20 The material of the reflecting layermay also comprise a silicon-based white glue. When the material of the reflecting layercomprises the white ink or comprises the silicon-based white glue, the reflecting layermay be formed by printing by using a screen-printing process, or the reflecting layermay be formed by ejection and spread coating by using a rubber-valve spray-coating process.

2 b FIG. 1 20 30 20 30 As an example, referring to, the range of the distance Tbetween the surface of the reflecting layerthat contacts the inter-layer-medium layerand the surface of the reflecting layerthat is further from the inter-layer-medium layermay be 10 μm-300 μm. For example, the thickness may be 10 μm, 50 μm, 55 μm, 60 μm, 80 μm, 155 μm, 200 μm or 300 μm.

20 As an example, the reflecting layermay be formed by one time or multiple times of screen printing.

20 20 If the reflecting layeris fabricated by multiple times of screen printing, the part of the reflecting layerthat is located at the edges of the hollow region L may be of a step shape.

1 As an example, the shape of the orthographic projection of the hollow region L on the substratemay be a circle, a triangle, a rectangle and so on.

1 20 12 20 12 The part of an electrically conductive pattern on the substratethat is exposed by the hollow region L on the reflecting layeris used to be connected to the device, and the part of the electrically conductive pattern that is covered by the reflecting layeris used to be connected to an external signal-source circuit, so as to receive and transmit an electric signal from and to the device.

30 1 20 12 30 1 20 71 72 30 30 1 12 1 FIG. a, That the inter-layer-medium layeris located at least between the substrateand the reflecting layermeans that, referring towithin the region of the array base plate where no deviceis provided, the inter-layer-medium layeris located between the substrateand the reflecting layer, and within the hollow region L, part of the region between the electrically conductive patterns (for example, between the electrically conductive bonding pads,) is provided with part of the inter-layer-medium layer, and that part of the inter-layer-medium layeris located between the substrateand the device.

1 FIG. a, 30 1 2 1 1 1 2 1 Referring tothe inter-layer-medium layerhas at least one first opening Kand at least one second opening Kin the direction perpendicular to the substrate. The orthographic projections on the substrateof the first opening Kand/or the second opening Kare located within the area of the orthographic projection of the hollow region L on the substrate.

1 30 1 2 30 1 12 The first openings Kin the inter-layer-medium layerexpose part of the electrically conductive pattern provided on the substrate, and the second openings Kin the inter-layer-medium layerexpose the other part of the electrically conductive pattern provided on the substrate, whereby the deviceis connected to the electrically conductive pattern, and the electrically conductive pattern is connected to the external signal-source circuit so as to receive an electric signal.

20 2 20 1 a FIG. a, In some embodiments, both of the device region A and the peripheral region B are provided with the reflecting layer. As an example, referring toorthe orthographic projection of the reflecting layeron the array base plate does not overlap with the hollow region L.

20 30 1 20 20 1 30 1 As an example, the part of the reflecting layerthat is provided within the device region A is located on the side of the inter-layer-medium layerthat is further from the substrate, and, according to the difference in the materials and/or the fabricating processes of the reflecting layer, the orthographic projection of the reflecting layeron the substrateand the orthographic projection of the inter-layer-medium layeron the substratehave different cases of overlapping.

20 20 30 20 For example, if the reflecting layeris fabricated by multiple times of screen printing, the boundaries of the reflecting layerthat are located within the hollow region L are of a step shape, and the part of the inter-layer-medium layerthat is located within the hollow region L is not covered by the reflecting layer.

3 FIG. 3 FIG. 3 FIG. 20 1 20 1 12 20 shows a schematic structural diagram of an array base plate in which the reflecting layeris not provided within the peripheral region B of the substrate. Referring to, the reflecting layercovers nearly all of the areas of the device region A of the array base plate other than the hollow region L, but does not cover the peripheral region B of the substrate. When the array base plate shown inis emitting light, the peripheral region B has no device, and has no reflecting layerto reflect light rays, so as to present a relatively dark visual effect, i.e., a poor effect of light emission.

1 a FIG. 2 a FIG. 1 20 1 20 1 20 1 In the array base plate shown inoraccording to the embodiments of the present application, because the outer contour of the peripheral region B of the array base plate is exactly the outer contour of the substrate, and the part of the reflecting layerthat is located within the peripheral region B covers the peripheral region B of the substrate, the part of the reflecting layerthat is located within the peripheral region B can extend to the outer contour of the substrate. Therefore, when the array base plate is emitting light, the reflecting layerwithin the peripheral region B can reflect the light rays that are emitted by the device region A and enter its surface, which ameliorates to a large extent the problem of a high difference in the optical brightnesses of the peripheral region B and the device region A of the array base plate, and can increase the light-emission amount of the array base plate in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the array base plate.

1 a FIG. 2 a FIG. 20 10 11 11 10 1 10 1 In some embodiments of the present application, referring toor, the reflecting layercomprises a first reflecting sublayerand a second reflecting sublayer, and the second reflecting sublayeris located on the side of the first reflecting sublayerthat is further from the substrate. An orthographic projection of the first reflecting sublayeron the substrateis located within the device region A and the peripheral region B.

1 10 30 1 10 1 An orthographic projection on the substrateof a part of the first reflecting sublayerthat is located within the device region A and the orthographic projection of the inter-layer-medium layeron the substratepartially overlap, and the first reflecting sublayerfurther covers the substratewithin the peripheral region B.

11 1 10 1 An orthographic projection of the second reflecting sublayeron the substrateis located within the orthographic projection of the first reflecting sublayeron the substrate.

1 FIG. a, 30 12 1 20 30 12 20 20 1 30 1 In some embodiments, referring topart of the inter-layer-medium layerbetween the deviceand the substrateis not required to be provided with the reflecting layer, and the inter-layer-medium layeroutside the region where the deviceis located is provided with the reflecting layer, whereby the orthographic projection of the reflecting layeron the substrateand the orthographic projection of the inter-layer-medium layeron the substratepartially overlap.

1 10 30 1 10 20 10 12 10 30 12 1 1 FIG. a. In some embodiments, an orthographic projection on the substrateof a part of the first reflecting sublayerthat is located within the device region A and the orthographic projection of the inter-layer-medium layeron the substratepartially overlap. However, in the practical fabricating process, because of the process errors, in part of the region of the array base plate, the first reflecting sublayerin the reflecting layermay extend in the direction from the first reflecting sublayerpointing to the device, so that the first reflecting sublayercovers the part of the inter-layer-medium layerthat is located within the hollow region L and does not overlap with the orthographic projection of the deviceon the substrateshown in

11 1 10 1 In some embodiments, an orthographic projection of the second reflecting sublayeron the substrateis located within the orthographic projection of the first reflecting sublayeron the substrate.

1 FIG. a, 11 1 1 11 1 10 1 11 1 10 As an example, referring tothe orthographic projection of the second reflecting sublayeron the substrateis located within the device region A and the peripheral region B, the orthographic projection on the substrateof the part of the second reflecting sublayerthat is provided within the device region A is located within the orthographic projection on the substrateof the part of the first reflecting sublayerthat is provided within the device region A, and the orthographic projection on the substrateof the part of the second reflecting sublayerthat is located within the peripheral region B and the orthographic projection on the substrateof the part of the first reflecting sublayerthat is located within the peripheral region B overlap.

11 1 1 11 1 10 1 11 1 10 Alternatively, the orthographic projection of the second reflecting sublayeron the substrateis located within the device region A and the peripheral region B, the orthographic projection on the substrateof the part of the second reflecting sublayerthat is provided within the device region A is located within the orthographic projection on the substrateof the part of the first reflecting sublayerthat is provided within the device region A, and the orthographic projection on the substrateof the part of the second reflecting sublayerthat is provided within the peripheral region B is located within the orthographic projection on the substrateof the part of the first reflecting sublayerthat is provided within the peripheral region B.

2 a FIG. 11 1 11 11 1 1 10 Alternatively, referring to, the orthographic projection of the second reflecting sublayeron the substrateis located within the device region A, the peripheral region B is not provided with the second reflecting sublayer, and the orthographic projection of the second reflecting sublayeron the substrateis located within the orthographic projection on the substrateof the part of the first reflecting sublayerthat is provided within the device region A.

10 1 11 1 11 1 10 1 In some embodiments, the orthographic projection of the first reflecting sublayeron the substratemay be located within the orthographic projection of the second reflecting sublayeron the substrate. The figures according to the embodiments of the present application illustrate by taking the case as an example in which the orthographic projection of the second reflecting sublayeron the substrateis located within the orthographic projection of the first reflecting sublayeron the substrate.

2 a FIG. 10 1 11 1 11 1 In some embodiments, referring to, the first reflecting sublayercovers the edge of the substrate, and the second reflecting sublayercontracts inwardly toward the device region A, whereby the range of the distance Hbetween the edge of the second reflecting sublayerand the edge of the substrateis controlled to be between 0.2-2 mm.

1 11 1 1 11 1 As an example, the distance Hbetween the edge of the second reflecting sublayerand the edge of the substratemay be 0.2 mm, 0.4 mm, 0.5 mm, 0.8 mm, 1 mm, 1.5 mm, 1.8 mm or 2 mm. The particular numerical value of the distance Hbetween the edge of the second reflecting sublayerand the edge of the substratemay be decided according to the different configurations of the array base plate and according to the different fabricating processes or cutting processes of the array base plate.

2 d FIG. 2 d FIG. 2 a FIG. 2 d FIG. 2 d FIG. 2 d FIG. 2 d FIG. 1 2 12 20 10 11 20 10 11 10 1 11 1 11 1 12 In some embodiments, referring to,shows a top view of an array base plate, whereinis a cross-sectional view ofalong MM. As shown in, the plurality of devicesare arranged in an array within the device region A, the reflecting layerwithin the device region A comprises the first reflecting sublayerand the second reflecting sublayer, and the reflecting layerwithin the peripheral region B comprises the first reflecting sublayer. Inmerely the second reflecting sublayerlocated at the surface of the device region A can be seen. Moreover, the first reflecting sublayercovers the edge of the substratethat is located within the peripheral region B, and the second reflecting sublayercontracts inwardly toward the device region A, whereby the range of the distance Hbetween the edge of the second reflecting sublayerand the edge of the substrateis controlled to be between 0.2-2 mm. The devicesshown inare light emitting devices.

10 11 10 11 10 11 In some embodiments, the materials of the first reflecting sublayerand the second reflecting sublayermay be different. For example, the material of the first reflecting sublayermay comprise a white ink, and the material of the second reflecting sublayermay comprise a silicon-based white glue. Alternatively, the material of the first reflecting sublayermay comprise a white ink, and the material of the second reflecting sublayermay comprise a reflector plate.

10 11 10 11 10 11 10 11 Alternatively, the materials of the first reflecting sublayerand the second reflecting sublayermay be the same. For example, both of the materials of the first reflecting sublayerand the second reflecting sublayercomprise a white ink. When the materials of the first reflecting sublayerand the second reflecting sublayercomprise a white ink or comprise a silicon-based white glue, the first reflecting sublayerand the second reflecting sublayermay be formed by printing by using a screen-printing process.

10 1 As an example, the range of the thickness of the first reflecting sublayerin the direction perpendicular to the substratemay be 25 μm-35 μm, for example, 25 μm, 28 μm, 30 μm, 32 μm or 35 μm.

11 1 As an example, the range of the thickness of the second reflecting sublayerin the direction perpendicular to the substratemay be 25 μm-35 μm, for example, 25 μm, 28 μm, 30 μm, 32 μm or 35 μm.

2 a FIG. 11 11 1 10 1 11 20 1 10 10 1 10 1 In some embodiments of the present application, referring to, the second reflecting sublayeris located within the device region A, and the orthographic projection of the second reflecting sublayeron the substratedoes not overlap with the peripheral region B. It should be noted that, because the peripheral region B refers to the region between the device region A and the boundary of the array base plate (the cutting line) in the fabrication of the array base plate, by providing the first reflecting sublayeron the substratewithin the peripheral region B, and not providing the second reflecting sublayer, in an aspect, that can ameliorate the problem that, when the array base plate is cut from the mother board, the cutting process results in thin-film peeling of the reflecting layer. In another aspect, because the substratewithin the peripheral region B is provided with the first reflecting sublayer, and the first reflecting sublayercovers the outer contour of the substrate, when the array base plate is emitting light, the first reflecting sublayerwithin the peripheral region B can reflect the light rays emitted by the array base plate, which ameliorates the problem of a high difference in the optical brightnesses of the peripheral region B and the device region A of the array base plate, and increases to a large extent the light-emission amount of the array base plate in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the array base plate.

10 11 10 11 20 20 2 a FIG. In some embodiments, if both of the materials of the first reflecting sublayerand the second reflecting sublayercomprise a white ink and both of the ranges of the thicknesses of the first reflecting sublayerand the second reflecting sublayerare 25 -35 μm, in the array base plate shown in, the difference between the numerical values of the reflectivities to light rays of the reflecting layerwithin the device region A and the reflecting layerwithin the peripheral region B is within 5%, which does not result in an obvious optical difference between the device region A and the peripheral region B.

1 FIG. a, 1 10 11 10 11 1 10 11 10 11 1 In some embodiments of the present application, referring toboth of the orthographic projections on the substrateof the first reflecting sublayerand the second reflecting sublayerextend and cover the peripheral region B. Further, the boundaries of the first reflecting sublayerand the second reflecting sublayerand the outer contour of the substratesubstantially coincide. Therefore, when the array base plate is emitting light, the first reflecting sublayerand the second reflecting sublayerthat are within the peripheral region B can reflect the light rays emitted by the array base plate, which, by the dual effect of the first reflecting sublayerand the second reflecting sublayer, can ameliorate excellently the problem of a high difference in the optical brightnesses of the peripheral region B and the device region A of the array base plate, and increases to a large extent the light-emission amount of the array base plate in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the array base plate.

2 d FIG. 20 107 107 In some embodiments, referring to, the array base plate further comprises a bonding region D located on one side of it. The bonding region D is not provided with the reflecting layer. The bonding region D comprises a plurality of bonding-terminal groups. One end of each of the bonding-terminal groupsis used to be connected to a golden finger of an external circuit (a circuit board or an integrated circuit) to receive an electric signal, and the other end is connected to the electrically conductive pattern, for example, a signal line, on the array base plate to transmit the electric signal.

10 11 1 In some embodiments of the present application, the first reflecting sublayerand the second reflecting sublayerhave equal thicknesses in the direction perpendicular to the substrate.

10 11 1 As an example, the thicknesses of the first reflecting sublayerand the second reflecting sublayerin the direction perpendicular to the substrateare both 25 μm, or are both 30 μm, or are both 35 μm.

1 a FIG. 2 13 13 30 13 20 a, In some embodiments of the present application, referring toorthe array base plate further comprises an auxiliary reflecting part. The auxiliary reflecting partis located on the inter-layer-medium layer, and the auxiliary reflecting partis connected to the reflecting layer.

20 1 30 20 1 30 1 20 13 If the process stability is sufficiently high, within the device region A, the orthographic projection of the reflecting layeron the substratecovers the part of the inter-layer-medium layerother than the hollow region L. However, taking into consideration the process precision and the fabrication error, in the practical fabricating process, within the part of the device region A other than the hollow region L, the orthographic projection of the reflecting layeron the substratefalls within the orthographic projection of the inter-layer-medium layeron the substrate. Therefore, in order to ensure the effect of reflection, after the reflecting layerhas been provided, the auxiliary reflecting partis subsequently provided to enhance the effect of reflection.

20 20 20 30 13 30 30 20 1 1 FIG. a, In some embodiments, if the reflecting layeris fabricated by multiple times of screen printing, referring tothe reflecting layerat the edges of the hollow region L may be of a step shape, and the reflecting layeradjacent to the edges of the hollow region L exposes the part of the inter-layer-medium layerthat is located within the hollow region L. In this case, the auxiliary reflecting partmay be subsequently provided on that part of the inter-layer-medium layer, to cover part of the surface of the inter-layer-medium layerexposed by the reflecting layerat the edges of the hollow region L, so as to further increase the light-emission amount of the array base plate in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the array base plate.

13 20 In some embodiments, the provision of the auxiliary reflecting partat the side wall of the hollow region L of the reflecting layercan reduce the radial dimension of the hollow region L, and increase the size precision of the hollow region L. All of the figures are marked as the radial dimension of the hollow region L is not reduced.

2 b FIG. 2 13 30 13 30 1 20 30 20 30 In some embodiments, referring to, the distance Tbetween the surface of the auxiliary reflecting partthat contacts the inter-layer-medium layerand the surface of the auxiliary reflecting partthat is further from the inter-layer-medium layeris greater than the distance Tbetween the surface of the reflecting layerthat contacts the inter-layer-medium layerand the surface of the reflecting layerthat is further from the inter-layer-medium layer.

2 13 30 13 30 1 20 30 20 30 As an example, the range of the distance Tbetween the surface of the auxiliary reflecting partthat contacts the inter-layer-medium layerand the surface of the auxiliary reflecting partthat is further from the inter-layer-medium layermay be 50 μm-80 μm, and the range of the distance Tbetween the surface of the reflecting layerthat contacts the inter-layer-medium layerand the surface of the reflecting layerthat is further from the inter-layer-medium layermay be 30 μm-50 μm.

13 It should be noted that the auxiliary reflecting partmay be provided around the edge of the hollow region L by spray coating.

13 13 20 13 20 In some embodiments, the material of the auxiliary reflecting partcomprises a silicon-based white glue, and the color of the silicon-based white glue is the white color, whereby the color of the auxiliary reflecting partis substantially the same as the color of the reflecting layer, to ensure that the reflectivity of the auxiliary reflecting partto light rays is close to the reflectivity of the reflecting layerto light rays.

2 a FIG. 13 132 131 132 131 In some embodiments of the present application, referring to FIG. 1a or, the auxiliary reflecting partcomprises a first reflecting partand a second reflecting part, and the first reflecting partand the second reflecting partare of an integral structure.

20 30 132 1 132 30 131 20 1 131 1 20 1 The hollow region L in the reflecting layerexposes part of the area of the inter-layer-medium layer, an orthographic projection of the first reflecting parton the substrateis located within the hollow region L, and the first reflecting partdirectly contacts the inter-layer-medium layer. The second reflecting partdirectly contacts the surface of the reflecting layerthat is further from the substrate, and an orthographic projection of the second reflecting parton the substrateoverlaps with an orthographic projection of the reflecting layeron the substrate.

2 a FIG. 2 b FIG. 2 c FIG. 131 10 1 131 11 1 131 10 1 131 11 1 131 10 1 131 11 1 In some embodiments, referring to, the second reflecting partcovers the surface of part of the first reflecting sublayerthat is further from the substrate, and the second reflecting partand the second reflecting sublayerhave a gap Z therebetween in the direction parallel to the plane where the substrateis located. Alternatively, referring to, the second reflecting partcovers the surface of part of the first reflecting sublayerthat is further from the substrate, and the second reflecting partis connected to the second reflecting sublayerin the direction parallel to the plane where the substrateis located. Alternatively, referring to, the second reflecting partcovers the surface of part of the first reflecting sublayerthat is further from the substrate, and the second reflecting partalso covers the surface of part of the second reflecting sublayerthat is further from the substrate.

2 a FIG. 14 12 14 1 12 1 14 1 1 In some embodiments of the present application, referring to FIG. 1a or, the array base plate further comprises a plurality of packaging unitscorresponding to the devices, the orthographic projections of the packaging unitson the substratecover the orthographic projections of the deviceson the substrate, and the orthographic projections of the packaging unitson the substratepartially overlap with an orthographic projection of the reflecting layer on the substrate.

2 a FIG. 14 12 14 12 1 12 As an example, as shown in FIG. 1a or, each of the packaging unitswraps one of the devices. The packaging unitsdo not only serve to package and protect the devices, but also, by being configured to have a shape far from the surface of the substrate, for example, being configured to have a surface like a convex lens, can further adjust the light exiting angles of the light emitting devices included in the devices.

12 1 12 In some embodiments, the array base plate may further comprise a packaging layer provided on the side of the devicethat is further from the substrate, to protect the device.

12 As an example, the packaging layer may cover the plurality of devicesas a whole layer.

4 FIG. 4 FIG. 2 7 1 30 7 1 30 8 9 9 8 20 shows a schematic structural diagram of the device region A of the array base plate. Referring to, the device region A of the array base plate comprises a buffer layerand a first electrically conductive layerthat are sequentially arranged on the substrate, and the inter-layer-medium layeris located on the side of the first electrically conductive layerthat is further from the substrate. The inter-layer-medium layercomprises a first insulating layerand a first planarization layer, and the first planarization layeris located at least between the first insulating layerand the reflecting layer.

7 The first electrically conductive layeris used to form the electrically conductive pattern.

4 FIG. 7 7 8 73 7 8 1 12 73 12 As an example, referring to, the array base plate is provided with the first electrically conductive layer. The part of the first electrically conductive layerthat is covered by the first insulating layerforms a tracein the electrically conductive pattern, to be used to transmit an electric signal. Moreover, the part of the first electrically conductive layerthat is not covered by the first insulating layerand further from the surface of the substrateforms an electrically conductive bonding pad, to be used to be electrically connected to the device, to transmit the electric signal transmitted in the traceto the device.

1 As an example, if the substratehas a sufficient room for the arrangement of all of the electrically conductive patterns, the array base plate may comprise merely one electrically conductive layer.

7 In some embodiments, the material of the first electrically conductive layermay comprise any one of copper, aluminum, nickel, molybdenum and titanium, or a combination of several of the metals that are arranged in stack.

7 7 As an example, the first electrically conductive layermay comprise a molybdenum-nickel-titanium alloy (MoNiTi) layer, a copper metal layer and a molybdenum-niobium alloy (MoNb) layer that are arranged sequentially in stack. The molybdenum-nickel-titanium alloy layer can increase the nucleation density of the copper metal crystal grains in electroplating. The molybdenum-niobium alloy layer serves to prevent the metal copper from being oxidized. The range of the thickness of the molybdenum-nickel-titanium alloy layer in the first electrically conductive layermay be 290 Å-310 Å. For example, the thickness may be 290 Å, 296 Å, 300 Å, 305 Å or 310 Å.

7 In some embodiments, the range of the thickness of the first electrically conductive layermay be 1.5 μm-7 μm. For example, the thickness may be 1.5 μm, 2 μm, 4 μm, 6.5 μm or 7 μm.

5 FIG. 5 FIG. 3 4 5 6 2 6 7 8 shows another schematic structural diagram of the device region A of the array base plate. Referring to, the device region A of the array base plate further comprises a second electrically conductive layer, a second insulating layer, a second planarization layerand a third insulating layerthat are arranged sequentially in stack on the buffer layer, and the third insulating layeris located on the side of the first electrically conductive layerthat is further from the first insulating layer.

5 FIG. 7 3 7 3 1 7 1 30 12 7 3 12 3 In some embodiments, referring to, the first electrically conductive layerand the second electrically conductive layertogether form the electrically conductive pattern. The first electrically conductive layer, as compared with the second electrically conductive layer, is further from the substrate. Therefore, the part of the surface of the first electrically conductive layerthat is further from the substratethat is not covered by the inter-layer-medium layerforms an electrically conductive bonding pad, to be used to be electrically connected to the device, and the part of the first electrically conductive layerthat is covered by the other film layers and the second electrically conductive layerform the signal line and the connecting line in the electrically conductive pattern, to be used to receive and transmit to the devicean electric signal from the external signal-source circuit. The figures according to the embodiments of the present application do not particularly illustrate the electrically conductive pattern of the second electrically conductive layer, and its patterned structure may be decided according to the circuit layout design of the array base plate.

3 In some embodiments, the material of the second electrically conductive layermay comprise any one of copper, aluminum, nickel, molybdenum and titanium, or a combination of several of the metals that are arranged in stack.

3 In some embodiments, the second electrically conductive layermay comprise a molybdenum-niobium alloy layer, a copper metal layer and a protecting layer that are arranged sequentially in stack. The protecting layer may comprise any one of a copper-nickel alloy (CuNi), nickel and indium tin oxide (referred to for short as ITO). The molybdenum-niobium alloy layer serves to increase the adhesive force between the metal copper and the film layer closest to the substrate. The protecting layer serves to prevent the metal copper from being oxidized.

3 As an example, the range of the thickness of the second electrically conductive layermay be 0.5-10 μm. For example, the thickness may be 0.5 μm, 1.8 μm, 1.8 μm, 2.7 μm or 10 μm.

1 a FIG. 2 a, In some embodiments of the present application, referring toorthe part of

7 1 71 72 30 1 2 1 1 71 2 72 the surface of the first electrically conductive layerthat is further from the substratethat is exposed forms an electrically conductive bonding pad, the electrically conductive bonding pad comprises, for example, at least one first bonding padand at least one second bonding pad, the inter-layer-medium layerhas at least one first opening Kand at least one second opening Kin the direction perpendicular to the substrate, the first opening Kexposes the region where the first bonding padis located, and the second opening Kexposes the region where the second bonding padis located.

71 151 12 1 72 152 12 2 The first bonding padis electrically connected to a first weld legof the deviceby the first opening K, and the second bonding padis electrically connected to a second weld legof the deviceby the second opening K.

71 151 1 72 152 2 12 71 72 In some embodiments, the first bonding padand the first weld legare electrically connected by a soldering material (for example, a tin solder, not shown in the figures) located in the first opening K, and the second bonding padand the second weld legare electrically connected by a soldering material located in the second opening K, so as to transmit an electric signal to the devicevia the first bonding padand the second bonding pad.

71 72 151 152 In some embodiments, the soldering material may be printed on the first bonding padand the second bonding padin advance, and may also be prefabricated on the first weld legand the second weld leg.

102 102 20 1 102 1 12 1 In some embodiments of the present application, the array base plate further comprises a plurality of supporting columns, the supporting columnsare located on the side of the reflecting layerthat is further from the substrate, and the orthographic projections of the supporting columnson the substrateand the orthographic projections of the deviceson the substratedo not overlap.

102 102 102 20 102 It should be noted that the color of the supporting columnsmay be selected according to demands. For example, the color of the supporting columnsmay be the white color, so that the reflectivity of the supporting columnsis close to the reflectivity of the reflecting layer. As another example, the supporting columnsmay be transparent.

1 FIG.B 2 3 4 5 6 7 8 9 20 In some embodiments, referring to, the peripheral region B may further comprise one or more film layers of the buffer layer, the second electrically conductive layer, the second insulating layer, the second planarization layer, the third insulating layer, the first electrically conductive layer, the first insulating layerand the first planarization layer. The other film layers comprised by the peripheral region B than the reflecting layermay be decided according to the practical configuration, and are not limited herein.

6 FIG. 100 An embodiment of the present application further provides a light emitting apparatus. Referring to, the light emitting apparatus comprises the array base platestated above.

1 1 20 101 101 1 2 3 4 5 6 7 8 9 1 1 a FIG. 6 FIG. The substrateand all of the film layers between the substrateand the reflecting layerinform the baseshown in. As an example, the basecomprises the substrate, and the buffer layer, the second electrically conductive layer, the second insulating layer, the second planarization layer, the third insulating layer, the first electrically conductive layer, the first insulating layerand the first planarization layerthat are arranged in stack on the substrate.

100 The film layers and components particularly comprised by the array base platemay refer to the above description, and are not discussed further herein.

In some embodiments, there is provided a light emitting apparatus, wherein the light emitting apparatus comprises the array base plate according to the embodiments of the present application.

In some embodiments, the light emitting apparatus may further comprise a protecting base plate (or cover plate) covering the array base plate.

12 12 The light emitting apparatus may be used as a backlight device, and may also be used as a displaying device. Particularly, if all of the plurality of devicesin the light emitting apparatus are light emitting devices that emit lights of a single color, then the light emitting apparatus may be used as a backlight device. If the plurality of devicesin the light emitting apparatus comprise light emitting devices that emit lights of different colors, for example, three types of the light emitting devices emitting a red light, emitting a green light and emitting a blue light, then the light emitting apparatus may be used as a displaying device.

100 100 102 In some embodiments, when the array base plateis used in a displaying device, the array base platemay not be provided with the supporting columns.

6 FIG. 103 104 105 106 103 100 In some embodiments of the present application, referring to, the light emitting apparatus further comprises a diffuser plate, a quantum-dot film, a diffuser sheetand a composite filmthat are arranged sequentially in stack. The diffuser plateis located on the light exiting side of the array base plate.

102 103 104 105 106 20 100 The plurality of supporting columnsare used to support the plurality of optical films (including the diffuser plate, the quantum-dot film, the diffuser sheetand the composite film), so that the reflecting layerin the array base plateand the optical films have a light blending distance therebetween, which can ameliorate the lamp shadow generated by the array base plate, and improve the displayed image quality of the light emitting apparatus.

103 In some embodiments, the material of the diffuser platemay comprise any one of glass, polystyrene (PS), polycarbonate (PC), polyethylene (PE), polypropylene (PP), polyvinyl chloride (PVC), polyethylene terephthalate (PET), polymethyl methacrylate (PMMA) and acrylic acid (MMA).

104 Particularly, the quantum-dot film (QD Enhancement Film, referred to for short as QDEF) is a technique in which a quantum-dot phosphor powder and a polymer are mixed uniformly to be fabricated into a film. As an example, the material of the quantum-dot filmmay comprise a perovskite-quantum-dot material, and its thickness is generally approximately 100 μm.

105 103 In some embodiments, the material of the diffuser sheetmay be the same as the material of the diffuser plate.

106 103 104 105 In some embodiments, the composite filmis not only used to increase the optical efficiency, but also is used as the protecting film of the diffuser plate, the quantum-dot filmand the diffuser sheet, to protect them, to prevent them from being scratched or damaged.

1 20 1 20 1 1 20 1 In the light emitting apparatus according to the embodiments of the present application, because the outer contour of the substrateand the outer contour of the peripheral region B of the array base plate are the same, and the reflecting layerlocated within the peripheral region B covers the substratelocated within the peripheral region B, the reflecting layerlocated within the peripheral region B covers the outer contour of the substrate, so that the substratewithin the peripheral region B has no no-light-reflection region. Therefore, when the light emitting apparatus is emitting light, the reflecting layerwithin the peripheral region B can reflect the light rays emitted by the light emitting apparatus, which ameliorates to a large extent the problem of a high difference in the optical brightnesses of the peripheral region B and the device region A of the light emitting apparatus, and increases to a large extent the light-emission amount of the light emitting apparatus in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the light emitting apparatus.

7 FIG. An embodiment of the present application further provides a spliced displaying apparatus. Referring to, the spliced displaying apparatus comprises at least two light emitting pparatuses stated above.

12 It should be noted that, in the light emitting apparatuses used for the spliced displaying apparatus, the plurality of devicesinclude all of three types of light emitting devices emitting a red light, emitting a green light and emitting a blue light.

In some embodiments, the spliced displaying apparatus may further comprise a multiport transponder, an electric-power supplying device, a first frame body and a second frame body.

107 All of the light-exiting surfaces of the light emitting apparatuses are located in the same one plane, and all of the light emitting apparatuses are fixed to the first frame body. The first frame body is fixed to the second frame body, and the second frame body is located on the side of the first frame body that is further from the light emitting apparatuses. Both of the multiport transponder and the electric-power supplying device are fixed to the second frame body. The multiport transponder is electrically connected to the electric-power supplying device, and all of the bonding-terminal groupsof the light emitting apparatuses are electrically connected to the multiport transponder.

7 FIG. 2 FIG. d. It should be noted that the spliced displaying apparatus shown inis obtained by splicing the light emitting apparatuses formed by the array base plate shown in

20 10 7 FIG. In the spliced displaying apparatus according to the embodiments of the present application, the peripheral region B of the light emitting apparatuses used for the spliced displaying apparatus is also provided with the reflecting layer(in, the peripheral region B is provided with the first reflecting sublayer), which can reflect the light rays emitted by the light emitting apparatuses, thereby ameliorating to a large extent the problem of a high difference in the optical brightnesses of the peripheral region B and the device region A of the light emitting apparatuses. In the spliced displaying apparatus formed by splicing the light emitting apparatuses, as the seam has a sufficiently low width and is difficult to be perceived by human eyes, the region between the two neighboring light emitting apparatuses have no optical dark space, thereby highly improving the effect of displaying of the spliced displaying apparatus.

1 20 302 301 301 14 14 302 20 20 20 20 20 20 20 20 302 1 8 c FIG. 8 a FIG. 8 8 a b FIGS.and Regarding the array base plate stated above, because the substratewithin the peripheral region B is provided with the reflecting layer, in an aspect, when the mother board of the array base plate is cut at the front by using a conventional knife-flywheel front cutting process to obtain the array base plate, referring to, because the cutting knife flywheelis fixed to a knife-flywheel clamp, the knife-flywheel clampmight scratch the packaging uniton the array base plate, and leave a scratch shown inon the packaging unit. In another aspect, because the cutting knife flywheeldirectly cuts the reflecting layer, it leaves a knife mark shown inon the reflecting layer, which causes the local reflecting layerto peel, and the chip of the peeled reflecting layerfalls back onto the reflecting layer, which affects the effect of reflection of the reflecting layer. In yet another aspect, when the knife-flywheel front cutting process is used, the reflecting layeris cut, and, as influenced by the reflecting layer, the cutting knife flywheelhas difficulty in directly cutting the surface of the substrate, which results in failure of the cutting.

8 d FIG. 305 1 20 302 302 1 2 301 104 301 104 301 14 3 302 14 400 3 20 shows a schematic diagram of the knife-flywheel front cutting process. The to-be-cut base plate is located on a cutting platform. When the knife-flywheel front cutting process is used, merely if the following conditions are satisfied, it can be ensured that the cutting succeeds. Firstly, merely if the distance dbetween the reflecting layerand the axis of the cutting knife flywheel(the position where the cutting line is located) is greater than or equal to 0.7 mm, the knife flywheelcan directly cut the surface of the substrate. Secondly, merely if the distance dbetween the knife-flywheel clampand the packaging unitis greater than 0 mm, it can be ensured that the knife-flywheel clampdoes not scratch the packaging unit. In the knife flywheels used in practical applications, the distance between its axis and the edge of one side of the clampis approximately 3 mm, and if the radius r of the packaging unitis 1.25 mm, and the fluctuation range of the cutting process is 0.25 mm, the distance dbetween the axis of the cutting knife flywheeland the geometric center of the orthographic projection of the packaging uniton the mother-board substratesatisfies d≥3 mm+1.25 mm+0.25=4.5 mm. However, in the array base plate obtained by using the knife-flywheel front cutting process, because the reflecting layerdoes not extend to the peripheral region B, the peripheral region B has the problem of a high difference in the optical brightnesses with the device region A.

9 FIG. Accordingly, an embodiment of the present application provides a method for fabricating an array base plate, wherein the method is applied to fabricating the array base plate stated above. Referring to, the method comprises:

901 400 400 10 11 FIG.or S: providing a mother-board substrateshown in, wherein the mother-board substrateis delimited into at least one device region A and a cutting region C adjacent to the device region A.

1 It should be noted that, after the region Coutside the cutting line within the cutting region C has been removed, the peripheral region B can be obtained.

400 1 400 1 10 FIG. As an example, after the mother-board substrateshown inhas been cut along the cutting line and the region Cof the mother-board substratehas been removed, at least one substratecan be obtained.

902 30 400 S: forming the inter-layer-medium layerwithin the device region A of the mother-board substrate.

903 20 400 S: forming the reflecting layerwithin the device region A and the cutting region C of the mother-board substrate.

20 400 30 400 20 400 20 30 400 20 400 The reflecting layerhas a plurality of hollow regions L in the direction perpendicular to the mother-board substrate. The inter-layer-medium layeris located at least between the mother-board substrateand the reflecting layer. An orthographic projection on the mother-board substrateof the part of the reflecting layerthat is located within the device region A and an orthographic projection of the inter-layer-medium layeron the mother-board substratepartially overlap, and a part of the reflecting layerthat is located within the cutting region C covers the cutting region C of the mother-board substrate.

904 12 400 12 S: bonding the plurality of deviceswithin the device region A of the mother-board substrate, wherein the devicesare located within the hollow regions L.

12 12 Multiple types of devicesarranged in an array are provided within the device region A. The devicesinclude a light emitting device, and further include any one of sensing devices, minisized driving chips and other types of devices.

30 1 20 12 30 1 20 71 72 30 30 1 12 1 FIG. a, That the inter-layer-medium layeris located at least between the substrateand the reflecting layermeans that, referring towithin the region of the array base plate where no deviceis provided, the inter-layer-medium layeris located between the substrateand the reflecting layer, and within the hollow region L, part of the region between the electrically conductive patterns (between the electrically conductive bonding pads,) is provided with part of the inter-layer-medium layer, and that part of the inter-layer-medium layeris located between the substrateand the device.

10 FIG. 1 FIG. a, 30 1 2 400 1 1 2 1 Referring toandthe inter-layer-medium layerhas at least one first opening Kand at least one second opening Kin the direction perpendicular to the mother-board substrate. The orthographic projections on the substrateof the first opening Kand/or the second opening Kare located within the area of the orthographic projection of the hollow region L on the substrate.

1 30 71 1 2 30 72 1 12 71 72 The first openings Kin the inter-layer-medium layerexpose the electrically conductive patternprovided on the substrate, and the second openings Kin the inter-layer-medium layerexpose the electrically conductive patternprovided on the substrate, whereby the deviceis connected to the electrically conductive patternand the electrically conductive pattern, and the electrically conductive pattern is connected to the external signal-source circuit so as to receive an electric signal.

20 12 20 10 11 FIG.or Both of the device region A and the cutting region C are provided with the reflecting layer. As an example, referring to, all of the areas of the mother board of the array base plate other than the hollow region L for the provision of the devicesare provided with one reflecting layer.

2 3 4 5 6 7 8 9 In some embodiments, at least one of the film layers of the buffer layer, the second electrically conductive layer, the second insulating layer, the second planarization layer, the third insulating layer, the first electrically conductive layer, the first insulating layerand the first planarization layermay extend to the cutting region C, which may be decided according to the practical configuration, and is not limited herein.

905 400 400 12 S: cutting at the back side of the mother-board substratealong a cutting line, to obtain at least one array base plate, wherein the cutting line is located within the cutting region C, and the back side refers to the surface of the mother-board substratethat is further from the devices.

12 a FIG. shows a schematic diagram of a back side cutting process.

12 a FIG. 400 305 302 400 400 305 306 302 302 400 In some embodiments, referring to, when the mother-board substrateis cut at the back side along the cutting line, the mother board of the array base plate is located on the cutting platform, and the cutting knife flywheelis disposed at the back side of the mother-board substrate. In addition, because the cutting region of the mother-board substrateis not supported by the cutting platform, and is in a hanging state, a rolleris provided on the other side of the mother board of the array base plate opposite to the cutting knife flywheel, so as to offset the cutting pressure generated when the cutting knife flywheelis cutting at the back side of the mother-board substrate.

400 20 302 20 14 301 302 302 400 20 Because the back side of the mother-board substrateis not provided with the reflecting layer, the cutting can be performed at any position of the cutting region according to the demand of the cutting. Accordingly, in the cutting, it is not required to consider the distance between the axis of the cutting knife flywheeland the edge of the reflecting layer, and it is not required to consider the problem of scratching and wearing to the packaging unitsthat might be caused by the clampof the cutting knife flywheel. Furthermore, when the cutting is from the back side, the cutting knife flywheelcan directly contact the back side of the mother-board substrate, which does not have the problem of cutting failure caused by the influence by the reflecting layer.

12 13 14 a a a FIGS.,and 20 12 14 400 It should be noted that, in, the reflecting layer, the devicesand the packaging unitsare shown on the mother-board substrate, the other components comprised by the mother board of the array base plate are not shown, and the other components comprised by the mother board of the array base plate are similar to the components comprised by the array base plate, which may particularly refer to the above description on the structure of the array base plate, and is not discussed further herein.

12 b FIG. 12 a FIG. 12 b FIG. 1 1 20 20 shows a schematic diagram of the position of the cutting line of the mother board of the array base plate in. In, the position marked by the dotted line is the position where the cutting line is located, and after the region Coutside the cutting line has been removed along the cutting line, the array base plate can be obtained. The region Cof the mother board of the array base plate that is outside the cutting line is also provided with the reflecting layer, but, because the back side cutting process is employed, the reflecting layerdoes not affect the cutting process.

13 a FIG. 13 a FIG. 13 a FIG. 13 b FIG. 13 a FIG. 305 302 1 In some embodiments, as shown in,shows a schematic diagram of another back side cutting process. In, the cutting line is located at the middle position of the mother board of two array base plates, and the middle position of the cutting platformis excavated, so as to leave the room for providing the cutting knife flywheeltherein.shows a schematic diagram of the position of the cutting line of the mother board of the array base plates in. The region between the two cutting lines is the region Cthat is required to be cut off.

14 FIG. 14 FIG. 302 302 306 20 400 302 In some embodiments, as shown in, in order to increase the cutting efficiency when the cutting knife flywheelcuts at the back side, a plurality of knife flywheels may be used to cut simultaneously. In, in the mother board of the array base plates corresponding to each of the positions where a cutting knife flywheelis disposed, a rolleris disposed on the side of the reflecting layerthat is further from the mother-board substrate, so as to balance the cutting pressures generated when the cutting knife flywheelsare cutting.

500 500 18 FIG. An embodiment of the present application provides a vacuum suction cupshown in. The vacuum suction cupis a soft-mouth suction cup, has an excellent sucking effect to array base plates of an uneven surface, and is used to, in the cutting, transport and move the mother board of the array base plate or the array base plate.

15 a FIG. Referring to, after the cutting, the edge of the array base plate may be ground, so as to reduce the probability with which the edge of the array base plate is damaged due to protrusions, notches or microcracks that might exist, thereby increasing the reliability of the array base plate.

307 308 308 20 1 20 20 1 308 20 1 1 20 15 a FIG. 15 c FIG. 15 b FIG. In an oblique-corner grinding process, the array base plate is placed on a grinding platform, and a grinding knife flywheelrotates in the anticlockwise direction, whereby the grinding knife flywheelfirstly grinds the reflecting layer, and subsequently grinds the substrate, to prevent local peeling of the reflecting layercaused by the pulling to the reflecting layerif the substrateis ground firstly. In the oblique-corner grinding process, in the grinding, the initial grinding point between the grinding knife flywheeland the array base plate is the boundary between the surface of the reflecting layerand the side of the substrateshown in, and after the grinding has ended, the array base plate generates ground regions shown in(the regions where the oblique corners are located). By a microscopic test on those regions, it can been seen that the width of the ground region Gis approximately 150 μm, as shown in, and no reflecting layeris within that region, which seriously affects the optical property of the array base plate.

400 Accordingly, in some embodiments of the present application, after the step of cutting at the back side of the mother-board substratealong the cutting line, to obtain at least one array base plate, the fabricating method further comprises:

906 S: grinding the edge of the array base plate by using a perpendicular grinding technique.

906 In some embodiments of the present application, the step Sof grinding the edge of the array base plate by using the perpendicular grinding technique comprises:

9061 100 1 20 1 20 16 FIG. S: referring to, in the direction perpendicular to the array base plate, grinding the side of the substrateand the side of the reflecting layerof the array base plate simultaneously, wherein the side of the substrateand the side of the reflecting layerare coplanar.

16 FIG. 1 20 It should be noted that, in, the other film layers between the substrateand the reflecting layerare not shown, and may particularly refer to the above description.

16 FIG. 308 308 1 20 20 1 2 2 In some embodiments, the process of grinding the array base plate by using the perpendicular grinding technique may refer to. The initial grinding point of the grinding knife flywheelis at the side of the array base plate. Particularly, the grinding knife flywheelrotates in the anticlockwise direction, and simultaneously grinds the side of the substrateand the side of the reflecting layer, which can reduce to a large extent the difference between the wearing degree of the reflecting layerand the wearing degree of the substrateat the edge of the array base plate, thereby reducing the grinding width of the ground region G. The grinding width of the ground region Gof the array base plate that is ground by using the perpendicular grinding technique is approximately. The perpendicular grinding technique improves the optical property of the edge position of the array base plate to a large extent.

903 20 400 In some embodiments of the present application, the step Sof forming the reflecting layerwithin the device region A and the cutting region C of the mother-board substratecomprises:

9031 10 10 400 S: forming a first reflecting sublayer, wherein an orthographic projection of the first reflecting sublayeron the mother-board substrateis located within the device region A and the cutting region C; and

9032 11 11 400 S: forming a second reflecting sublayer, wherein an orthographic projection of the second reflecting sublayeron the mother-board substrateis located within the device region A;

10 10 400 or forming a first reflecting sublayer, wherein an orthographic projection of the first reflecting sublayeron the mother-board substrateis located within the device region A and the cutting region C; and

11 11 400 forming a second reflecting sublayerwithin the device region A and the cutting region C, wherein an orthographic projection of the second reflecting sublayeron the mother-board substrateis located within the device region A and the cutting region C.

10 FIG. 10 1 11 1 11 1 In some embodiments, in some embodiments, referring to, the first reflecting sublayercovers the edge of the substrate, and the second reflecting sublayercontracts inwardly toward the device region A, whereby the range of the distance Hbetween the edge of the second reflecting sublayerand the edge of the substrate(the cutting line) is controlled to be between 0.2-2 mm.

1 11 1 1 11 1 As an example, the distance Hbetween the edge of the second reflecting sublayerand the edge of the substratemay be 0.2 mm, 0.4 mm, 0.5 mm, 0.8 mm, 1 mm, 1.5 mm, 1.8 mm or 2 mm. The particular numerical value of the distance Hbetween the edge of the second reflecting sublayerand the edge of the substratemay be decided according to the different configurations of the array base plate and according to the different fabricating processes or cutting processes of the array base plate, and is not limited herein.

10 11 10 11 10 11 10 11 10 11 10 11 In some embodiments, the materials of the first reflecting sublayerand the second reflecting sublayermay be different. For example, the material of the first reflecting sublayermay comprise a white ink, and the material of the second reflecting sublayermay comprise a silicon-based white glue. Alternatively, the materials of the first reflecting sublayerand the second reflecting sublayermay be the same. For example, both of the materials of the first reflecting sublayerand the second reflecting sublayercomprise a white ink. When the materials of the first reflecting sublayerand the second reflecting sublayercomprise a white ink or comprise a silicon-based white glue, the first reflecting sublayerand the second reflecting sublayermay be formed by printing by using a screen-printing process.

10 As an example, the range of the thickness of the first reflecting sublayermay be 25 μm-35 μm, for example, 25 μm, 28 μm, 30 μm, 32 μm or 35 μm.

11 As an example, the range of the thickness of the second reflecting sublayermay be 25 μm-35 μm, for example, 25 μm, 28 μm, 30 μm, 32 μm or 35 μm.

12 400 400 In some embodiments of the present application, after the step of bonding the plurality of deviceswithin the device region A of the mother-board substrate, and before the step of cutting at the back side of the mother-board substratealong the cutting line, to obtain at least one array base plate, the method further comprises:

13 30 13 20 forming an auxiliary reflecting parton the inter-layer-medium layer, wherein the auxiliary reflecting partis connected to the reflecting layer.

20 20 20 30 13 30 30 20 30 20 1 In some embodiments, if the reflecting layeris fabricated by multiple times of screen printing, the reflecting layerat the edges of the hollow region L may be of a step shape, and the reflecting layerat the edges of the hollow region L exposes part of the inter-layer-medium layer. In this case, the auxiliary reflecting partmay be subsequently provided on the inter-layer-medium layer, to cover part of the inter-layer-medium layerexposed by the reflecting layerat the edges of the hollow region L, which solves the problem that part of the inter-layer-medium layeris not covered by the reflecting layer, so as to further increase the light-emission amount of the array base plate in the direction perpendicular to the plane where the substrateis located, thereby increasing the luminous efficiency of the array base plate.

13 20 In some embodiments, the provision of the auxiliary reflecting partat the side wall of the hollow region L of the reflecting layercan reduce the radial dimension of the hollow region L, and increase the size precision of the hollow region L.

13 2 13 30 13 30 1 20 30 20 30 2 b FIG. It should be noted that the auxiliary reflecting partmay be fabricated by spray coating around the edge of the hollow region. Furthermore, referring to, the distance Tbetween the surface of the auxiliary reflecting partthat contacts the inter-layer-medium layerand the surface of the auxiliary reflecting partthat is further from the inter-layer-medium layeris greater than the distance Tbetween the surface of the reflecting layerthat contacts the inter-layer-medium layerand the surface of the reflecting layerthat is further from the inter-layer-medium layer.

13 13 20 13 20 In some embodiments, the material of the auxiliary reflecting partcomprises a silicon-based white glue, and the color of the silicon-based white glue is the white color, whereby the color of the auxiliary reflecting partis substantially the same as the color of the reflecting layer, to ensure that the reflectivity of the auxiliary reflecting partto light rays is close to the reflectivity of the reflecting layerto light rays.

17 a FIG. 17 b FIG. The embodiments of the present application provide schematic structural diagrams of spliced displaying apparatuses formed by array base plates cut by using the front cutting process and the back cutting process.shows a schematic structural diagram of a spliced displaying apparatus formed by an array base plate cut by using the front cutting process.shows a schematic structural diagram of a spliced displaying apparatus formed by an array base plate cut by using the back cutting process.

17 a FIG. 20 20 5 6 5 In the spliced displaying apparatus shown in, the array base plates forming the light emitting apparatuses are obtained by using the front cutting process. The region of the light emitting apparatuses that is not provided with the reflecting layer is marked asN. The spliced displaying apparatus comprises two light emitting apparatuses. In each of the light emitting apparatuses, the distance from the edge of the reflecting layerto the edge of the light emitting apparatus is 0.7 mm, and the width dof the seam of the spliced displaying apparatus is =0.9 mm, whereby the width dof the region between the two neighboring light emitting apparatuses that is not provided with the reflecting layer is =d+0.7 mm*2=2.3 mm. In other words, the distance between the displaying regions of the two neighboring light emitting apparatuses in the spliced displaying apparatus is 2.3 mm, and when the spliced displaying apparatus is displaying a frame, a region of the width of 2.3 mm exists that does not display the frame (the non-displaying region), which seriously deteriorates the effect of displaying of the spliced displaying apparatus.

17 b FIG. 6 6 5 In the spliced displaying apparatus shown in, the array base plates forming the light emitting apparatuses are obtained by using the back cutting process. The spliced displaying apparatus comprises two light emitting apparatuses. In each of the light emitting apparatuses, each of the light emitting apparatuses used for the splicing does not have a region that does not have the reflecting layer, whereby the width dof the region between the two neighboring light emitting apparatuses that is not provided with the reflecting layer is d=d=0.9 mm. As compared with the spliced displaying apparatus obtained by using the front cutting process, the two neighboring light emitting apparatuses in the spliced displaying apparatus obtained by using the back cutting process have a smaller non-displaying region therebetween, thereby improving the effect of displaying of the spliced displaying apparatus to a large extent.

The above are merely particular embodiments of the present application, and the protection scope of the present application is not limited thereto. All of the variations or substitutions that a person skilled in the art can easily envisage within the technical scope disclosed by the present application should fall within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.