Display panel and display apparatus including transmission area within component area

This application is a continuation of U.S. patent application Ser. No. 17/246,396, filed Apr. 30, 2021, which claims priority to and the benefit of Korean Patent Application No. 10-2020-0101408, filed Aug. 12, 2020, the entire content of both of which is incorporated herein by reference.

Aspects of one or more example embodiments relate to a display panel and a display apparatus including the display panel.

Recently, the various uses and applications for display apparatuses has diversified. Also, display apparatuses have become thinner and lighter, and thus, the uses of display apparatuses has expanded.

As display apparatuses are used in various ways, various methods may be used to design the shapes of display apparatuses, and further, more and more functions may be combined or associated with display apparatuses.

The above information disclosed in this Background section is only for enhancement of understanding of the background and therefore the information discussed in this Background section does not necessarily constitute prior art.

Aspects of one or more example embodiments relate to a display panel and a display apparatus including the display panel, and for example, to a display panel in which a display area is extended such that an image may be displayed even in an area where a component as an electronic element is arranged and a display apparatus including the display panel.

Aspects of one or more example embodiments include a display panel in which a display area is extended such that an image may be displayed even in an area where an electrical component is arranged and a display apparatus including the display panel. However, such a technical problem is an example, and embodiments according to the present disclosure are not limited thereto.

Additional aspects will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the presented embodiments.

According to one or more example embodiments, in a display panel including a main display area, a component area including a transmission area, and a peripheral area outside the main display area, the display panel includes: a substrate, an inorganic insulating layer arranged over the substrate and including a first hole corresponding to the transmission area, a planarization layer arranged over the inorganic insulating layer, a pixel definition layer arranged over the planarization layer and having a thickness of about 1.3 μm to about 2 μm, and a thin film encapsulation layer arranged over the pixel definition layer, wherein an angle between a side surface of the pixel definition layer and an upper surface of the planarization layer is about 30 degrees to about 40 degrees.

According to some example embodiments, the pixel definition layer may have a thickness of about 1.3 μm to about 2 μm from the upper surface of the planarization layer.

According to some example embodiments, a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer may be sequentially stacked in the thin film encapsulation layer, and the organic encapsulation layer may be arranged in the first hole.

According to some example embodiments, the planarization layer may include a second hole corresponding to the transmission area, the pixel definition layer may include a third hole corresponding to the transmission area, and the organic encapsulation layer may be arranged in the second hole and the third hole.

According to some example embodiments, the organic encapsulation layer arranged over the transmission area may have a flat upper surface.

According to some example embodiments, the organic encapsulation layer arranged over the transmission area may include a concave portion.

According to some example embodiments, a distance from a bottom surface of an upper surface of the organic encapsulation layer to a top surface of the upper surface of the organic encapsulation layer may be more than about 0 μm and less than or equal to about 2 μm.

According to some example embodiments, the organic encapsulation layer arranged over the transmission area may include a convex portion.

According to some example embodiments, a distance from a bottom surface of an upper surface of the organic encapsulation layer to a top surface of the upper surface of the organic encapsulation layer may be more than about 0 μm and less than or equal to about 2 μm.

According to some example embodiments, the display panel may further include a main display element arranged over the planarization layer corresponding to the main display area, and an auxiliary display element arranged over the planarization layer corresponding to the component area.

According to some example embodiments, the main display element may include a first pixel electrode, the auxiliary display element may include a second pixel electrode, and the pixel definition layer may expose at least a portion of the first pixel electrode and the second pixel electrode.

According to some example embodiments, the display panel may further include a touch screen layer arranged over the thin film encapsulation layer, wherein a first touch insulating layer, a second touch insulating layer, and a third touch insulating layer may be sequentially stacked in the touch screen layer, and the touch screen layer may include a first touch electrode arranged between the first touch insulating layer and the second touch insulating layer and a second touch electrode arranged between the second touch insulating layer and the third touch insulating layer.

According to some example embodiments, the first touch electrode and the second touch electrode may at least partially overlap the pixel definition layer.

According to some example embodiments, the display panel may further include a bottom metal layer arranged between the substrate and the inorganic insulating layer in the component area and including a bottom hole corresponding to the transmission area.

According to one or more example embodiments, in a display panel including a main display area, a component area including a transmission area, and a peripheral area outside the main display area, the display panel includes: a substrate, an inorganic insulating layer arranged over the substrate and including a first hole corresponding to the transmission area, a pixel definition layer arranged over the inorganic insulating layer and having a thickness of about 1.3 μm to about 2 μm, and a thin film encapsulation layer arranged over the pixel definition layer and including a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer, wherein the organic encapsulation layer includes a concave portion or a convex portion.

According to some example embodiments, a distance from a bottom surface of an upper surface of the organic encapsulation layer to a top surface of the upper surface of the organic encapsulation layer may be more than about 0 μm and less than or equal to about 2 μm.

According to some example embodiments, the display panel may further include a planarization layer arranged between the inorganic insulating layer and the pixel definition layer, wherein the pixel definition layer may have a thickness of about 1.3 μm to about 2 μm from an upper surface of the planarization layer.

According to some example embodiments, an angle between a side surface of the pixel definition layer and the upper surface of the planarization layer may be about 30 degrees to about 40 degrees.

According to some example embodiments, the organic encapsulation layer may be arranged in the first hole.

According to one or more example embodiments, a display apparatus includes a display panel including a main display area, a component area including a transmission area, and a peripheral area outside the main display area, and a component arranged under the display panel to correspond to the component area, the display panel including a substrate, an inorganic insulating layer arranged over the substrate and including a first hole corresponding to the transmission area, a planarization layer arranged over the inorganic insulating layer, a pixel definition layer arranged over the planarization layer and having a thickness of about 1.3 μm to about 2 μm, and a thin film encapsulation layer arranged over the pixel definition layer, wherein an angle between a side surface of the pixel definition layer and an upper surface of the planarization layer is about 30 degrees to about 40 degrees.

According to some example embodiments, the component may include an imaging device or a sensor.

According to some example embodiments, the pixel definition layer may have a thickness of about 1.3 μm to about 2 μm from the upper surface of the planarization layer.

According to some example embodiments, a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer may be sequentially stacked in the thin film encapsulation layer, and the organic encapsulation layer may be arranged in the first hole.

According to some example embodiments, the organic encapsulation layer arranged over the transmission area may have a flat upper surface.

According to some example embodiments, the organic encapsulation layer arranged over the transmission area may include a concave portion or a convex portion.

According to some example embodiments, a distance from a bottom surface of an upper surface of the organic encapsulation layer to a top surface of the upper surface of the organic encapsulation layer may be more than about 0 μm and less than or equal to about 2 μm.

Other aspects, features, and characteristics other than those described above will become more apparent from the following detailed description, the appended claims, and the accompanying drawings.

Reference will now be made in more detail to aspects of some example embodiments, which are illustrated in the accompanying drawings, wherein like reference numerals refer to like elements throughout. In this regard, embodiments according to the present disclosure may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the example embodiments are merely described below, by referring to the figures, to explain aspects of the present description. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b or c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

As the present description allows for various changes and numerous embodiments, certain embodiments will be illustrated in the drawings and described in the written description. Effects and features of one or more embodiments and methods of accomplishing the same will become apparent from the following detailed description of the one or more embodiments, taken in conjunction with the accompanying drawings. However, the example embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein.

While such terms as “first” and “second” may be used to describe various components, such components should not be limited to the above terms. The above terms are used to distinguish one component from another.

The singular forms “a,” “an,” and “the” as used herein are intended to include the plural forms as well unless the context clearly indicates otherwise.

It will be understood that the terms “comprise,” “comprising,” “include” and/or “including” as used herein specify the presence of stated features or components but do not preclude the addition of one or more other features or components.

It will be further understood that, when a layer, region, or component is referred to as being “on” another layer, region, or component, it may be directly or indirectly on the other layer, region, or component. That is, for example, intervening layers, regions, or components may be present.

Sizes of elements in the drawings may be exaggerated or reduced for convenience of description. In other words, since sizes and thicknesses of components in the drawings are arbitrarily illustrated for convenience of description, the following embodiments are not limited thereto.

In the disclosure, “A and/or B” may include “A,” “B,” or “A and B.” In addition, in the present disclosure, “at least one of A and B” may include “A,” “B,” or “A and B.”

In the following disclosure, it will be understood that when a line is referred to as “extending in a first direction or a second direction,” it may not only extend in a linear shape, but also may extend in the first direction or the second direction in a zigzag or curved line.

In the following disclosure, a “plan view” indicates that a portion of a target object is seen from above, and a “cross-sectional view” indicates that a portion of a target object is vertically cut and the cross-section is viewed from the side. In the following disclosure, a term “overlapping” includes overlapping in a plan view and a cross-sectional view.

The disclosure will now be described more fully with reference to the accompanying drawings, in which embodiments are shown. Like reference numerals in the drawings denote like elements.

1 FIG. is a perspective view schematically illustrating a display apparatus according to some example embodiments.

1 FIG. 1 Referring to, a display apparatusmay include a display area DA and a peripheral area DPA outside the display area DA. The display area DA may include a component area CA and a main display area MDA at least partially surrounding the component area CA. Each of the component area CA and the main display area MDA may display images individually or together. The peripheral area DPA may be a type of non-display area in which display elements are not arranged. The display area DA may be entirely surrounded by the peripheral area DPA.

1 FIG. 1 FIG. 1 1 1 illustrates that one component area CA is located in the main display area MDA. According to some example embodiments, the display apparatusmay include two or more component areas CA and the shapes and sizes of the component areas CA may be different from each other. When viewed in a direction substantially perpendicular to the top surface of the display apparatus(e.g., a plan view, or a direction normal with respect to the plane of the display surface of the display area DA), the component area CA may have various shapes such as circular shapes, elliptical shapes, polygonal shapes such as tetragonal shapes, star shapes, or diamond shapes. Also,illustrates that the component area CA is arranged at the upper center (in the +y direction) of the main display area MDA having a substantially rectangular shape when viewed in a direction substantially perpendicular to the top surface of the display apparatus; however, the component area CA may be arranged at one side of the main display area MDA having a rectangular shape, for example, at the upper right side or the upper left side thereof.

1 The display apparatusmay display images by using a plurality of main subpixels Pm arranged in the main display area MDA and a plurality of auxiliary subpixels Pa arranged in the component area CA.

2 FIG. 40 40 40 40 40 40 40 As described below with reference to, in the component area CA, a componentas an electronic element may be arranged under a display panel corresponding to the component area CA. The componentmay include an imaging device as a camera using infrared light or visible light. Alternatively, the componentmay include a solar cell, a flash, an illuminance sensor, a proximity sensor, or an iris sensor. Alternatively, the componentmay have a function of receiving sound. In order to minimize the limitation of the function of the component, the component area CA may include a transmission area TA that may transmit light and/or sound output from the componentto the outside or propagating toward the componentfrom the outside. In the case of a display panel and a display apparatus including the display panel according to some example embodiments, when light is transmitted through the component area CA, the light transmittance of the component area CA or the transmission area TA may be about 10% or more, for example, about 40% or more, about 25% or more, about 50% or more, about 85% or more, or about 90% or more.

A plurality of auxiliary subpixels Pa may be arranged in the component area CA. The plurality of auxiliary subpixels Pa may provide a certain image by emitting light. The image displayed in the component area CA may be an auxiliary image and may have a lower resolution than the image displayed in the main display area MDA. That is, the component area CA may include a transmission area TA through which light and sound may be transmitted, and when no subpixel is arranged on the transmission area TA, the number of auxiliary subpixels Pa that may be arranged per unit area in the component area CA may be less than the number of main subpixels Pm arranged per unit area in the main display area MDA.

2 FIG. is a cross-sectional view schematically illustrating a portion of a display apparatus according to some example embodiments.

2 FIG. 1 10 40 10 50 10 10 Referring to, a display apparatusmay include a display paneland a componentoverlapping the display panel. A cover windowfor protecting the display panelmay be further arranged over the display panel.

10 40 10 100 100 50 100 The display panelmay include a component area CA overlapping the componentand a main display area MDA where a main image is displayed. The display panelmay include a substrate, a display layer DISL on the substrate, a touch screen layer TSL, an optical functional layer OFL, the cover window, and a panel protection member PB arranged under the substrate.

100 The display layer DISL may include a circuit layer PCL including thin film transistors TFT and TFT′, a display element layer EDL including light emitting diodes OLED and OLED′ as display elements, and an encapsulation member ENCM such as a thin film encapsulation layer TFEL or an encapsulation substrate. Insulating layers IL and IL′ may be arranged in the display layer DISL and between the substrateand the display layer DISL.

100 The substratemay include an insulating material such as a polymer resin and may include a flexible substrate capable of bending, folding, rolling, or the like.

10 A main thin film transistor TFT and a main light emitting diode OLED connected thereto may be arranged in the main display area MDA of the display panelto implement a main subpixel Pm, and an auxiliary thin film transistor TFT′ and an auxiliary light emitting diode OLED′ connected thereto may be arranged in the component area CA to implement an auxiliary subpixel Pa. An area of the component area CA in which the auxiliary subpixel Pa is arranged may be referred to as an auxiliary display area.

40 40 In the component area CA, a transmission area TA having no display elements arranged therein may be arranged. The transmission area TA may be an area through which the light/signal output from the componentor the light/signal input to the componentarranged corresponding to the component area CA is transmitted. The auxiliary display area and the transmission area TA may be alternately arranged in the component area CA.

100 A bottom metal layer BML may be arranged in the component area CA. The bottom metal layer BML may be arranged to correspond to the bottom of the auxiliary thin film transistor TFT′. For example, the bottom metal layer BML may be arranged between the auxiliary thin film transistor TFT′ and the substrate. The bottom metal layer BML may prevent external light from reaching the auxiliary thin film transistor TFT′. According to some example embodiments, a constant voltage or signal may be applied to the bottom metal layer BML to prevent damage to a pixel circuit due to an electrostatic discharge.

2 FIG. 131 133 132 The display element layer EDL may be covered by the thin film encapsulation layer TFEL or the encapsulation substrate. According to some example embodiments, the thin film encapsulation layer TFEL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer as illustrated in. According to some example embodiments, the thin film encapsulation layer TFEL may include a first inorganic encapsulation layerand a second inorganic encapsulation layerand an organic encapsulation layertherebetween.

131 133 132 The first inorganic encapsulation layerand the second inorganic encapsulation layermay include one or more inorganic insulating materials of silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layermay include a polymer-based material. The polymer-based material may include an acrylic resin, an epoxy resin, a polyimide, and a polyethylene.

100 100 When the display element layer EDL is encapsulated by an encapsulation substrate, the encapsulation substrate may be arranged to face the substratewith the display element layer EDL therebetween. A gap may be between the encapsulation substrate and the display element layer EDL. The encapsulation substrate may include glass. A sealant including frit or the like may be arranged between the substrateand the encapsulation substrate, and the sealant may be arranged in the peripheral area DPA described above. The sealant arranged in the peripheral area DPA may surround the display area DA to prevent or reduce instances of moisture or other contaminants penetrating through the side surface thereof.

The touch screen layer TSL may be configured to obtain coordinate information according to an external input, for example, a touch event. The touch screen layer TSL may include a touch electrode and touch lines connected to the touch electrode. The touch screen layer TSL may sense an external input according to a self-capacitance method or a mutual capacitance method.

The touch screen layer TSL may be arranged on the thin film encapsulation layer TFEL. Alternatively, the touch screen layer TSL may be separately formed on a touch substrate and then coupled onto the thin film encapsulation layer TFEL through an adhesive layer such as an optical clear adhesive (OCA). According to some example embodiments, the touch screen layer TSL may be directly formed on the thin film encapsulation layer TFEL, and in this case, an adhesive layer may not be between the touch screen layer TSL and the thin film encapsulation layer TFEL.

1 The optical functional layer OFL may be provided to improve visibility. The optical functional layer OFL may include an anti-reflection layer. The anti-reflection layer may be configured to reduce the reflectance of light (external light) incident from the outside toward the display apparatus.

According to some example embodiments, the anti-reflection layer may include a polarization film. The polarization film may include a linear planarization plate and a phase delay film such as a quarter-wave (λ/4) plate. The phase delay film may be on the touch screen layer TSL, and the linear planarization plate may be on the phase delay film.

1 According to some example embodiments, the anti-reflection layer may include a filter layer including a black matrix and color filters. The color filters may be arranged considering the color of light emitted from each of the pixels of the display apparatus. For example, the filter layer may include a color filter of a red, green, or blue color.

According to some example embodiments, the anti-reflection layer may include a destructive interference structure. The destructive interference structure may include a first reflection layer and a second reflection layer arranged on different layers. First reflected light and second reflected light respectively reflected by the first reflection layer and the second reflection layer may destructively interfere with each other, and accordingly, the external light reflectance may be reduced.

50 10 10 50 The cover windowmay be arranged over the display panelto protect the display panel. The optical functional layer OFL may be attached to the cover windowwith an optical clear adhesive or may be attached to the touch screen layer TSL with an optical clear adhesive.

100 100 The panel protection member PB may be attached under the substrateto support and protect the substrate. The panel protection member PB may include an opening PB_OP corresponding to the component area CA. Because the panel protection member PB includes the opening PB_OP, the light transmittance of the component area CA may be improved. The panel protection member PB may include polyethylene terephthalate (PET) or polyimide (PI).

40 The component area CA may have a larger area than an area where the componentsare arranged. Accordingly, the area of the opening PB_OP included in the panel protection member PB may not match the area of the component area CA.

40 40 40 Also, a plurality of componentsmay be arranged in the component area CA. The plurality of componentsmay have different functions. For example, the plurality of componentsmay include at least two of a camera (imaging device), a solar cell, a flash, a proximity sensor, an illuminance sensor, or an iris sensor.

3 FIG. 1 FIG. is a plan view schematically illustrating a display panel that may be included in the display apparatus of.

3 FIG. 10 100 100 Referring to, various components constituting a display panelmay be arranged over a substrate. The substratemay include a display area DA and a peripheral area DPA surrounding the display area DA. The display area DA may include a main display area MDA on which a main image is displayed, and a component area CA which includes a transmission area TA and on which an auxiliary image is displayed. The auxiliary image may form a single entire image together with the main image, or may be an image independent from the main image. That is, the auxiliary image and the main image may each form a sub-portion of an image such that they collectively form the entirety of the image, or the auxiliary image and the main image may separately or independently display separate images that are not part of the same image.

A plurality of main subpixels Pm may be arranged in the main display area MDA. Each of the plurality of main subpixels Pm may be implemented as a display element such as an organic light emitting diode OLED. Each of the plurality of main subpixels Pm may emit, for example, red light, green light, blue light, or white light. The main display area MDA may be covered with an encapsulation member and thus may be protected from ambient air, moisture, contaminants, or the like.

The component area CA may be located on one side of the main display area MDA as described above, or may be arranged in the display area DA and surrounded by the main display area MDA. A plurality of auxiliary subpixels Pa may be arranged in the component area CA. Each of the plurality of auxiliary subpixels Pa may be implemented by a display element such as an auxiliary organic light emitting diode OLED′. Each of the plurality of auxiliary subpixels Pa may emit, for example, red light, green light, blue light, or white light. The component area CA may be covered with an encapsulation member and thus may be protected from ambient air, moisture, or the like.

Moreover, the component area CA may include a transmission area TA. The transmission area TA may be arranged to surround a plurality of auxiliary subpixels Pa. Alternatively, the transmission area TA may be arranged in a grid form with a plurality of auxiliary subpixels Pa.

Because the component area CA has the transmission areas TA, a resolution of the component area CA may be lower than a resolution of the main display area MDA. For example, the resolution of the component area CA may be about ½, ⅜, ⅓, ¼, 2/9, ⅛, 1/9, or 1/16 of the resolution of the main display area MDA. For example, the resolution of the main display area MDA may be about 400 ppi or more, and the resolution of the component area CA may be about 200 ppi or about 100 ppi.

1 2 11 13 Pixel circuits that drive the main and auxiliary subpixels Pm and Pa may be electrically connected to peripheral circuits arranged in the peripheral area DPA, respectively. A first scan driving circuit SDRV, a second scan driving circuit SDRV, a terminal portion PAD, a driving voltage supply line, and a common voltage supply linemay be arranged in the peripheral area DPA.

1 1 2 1 1 1 2 1 2 2 The first scan driving circuit SDRVmay apply a scan signal to each of the pixel circuits driving the subpixels Pm and Pa, through a scan line SL. The first scan driving circuit SDRVmay apply an emission control signal to each pixel circuit through an emission control line EL. The second scan driving circuit SDRVmay be located on the opposite side of the first scan driving circuit SDRVwith respect to the main display area MDA and may be substantially parallel to the first scan driving circuit SDRV. Some of the pixel circuits of the main subpixels Pm of the main display area MDA may be electrically connected to the first scan driving circuit SDRV, and the others may be electrically connected to the second scan driving circuit SDRV. Some of the pixel circuits of the auxiliary subpixels Pa of the component area CA may be electrically connected to the first scan driving circuit SDRV, and the others may be electrically connected to the second scan driving circuit SDRV. The second scan driving circuit SDRVmay be omitted.

100 30 32 30 The terminal portion PAD may be arranged at one side of the substrate. The terminal portion PAD may be exposed by not being covered by an insulating layer, to be connected to a display circuit board. A display drivermay be arranged on the display circuit board.

32 1 2 32 The display drivermay generate a control signal transmitted to the first scan driving circuit SDRVand the second scan driving circuit SDRV. The display drivermay generate a data signal, and the generated data signal may be transmitted to the pixel circuits of the subpixels Pm and Pa through a fan-out line FW and a data line DL connected to the fan-out line FW.

32 11 13 11 13 The display drivermay supply a driving voltage ELVDD to the driving voltage supply lineand may supply a common voltage ELVSS to the common voltage supply line. The driving voltage ELVDD may be applied to the pixel circuits of the subpixels Pm and Pa through the driving voltage line PL connected to the driving voltage supply line, and the common voltage ELVSS may be connected to the common voltage supply lineto be applied to an opposite electrode of the display element.

11 13 The driving voltage supply linemay be provided to extend in the x direction under the main display area MDA. The common voltage supply linemay have a loop shape of which one side is open, and may surround a portion of the main display area MDA.

3 FIG. Althoughillustrates a case where there is one component area CA, a plurality of component areas CA may be provided. In this case, a plurality of component areas CA may be arranged to be spaced apart from each other, a first camera may be arranged corresponding to a component area CA, and a second camera may be arranged corresponding to another component area CA. Alternatively, a camera may be arranged corresponding to a component area CA, and an infrared sensor may be arranged corresponding to another component area CA. The shapes and sizes of the plurality of component areas CA may be different from each other.

Moreover, the component area CA may have a polygonal shape. For example, the component area CA may have an octagonal shape. The component area CA may have any polygonal shape such as a tetragonal shape or a hexagonal shape. The component area CA may be surrounded by the main display area MDA.

4 5 FIGS.and are equivalent circuit diagrams of a pixel circuit driving a subpixel according to some example embodiments.

4 FIG. 1 2 2 1 Referring to, a pixel circuit PC may be connected to an organic light emitting diode OLED to implement light emission of subpixels. The pixel circuit PC may include a driving thin film transistor T, a switching thin film transistor T, and a storage capacitor Cst. The switching thin film transistor Tmay be connected to the scan line SL and the data line DL, and may transmit, to the driving thin film transistor T, a data signal Dm received through the data line DL according to a scan signal Sn received through the scan line SL.

2 2 The storage capacitor Cst may be connected to the switching thin film transistor Tand a driving voltage line PL and may store a voltage corresponding to the difference between a voltage received from the switching thin film transistor Tand a driving voltage ELVDD supplied to the driving voltage line PL.

1 The driving thin film transistor Tmay be connected to the driving voltage line PL and the storage capacitor Cst and may control a driving current flowing from the driving voltage line PL through the organic light emitting diode OLED in response to a voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED may emit light having a certain luminance according to the driving current.

4 FIG. Althoughillustrates that the pixel circuit PC includes two thin film transistors and one storage capacitor, embodiments according to the present disclosure are not limited thereto. For example, according to some example embodiments, the pixel circuit PC may include additional transistors, capacitors, or other electrical components without departing from the spirit and scope of embodiments according to the present disclosure.

5 FIG. 1 2 3 4 5 6 7 Referring to, a pixel circuit PC may include a driving thin film transistor T, a switching thin film transistor T, a compensation thin film transistor T, a first initialization thin film transistor T, an operation control thin film transistor T, an emission control thin film transistor T, and a second initialization thin film transistor T.

5 FIG. Althoughillustrates that each pixel circuit PC includes signal lines SL, SL−1, SL+1, EL, and DL, an initialization voltage line VL, and a driving voltage line PL, embodiments according to the present disclosure are not limited thereto. According to some example embodiments, at least one of the signal lines, namely, the scan line SL, the previous scan line SL−1, the next scan line SL+1, the emission control line EL, and the data line DL, or/and the initialization voltage line VL may be shared between adjacent pixel circuits.

1 6 1 2 A drain electrode of the driving thin film transistor Tmay be electrically connected to the organic light emitting diode OLED via the emission control thin film transistor T. The driving thin film transistor Tmay receive a data signal Dm according to a switching operation of the switching thin film transistor Tand supply a driving current to the organic light emitting diode OLED.

2 2 1 5 A gate electrode of the switching thin film transistor Tmay be connected to the scan line SL and a source electrode thereof may be connected to the data line DL. A drain electrode of the switching thin film transistor Tmay be connected to a source electrode of the driving thin film transistor Tand connected to the driving voltage line PL via the operation control thin film transistor T.

2 1 The switching thin film transistor Tmay be turned on according to the scan signal Sn received through the scan line SL and perform a switching operation of transmitting the data signal Dm received from the data line DL to the source electrode of the driving thin film transistor T.

3 3 1 6 3 4 1 3 1 1 A gate electrode of the compensation thin film transistor Tmay be connected to the scan line SL. A source electrode of the compensation thin film transistor Tmay be connected to the drain electrode of the driving thin film transistor Tand connected to a pixel electrode of the organic light emitting diode OLED via the emission control thin film transistor T. A drain electrode of the compensation thin film transistor Tmay be connected to any one electrode of the storage capacitor Cst, a source electrode of the first initialization thin film transistor T, and a gate electrode of the driving thin film transistor T. The compensating thin film transistor Tmay be turned on according to the scan signal Sn received through the scan line SL and connect the gate electrode and the drain electrode of the driving thin film transistor Tto each other, thus achieving diode-connection of the driving thin film transistor T.

4 4 4 3 1 4 1 1 A gate electrode of the first initialization thin film transistor Tmay be connected to a previous scan line SL−1. A drain electrode of the first initialization thin film transistor Tmay be connected to the initialization voltage line VL. A source electrode of the first initialization thin film transistor Tmay be connected to any one electrode of the storage capacitor Cst, the drain electrode of the compensation thin film transistor T, and the gate electrode of the driving thin film transistor T. The first initialization thin film transistor Tmay be turned on according to a previous scan signal Sn−1 received through the previous scan line SL−1, to perform an initialization operation of initializing the voltage of the gate electrode of the driving thin film transistor Tby transmitting an initialization voltage Vint to the gate electrode of the driving thin film transistor T.

5 5 5 1 2 A gate electrode of the operation control thin film transistor Tmay be connected to an emission control line EL. A source electrode of the operation control thin film transistor Tmay be connected to the driving voltage line PL. A drain electrode of the operation control thin film transistor Tmay be connected to the source electrode of the driving thin film transistor Tand the drain electrode of the switching thin film transistor T.

6 6 1 3 6 5 6 A gate electrode of the emission control thin film transistor Tmay be connected to the emission control line EL. A source electrode of the emission control thin film transistor Tmay be connected to the drain electrode of the driving thin film transistor Tand the source electrode of the compensation thin film transistor T. A drain electrode of the emission control thin film transistor Tmay be electrically connected to the pixel electrode of the organic light emitting diode OLED. The operation control thin film transistor Tand the emission control thin film transistor Tmay be simultaneously turned on according to an emission control signal En received through the emission control line EL, such that the driving voltage ELVDD may be transmitted to the organic light emitting diode OLED and the driving current may flow through the organic light emitting diode OLED.

7 7 7 7 A gate electrode of the second initialization thin film transistor Tmay be connected to the next scan line SL+1. A source electrode of the second initialization thin film transistor Tmay be connected to the pixel electrode of the organic light emitting diode OLED. A drain electrode of the second initialization thin film transistor Tmay be connected to the initialization voltage line VL. The second initialization thin film transistor Tmay initialize the pixel electrode of the organic light emitting diode OLED by being turned on according to a next scan signal Sn+1 received through the next scan line SL+1.

5 FIG. 4 7 4 7 Althoughillustrates a case where the first initialization thin film transistor Tand the second initialization thin film transistor Tare respectively connected to the previous scan line SL−1 and the next scan signal SL+1, embodiments according to the present disclosure are not limited thereto. According to some example embodiments, both the first initialization thin film transistor Tand the second initialization thin film transistor Tmay be connected to the previous scan line SL−1 to be driven according to the previous scan signal Sn−1.

1 3 4 The other electrode of the storage capacitor Cst may be connected to the driving voltage line PL. Any one electrode of the storage capacitor Cst may be connected to the gate electrode of the driving thin film transistor T, the drain electrode of the compensation thin film transistor T, and the source electrode of the first initialization thin film transistor T.

1 An opposite electrode (e.g., a cathode electrode) of the organic light emitting diode OLED may receive a common voltage ELVSS. The organic light emitting diode OLED may receive a driving current from the driving thin film transistor Tto emit light.

4 5 FIGS.and The pixel circuit PC is not limited to the number of components and circuit design of the thin film transistors and storage capacitor described with reference to, and the number of electrical components and circuit design thereof may be variously modified without departing from the spirit and scope of embodiments according to the present disclosure.

5 FIG. 5 FIG. 4 FIG. The pixel circuits PC driving the main subpixel Pm and the auxiliary subpixel Pa may be provided in the same manner or may be provided in different manners. For example, the pixel circuits PC driving the main subpixel Pm and the auxiliary subpixel Pa may be provided as the pixel circuit PC illustrated in. According to some example embodiments, the pixel circuit PC driving the main subpixel Pm may use the pixel circuit PC illustrated in, and the pixel circuit PC driving the auxiliary subpixel Pa may use the pixel circuit PC illustrated in.

6 FIG. is an arrangement diagram schematically illustrating a pixel arrangement structure in a main display area according to some example embodiments.

A plurality of main subpixels Pm may be arranged in the main display area MDA. In the specification, a subpixel may refer to an emission area as a minimum unit for implementing an image. When an organic light emitting diode is used as a display element, the emission area may be defined by the opening of a pixel definition layer. This will be described in more detail below.

6 FIG. As in, the main subpixels Pm arranged in the main display area MDA may be arranged in a PenTile structure. The main subpixels Pm may include a first subpixel Pr, a second subpixel Pg, and a third subpixel Pb, and the first subpixel Pr, the second subpixel Pg, and the third subpixel Pb may implement a red color, a green color, and a blue color, respectively.

1 2 3 4 A plurality of first subpixels Pr and a plurality of third subpixels Pb may be alternately arranged in a first rowN, a plurality of second subpixels Pg may be arranged at certain intervals in a second rowN adjacent thereto, and a plurality of third subpixels Pb and a plurality of first subpixels Pr may be alternately arranged in a third rowN adjacent thereto, a plurality of second subpixels Pg may be arranged at certain intervals in a fourth rowN adjacent thereto, and this pixel arrangement may be repeated up to an Nth row. In this case, the first subpixel Pr and the third subpixel Pb may be larger than the second subpixel Pg.

1 2 1 2 3 4 The plurality of first subpixels Pr and the plurality of third subpixels Pb arranged in the first rowN, and the plurality of second subpixels Pg arranged in the second rowN may be alternately arranged. Thus, a plurality of first subpixels Pr and a plurality of third subpixels Pb may be alternately arranged in a first columnM, a plurality of second subpixels Pg may be arranged at certain intervals in a second columnM adjacent thereto, and a plurality of third subpixels Pb and a plurality of first subpixels Pr may be alternately arranged in a third columnM adjacent thereto, a plurality of second subpixels Pg may be arranged at certain intervals in a fourth columnM adjacent thereto, and this pixel arrangement may be repeated up to an Mth column.

When this pixel arrangement structure is expressed differently, it may be stated that the first subpixels Pr are arranged at the first and third vertexes facing each other among the vertexes of a virtual square VS having a central point of the second subpixel Pg as a central point thereof and the third subpixels Pb are arranged at the second and fourth vertexes that are the other vertexes thereof. In this case, the virtual square VS may be variously modified into a rectangle, a rhombus, a square, or the like.

This pixel arrangement structure may be referred to as a PenTile matrix structure or a PenTile structure. By applying rendering, in which a color of a pixel is represented by sharing the colors of its adjacent pixels, a high resolution may be obtained via a small number of pixels.

6 FIG. Althoughillustrates that a plurality of main subpixels Pm are arranged in a PenTile matrix structure, embodiments according to the present disclosure are not limited thereto. For example, a plurality of main subpixels Pm may be arranged in various forms such as a stripe structure, a mosaic arrangement structure, and a delta arrangement structure.

7 8 FIGS.and 7 FIG. are arrangement diagrams schematically illustrating a pixel arrangement structure in a component area according to some example embodiments. Referring to, a plurality of auxiliary subpixels Pa may be arranged in the component area CA. Each of the auxiliary subpixels Pa may emit light of any one of red, green, blue, and white.

The component area CA may include a pixel group PG including at least one or more auxiliary subpixels Pa, and a transmission area TA. The pixel group PG and the transmission area TA may be alternately arranged in the x direction and in the y direction and may be arranged, for example, in a grid form. In this case, the component area CA may include a plurality of pixel groups PG and a plurality of transmission areas TA.

7 FIG. The pixel group PG may be defined as a subpixel group in which a plurality of auxiliary subpixels Pa are bound in a preset unit. For example, as illustrated in, one pixel group PG may include eight auxiliary subpixels Pa arranged in a PenTile structure. That is, one pixel group PG may include two first subpixels Pr′, four second subpixels Pg′, and two third subpixels Pb′.

7 FIG. In the component area CA, a basic unit U in which a certain number of pixel groups PG and a certain number of transmission areas TA are bound may be repeatedly arranged in the x direction and the y direction. In, the basic unit U may have a form in which two pixel groups PG and two transmission areas TA arranged therearound are bound in a square shape. The basic unit U is a division of the repeated form and does not mean a disconnection of the configuration.

A corresponding unit U′ having the same area as the basic unit U may be set in the main display area MDA. In this case, the number of main subpixels Pm included in the corresponding unit U′ may be greater than the number of auxiliary subpixels Pa included in the basic unit U. That is, the number of auxiliary subpixels Pa included in the basic unit U may be 16 and the number of main subpixels Pm included in the corresponding unit U′ may be 32 such that the number of auxiliary subpixels Pa and the number of main subpixels Pm arranged per the same area may be in the ratio of 1:2.

7 FIG. A pixel arrangement structure of the component area CA in which the arrangement structure of auxiliary subpixels Pa is a PenTile structure as inand the resolution thereof is ½ of the resolution of the main display area MDA will be referred to as a ½ PenTile structure. The number or arrangement of auxiliary subpixels Pa included in the pixel group PG may be modified according to the resolution of the component area CA.

8 FIG. Referring to, a pixel arrangement structure of the component area CA may be a ¼ PenTile structure. According to some example embodiments, eight auxiliary subpixels Pa may be arranged in a PenTile structure in a pixel group PG, but only one pixel group PG may be included in a basic unit U. The remaining area of the basic unit U may be provided as a transmission area TA. Thus, the number of auxiliary subpixels Pa and the number of main subpixels Pm arranged per the same area may be in the ratio of 1:4. In this case, one pixel group PG may be surrounded by the transmission area TA.

7 8 FIGS.and Althoughillustrate that a plurality of auxiliary subpixels Pa are arranged in a PenTile matrix structure, embodiments according to the present disclosure are not limited thereto. For example, a plurality of auxiliary subpixels Pa may be arranged in various forms such as a stripe structure, a mosaic arrangement structure, and a delta arrangement structure.

7 8 FIGS.and 6 FIG. Also, althoughillustrate that the size of the auxiliary subpixel Pa is equal to the size of the main subpixel Pm of, embodiments according to the present disclosure are not limited thereto. The size of the auxiliary subpixel Pa may be greater than the size of the main subpixel Pm emitting the same color. For example, the size of the third subpixel Pb of the auxiliary subpixel Pa may be greater than the size of the third subpixel Pb′ of the main subpixel Pm. The difference in the size therebetween may be designed considering the difference in the brightness and/or the resolution between the component area CA and the main display area MDA.

9 FIG. is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which schematically illustrates a main display area and a component area.

9 FIG. 10 Referring to, a display panelmay include a main display area MDA and a component area CA. A main subpixel Pm may be arranged in the main display area MDA, and the component area CA may include an auxiliary subpixel Pa and a transmission area TA. A main pixel circuit PC including a main thin film transistor TFT and a main storage capacitor Cst, and a main organic light emitting diode OLED as a display element connected to the main pixel circuit PC may be arranged in the main display area MDA. An auxiliary pixel circuit PC′ including an auxiliary thin film transistor TFT′ and an auxiliary storage capacitor Cst′, and an auxiliary organic light emitting diode OLED′ as a display element connected to the auxiliary pixel circuit PC′ may be arranged in the component area CA.

According to some example embodiments, an organic light emitting diode is used as a display element; however, in other embodiments, an inorganic light emitting device, or a quantum dot light emitting device may be used as a display element.

10 10 100 111 Hereinafter, a structure in which the components included in the display panelare stacked will be described. The display panelmay include a stack of a substrate, a buffer layer, a circuit layer PCL, a display element layer EDL, and a thin film encapsulation layer TFEL as an encapsulation member.

100 100 The substratemay include an insulating material such as a polymer resin. The substratemay include a flexible substrate capable of bending, folding, rolling, or the like.

100 101 102 103 104 According to some example embodiments, the substratemay include a first layer, a first barrier layer, a second layer, and a second barrier layerthat are sequentially stacked.

101 103 101 103 101 103 102 104 The first layerand the second layermay include a polymer resin having high heat resistance. For example, the first layerand the second layermay include at least one of polyethersulfone, polyacrylate, polyether imide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, or polyaryleneethersulfone. For example, the first layerand the second layermay include polyimide. The first barrier layerand the second barrier layermay block the penetration of external air.

111 100 100 100 111 111 111 X X X X The buffer layermay be located on the substrateand may reduce or prevent infiltration of a foreign material, moisture, or ambient air from below the substrateand may provide a flat surface on the substrate. The buffer layermay include an inorganic material, such as an oxide or nitride, an organic material, or an organic-inorganic composite material, and may have a single layer structure or a multilayer structure including an inorganic material or an organic material. According to some example embodiments, the buffer layermay include silicon oxide (SiO) or silicon nitride (SiN). According to some example embodiments, the buffer layermay include a stack of silicon oxide (SiO) and silicon nitride (SiN).

100 111 In the component area CA, a bottom metal layer BML may be arranged between the substrateand the buffer layer. The bottom metal layer BML may be located below the auxiliary pixel circuit PC′ and may prevent or reduce instances of characteristics of the auxiliary thin film transistor TFT′ degrading due to light emitted from, for example, a component. Also, the bottom metal layer BML may prevent or reduce instances of the light emitted from the component or the like or directed to the component being diffracted through a narrow gap between the lines connected to the auxiliary pixel circuit PC′. The bottom metal layer BML may not be in the transmission area TA.

A bias voltage may be applied to the bottom metal layer BML. By receiving the bias voltage, the bottom metal layer BML may significantly reduce the probability of occurrence of an electrostatic discharge. The bottom metal layer BML may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu). The bottom metal layer BML may be a single layer or a multiple layer including the above materials.

111 112 113 115 117 The circuit layer PCL may be arranged over the buffer layerand may include pixel circuits PC and PC′, a first insulating layer, a second insulating layer, a third insulating layer, and a first planarization layer. The main pixel circuit PC may include a main thin film transistor TFT and a main storage capacitor Cst, and the auxiliary pixel circuit PC′ may include an auxiliary thin film transistor TFT′ and an auxiliary storage capacitor Cst′.

111 1 1 1 1 2 2 2 2 The main thin film transistor TFT and/or the auxiliary thin film transistor TFT′ may be above the buffer layer. The main thin film transistor TFT may include a first semiconductor layer A, a first gate electrode G, a first source electrode S, and a first drain electrode D, and the auxiliary thin film transistor TFT′ may include a second semiconductor layer A, a second gate electrode G, a second source electrode S, and a second drain electrode D. The main thin film transistor TFT may be connected to the main organic light emitting diode OLED and may drive the main organic light emitting diode OLED. The auxiliary thin film transistor TFT′ may be connected to the auxiliary organic light emitting diode OLED′ to drive the auxiliary organic light emitting diode OLED′.

1 2 111 1 2 1 2 1 2 The first semiconductor layer Aand the second semiconductor layer Amay be arranged over the buffer layerand may include polysilicon. According to some example embodiments, the first semiconductor layer Aand the second semiconductor layer Amay include amorphous silicon. According to some example embodiments, the first semiconductor layer Aand the second semiconductor layer Amay include an oxide of at least one of indium (In), gallium (Ga), stannum (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), or zinc (Zn). The first semiconductor layer Aand the second semiconductor layer Amay include a channel area and a source area and a drain area that are doped with dopants.

2 111 2 2 100 The second semiconductor layer Amay overlap the bottom metal layer BML with the buffer layertherebetween. According to some example embodiments, the width of the second semiconductor layer Amay be less than the width of the bottom metal layer BML, and thus, the second semiconductor layer Amay entirely overlap the bottom metal layer BML in the direction perpendicular to the substrate.

112 1 2 112 112 X X X Y 2 3 2 2 5 2 2 The first insulating layermay be provided to cover the first semiconductor layer Aand the second semiconductor layer A. The first insulating layermay include an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), and hafnium oxide (HfO), or zinc oxide (ZnO). The first insulating layermay include a single layer or a multiple layer including the above inorganic insulating material.

1 2 112 1 2 1 2 1 2 The first gate electrode Gand the second gate electrode Gmay be arranged over the first insulating layerto respectively overlap the first semiconductor layer Aand the second semiconductor layer A. The first gate electrode Gand the second gate electrode Gmay include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer. According to some example embodiments, the first gate electrode Gand the second gate electrode Gmay include a molybdenum (Mo) single layer.

113 1 2 113 113 X X X Y 2 3 2 2 5 2 2 The second insulating layermay be provided to cover the first gate electrode Gand the second gate electrode G. The second insulating layermay include an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), and hafnium oxide (HfO), or zinc oxide (ZnO). The second insulating layermay include a single layer or a multiple layer including the above inorganic insulating material.

2 2 113 A first upper electrode CEof the main storage capacitor Cst and a second upper electrode CE′ of the auxiliary storage capacitor Cst′ may be arranged over the second insulating layer.

2 1 1 2 113 1 1 1 1 In the main display area MDA, the first upper electrode CEmay overlap the first gate electrode Garranged thereunder. The first gate electrode Gand the first upper electrode CEoverlapping each other with the second insulating layertherebetween may constitute the main storage capacitor Cst. According to some example embodiments, the first gate electrode Gmay be a first lower electrode CEof the main storage capacitor Cst. According to some example embodiments, the first lower electrode CEof the main storage capacitor Cst may be an independent component separate from the first gate electrode Gof the main thin film transistor TFT.

2 2 2 2 113 2 1 1 2 In the component area CA, the second upper electrode CE′ may overlap the second gate electrode Garranged thereunder. The second gate electrode Gand the second upper electrode CE′ overlapping each other with the second insulating layertherebetween may constitute the auxiliary storage capacitor Cst′. According to some example embodiments, the second gate electrode Gmay be a second lower electrode CE′ of the auxiliary storage capacitor Cst′. According to some example embodiments, the second lower electrode CE′ of the auxiliary storage capacitor Cst′ may be an independent component separate from the second gate electrode Gof the auxiliary thin film transistor TFT′.

2 2 The first upper electrode CEand the second upper electrode CE′ may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu) and may include a single layer or a multiple layer of the above material.

115 2 2 115 X X X Y 2 3 2 2 5 2 2 The third insulating layermay be provided to cover the first upper electrode CEand the second upper electrode CE′. The third insulating layermay include an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), and hafnium oxide (HfO), or zinc oxide (ZnO).

112 113 115 1 1 100 111 1 112 113 115 1 When the first insulating layer, the second insulating layer, and the third insulating layerare collectively referred to as an inorganic insulating layer IL, the inorganic insulating layer IL may include a first hole Hcorresponding to the transmission area TA. The first hole Hmay expose a portion of the top surface of the substrateor the buffer layer. The first hole Hmay overlap an opening of the first insulating layer, an opening of the second insulating layer, and an opening of the third insulating layerformed to correspond to the transmission area TA. These openings may be individually formed through separate processes, or may be simultaneously formed through the same process. When the openings are formed in separate processes, the inner surface of the first hole Hmay not be smooth and may have a stair-shaped step.

111 0 0 100 0 1 111 1 0 Moreover, according to some example embodiments, the buffer layermay include a buffer hole Hcorresponding to the transmission area TA. The buffer hole Hmay expose a portion of the top surface of the substrate. The area of the buffer-hole Hmay be less than the area of the first hole H. Because the buffer layerand the inorganic insulating layer IL include the first and buffer holes Hand Hcorresponding to the transmission area TA, the light transmittance of the component area CA may be improved.

1 2 1 2 115 1 2 1 2 1 2 1 2 The data line DL, the source electrodes Sand S, and the drain electrodes Dand Dmay be arranged over the third insulating layer. The data line DL, the source electrodes Sand S, and the drain electrodes Dand Dmay include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like and may include a single layer or a multiple layer including the above material. For example, the data line DL, the source electrodes Sand S, and the drain electrodes Dand Dmay include a multilayer structure of titanium (Ti)/aluminum (Al)/titanium (Ti).

117 1 2 1 2 117 121 121 The first planarization layermay be arranged to cover the data line DL, the source electrodes Sand S, and the drain electrodes Dand D. The first planarization layermay have a flat top surface such that a first pixel electrodeand a second pixel electrode′ arranged thereover may be flat.

117 117 117 117 X X X Y 2 3 2 2 5 2 2 The first planarization layermay include an organic material or an inorganic material and may have a single-layer structure or a multilayer structure. The first planarization layermay include a general-purpose polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethylmethacrylate (PMMA), or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, or a vinyl alcohol-based polymer. Moreover, the first planarization layermay include an inorganic insulating material such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), and hafnium oxide (HfO), or zinc oxide (ZnO). When the first planarization layeris formed, after a layer is formed, chemical mechanical polishing may be performed on a top surface of the layer to provide a flat top surface.

117 2 2 1 2 1 117 1 2 1 9 FIG. The first planarization layermay include a second hole Hcorresponding to the transmission area TA. The second hole Hmay overlap the first hole H.illustrates that the second hole His larger than the first hole H. According to some example embodiments, the first planarization layermay be provided to cover the edge of the first hole Hof the inorganic insulating layer IL such that the area of the second hole Hmay be less than the area of the first hole H.

117 1 1 121 1 1 117 2 2 121 2 2 The first planarization layermay include a via hole for exposing any one of the first source electrode Sand the first drain electrode Dof the main thin film transistor TFT, and the first pixel electrodemay be electrically connected to the main thin film transistor TFT by contacting the first source electrode Sor the first drain electrode Dthrough the via hole. Also, the first planarization layermay include a via hole for exposing any one of the second source electrode Sand the second drain electrode Dof the auxiliary thin film transistor TFT′, and the second pixel electrode′ may be electrically connected to the auxiliary thin film transistor TFT′ by contacting the second source electrode Sor the second drain electrode Dthrough the via hole.

121 121 121 121 121 121 121 121 2 3 2 3 The first pixel electrodeand the second pixel electrode′ may include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (InO), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). The first pixel electrodeand the second pixel electrode′ may include a reflection layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or any compound thereof. For example, the first pixel electrodeand the second pixel electrode′ may have a structure including layers formed of ITO, IZO, ZnO, or InOover/under the reflection layer. In this case, the first pixel electrodeand the second pixel electrode′ may have a structure in which indium tin oxide (ITO)/silver (Ag)/indium tin oxide (ITO) are sequentially stacked.

119 121 121 117 1 2 121 121 1 2 A pixel definition layermay cover the edges of the first pixel electrodeand the second pixel electrode′ over the first planarization layerand may include a first opening OPand a second opening OPfor exposing at least a portion of the first pixel electrodeand the second pixel electrode′. The first opening OPand the second opening OPmay define the emission areas of the organic light emitting diodes OLED and OLED′, that is, the sizes and shapes of the subpixels Pm and Pa.

119 121 121 123 121 121 121 121 119 119 The pixel definition layermay increase the distance between the edge of the pixel electrodesand′ and an opposite electrodeover the pixel electrodesand′ to prevent an arc or the like from occurring at the edge of the pixel electrodesand′. The pixel definition layermay be formed of an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, hexamethyldisiloxane (HMDSO), or phenol resin by spin coating or the like. Also, according to some example embodiments, a spacer may be further provided over the pixel definition layer.

119 3 3 1 2 1 3 123 1 3 The pixel definition layermay include a third hole Hcorresponding to the transmission area TA. The third hole Hmay overlap the first hole Hand the second hole H. The light transmittance in the transmission area TA may be improved by the first hole Hto the third hole Hlocated in the transmission area TA. A portion of the opposite electrodedescribed below may be arranged at the inner surface of the first hole Hto the third hole H.

122 122 1 2 119 121 121 122 122 b b b b A first emission layerand a second emission layer′ may be arranged inside the first opening OPand the second opening OPof the pixel definition layerto respectively correspond to the first pixel electrodeand the second pixel electrode′. The first emission layerand the second emission layer′ may include a high molecular weight organic material or a low molecular weight organic material and may emit red, green, blue, or white light.

122 122 122 122 122 122 122 122 e b b e a c a c An organic functional layermay be arranged over and/or under the first emission layerand the second emission layer′. The organic functional layermay include a first functional layerand/or a second functional layer. The first functional layeror the second functional layermay be omitted.

122 122 122 122 122 122 122 a b b a a a a The first functional layermay be arranged under the first emission layerand the second emission layer′. The first functional layermay include a single layer or a multiple layer including an organic material. The first functional layermay include a hole transport layer (HTL) having a single-layer structure. Alternatively, the first functional layermay include a hole injection layer (HIL) and an HTL. The first functional layermay be integrally provided to correspond to the main and auxiliary organic light emitting diodes OLED and OLED′ included in the main display area MDA and the component area CA.

122 122 122 122 122 122 c b b c c c The second functional layermay be arranged over the first emission layerand the second emission layer′. The second functional layermay include a single layer or a multiple layer including an organic material. The second functional layermay include an electron transport layer (ETL) and/or an electron injection layer (EIL). The second functional layermay be integrally provided to correspond to the organic light emitting diodes OLED and OLED′ included in the main display area MDA and the component area CA.

123 122 123 123 123 123 c 2 3 The opposite electrodemay be arranged over the second functional layer. The opposite electrodemay include a conductive material having a low work function. For example, the opposite electrodemay include a (semi) transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or any alloy thereof. Alternatively, the opposite electrodemay further include a layer, such as ITO, IZO, ZnO, or InO, on the (semi) transparent layer including any of the above materials. The opposite electrodemay be integrally formed to correspond to the organic light emitting diodes OLED and OLED′ included in the main display area MDA and the component area CA.

121 123 121 123 The layers from the first pixel electrodeto the opposite electrodeformed in the main display area MDA may constitute the main organic light emitting diode OLED. The layers from the second pixel electrode′ to the opposite electrodeformed in the component area CA may constitute the auxiliary organic light emitting diode OLED′.

123 123 123 A capping layer including an organic material may be formed over the opposite electrode. The capping layer may be provided to protect the opposite electrodeand improve light extraction efficiency. The capping layer may include an organic material having a higher refractive index than the opposite electrode.

123 1 1 9 FIG. The opposite electrodemay include a transmission hole TAH corresponding to the transmission area TA. The transmission hole TAH corresponding to the transmission area TA may be understood as the transmission hole TAH overlapping the transmission area TA.illustrates that the area of the transmission hole TAH is more than the area of the first hole Hformed in the inorganic insulating layer IL. However, embodiments according to the present disclosure are not limited thereto. According to some example embodiments, the area of the transmission hole TAH may be less than or equal to the area of the first hole H.

123 123 123 100 123 123 123 123 Due to the transmission hole TAH, a portion of the opposite electrodemay not be in the transmission area TA, and accordingly, the light transmittance in the transmission area TA may be significantly improved. The opposite electrodeincluding the transmission hole TAH may be formed in various ways. According to some example embodiments, after a material used to form the opposite electrodeis deposited on the entire surface of the substrate, a portion of the deposited material that corresponds to the transmission area TA may be removed through laser lift off, and thus the opposite electrodehaving the transmission hole TAH may be formed. According to some example embodiments, the opposite electrodehaving the transmission hole TAH may be formed by metal self patterning (MSP). According to some example embodiments, the opposite electrodeincluding the transmission hole TAH may be formed by depositing the opposite electrodeby using a fine metal mask (FMM).

The bottom metal layer BML of the component area CA may be provided to correspond to the entire component area CA. In this case, the bottom metal layer BML may include a bottom hole BMLH overlapping the transmission area TA. According to some example embodiments, the shape and size of the transmission area TA may be defined by the shape and size of the bottom hole BMLH.

10 123 The thin film encapsulation layer TFEL as an encapsulation member ENCM may be arranged over the display element layer EDL of the display panel. That is, the organic light emitting diodes OLED and OLED′ may be encapsulated by the thin film encapsulation layer TFEL. The thin film encapsulation layer TFEL may be arranged over the opposite electrode. The thin film encapsulation layer TFEL may prevent external moisture or foreign substances from penetrating into the organic light emitting diodes OLED and OLED′.

9 FIG. 131 132 133 The thin film encapsulation layer TFEL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer, and in this regard,illustrates a structure in which a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layerare stacked. According to some example embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order thereof may be changed.

131 133 132 X X X Y 2 3 2 2 5 2 2 The first inorganic encapsulation layerand the second inorganic encapsulation layermay include one or more inorganic insulating materials such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), aluminum oxide (AlO), titanium oxide (TiO), tantalum oxide (TaO), and hafnium oxide (HfO), or zinc oxide (ZnO) and may be formed by chemical vapor deposition (CVD) or the like. The organic encapsulation layermay include a polymer-based material. Examples of the polymer-based material may include silicone resin, acrylic resin, epoxy resin, polyimide, polyethylene, or the like.

131 132 133 131 132 1 131 132 2 117 3 119 The first inorganic encapsulation layer, the organic encapsulation layer, and the second inorganic encapsulation layermay be integrally formed to cover the main display area MDA and the component area CA. Accordingly, the first inorganic encapsulation layerand the organic encapsulation layermay be arranged in the first hole Hof the inorganic insulating layer IL. Also, the first inorganic encapsulation layerand the organic encapsulation layermay be arranged in the second hole Hof the first planarization layerand in the third hole Hof the pixel definition layer.

10 FIG. 10 FIG. 9 FIG. 10 FIG. 9 FIG. 117 119 is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which schematically illustrates a main display area and a component area. The embodiments described with respect tomay be different from the embodiments described with respect toin that a second planarization layer and contact electrodes CM and CM′ are further provided between the first planarization layerand the pixel definition layer. In, like reference numerals as those indenote like members, and thus, some redundant descriptions thereof may be omitted for conciseness.

10 FIG. 118 117 118 121 121 118 117 118 117 118 117 Referring to, a second planarization layermay be arranged over the first planarization layer. The second planarization layermay have a flat top surface such that a first pixel electrodeand a second pixel electrode′ arranged thereover may be flat. According to some example embodiments, the second planarization layermay include the same material as the first planarization layer. According to some example embodiments, the second planarization layermay include a different material than the first planarization layer. Because the second planarization layeris further provided over the first planarization layer, there may be relatively high integration.

118 4 4 1 2 4 1 2 118 1 2 117 4 1 2 10 FIG. The second planarization layermay include a fourth hole Hcorresponding to the transmission area TA. The fourth hole Hmay overlap the first hole Hand the second hole H.illustrates that the fourth hole His larger than the first hole Hand the second hole H. According to some example embodiments, the second planarization layermay be provided to cover the edge of the first hole Hof the inorganic insulating layer IL or the edge of the second hole Hof the first planarization layersuch that the area of the fourth hole Hmay be less than the area of the first hole Hor the second hole H.

117 121 121 117 Contact electrodes CM and CM′ may be arranged over the first planarization layer. The first pixel electrodeand the second pixel electrode′ may be respectively electrically connected to the main thin film transistor TFT and the auxiliary thin film transistor TFT′ through the contact electrodes CM and CM′ arranged over the first planarization layer.

11 FIG. 10 FIG. is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which corresponds to an enlarged cross-sectional view of region A of.

11 FIG. 117 118 119 1 4 1 4 1 4 132 40 Referring to, the inorganic insulating layer IL, the first planarization layer, the second planarization layer, and the pixel definition layermay respectively include the first hole Hto the fourth hole Hcorresponding to the transmission area TA. Because the first hole Hto the fourth hole Hare provided to correspond to the transmission area TA, the light transmittance of the component area CA may be improved; however, a step may occur between the transmission area TA, the main display area MDA, and the component area CA excluding the transmission area TA due to the first hole Hto the fourth hole Hprovided to correspond to the transmission area TA and thus the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA may be degraded. For example, as the flatness of the organic encapsulation layerof the thin film encapsulation layer TFEL arranged over the transmission area TA degrades, the componentarranged under the display panel corresponding to the component area CA may be out of focus.

119 118 1 118 119 118 119 119 118 132 119 119 1 118 119 132 119 1 118 132 According to some example embodiments, the pixel definition layermay be arranged over the second planarization layerand may have a thickness tof about 1.3 μm to about 2 μm from the upper surface of the second planarization layer. When the pixel definition layerhas a thickness of less than about 1.3 μm from the upper surface of the second planarization layer, the pixel definition layermay fail to maintain its thickness and area and thus may collapse. Also, when the pixel definition layerhas a thickness of more than about 2 μm from the upper surface of the second planarization layer, the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be suppressed due to the thickness of the pixel definition layerand thus the organic material may not flow toward the transmission area TA and thus the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA may degrade. Thus, because the pixel definition layerhas a thickness tof about 1.3 μm to about 2 μm from the upper surface of the second planarization layer, the pixel definition layermay be prevented from collapsing and the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be improved to improve the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA. That is, as the pixel definition layerhas a thickness tof about 1.3 μm to about 2 μm from the upper surface of the second planarization layer, the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may flow better toward the transmission area TA and thus the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA may be improved.

119 119 1 118 Also, when a spacer is further provided over the pixel definition layer, the sum of the thickness of the pixel definition layerand the thickness of the spacer may be a thickness tof about 1.3 μm to about 2 μm from the upper surface of the second planarization layer.

119 118 119 118 119 118 119 119 118 132 119 118 119 132 119 118 132 According to some example embodiments, the pixel definition layermay be arranged over the second planarization layer, and the side surface of the pixel definition layermay form an angle θ of about 30 degrees to about 40 degrees with respect to the upper surface of the second planarization layer. When the angle between the side surface of the pixel definition layerand the upper surface of the second planarization layeris less than about 30 degrees, the pixel definition layermay fail to maintain its thickness and area and thus may collapse. Also, when the angle between the side surface of the pixel definition layerand the upper surface of the second planarization layeris more than about 40 degrees, the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be suppressed and thus the organic material may not flow toward the transmission area TA and thus the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA may degrade. Thus, because the angle between the side surface of the pixel definition layerand the upper surface of the second planarization layeris about 30 degrees to about 40 degrees, the pixel definition layermay be prevented from collapsing and the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be improved to improve the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA. Thus, as the angle between the side surface of the pixel definition layerand the upper surface of the second planarization layeris about 30 degrees to about 40 degrees, the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be improved and thus the flatness of the thin film encapsulation layer TFEL arranged over the transmission area TA may be improved.

119 121 121 119 121 121 Because the pixel definition layeraccording to some example embodiments is arranged over the first pixel electrodeand the second pixel electrode′, the angle between the side surface of the pixel definition layerand the upper surface of the first pixel electrodeand the second pixel electrode′ may also be about 30 degrees to about 40 degrees.

132 132 132 According to some example embodiments, in order to secure the flatness of the thin film encapsulation layer TFEL over the transmission area TA, that is, in order to secure the flatness of the organic encapsulation layerover the transmission area TA, a larger amount of organic material for forming the organic encapsulation layermay be applied in the transmission area TA than in the main display area MDA and the component area CA excluding the transmission area TA. Also, an organic material for forming the organic encapsulation layermay be applied by a larger area in the transmission area TA than in the main display area MDA and the component area CA excluding the transmission area TA.

132 132 132 132 132 132 40 10 a a a According to some example embodiments, the organic encapsulation layerover the transmission area TA may have an upper surface, which is flat. That is, the upper surfaceof the organic encapsulation layerover the transmission area TA may be flat. Because the upper surfaceof the organic encapsulation layerover the transmission area TA is flat, the componentarranged under the display panelcorresponding to the component area CA may be prevented from being out of focus.

12 FIG. 10 FIG. 12 FIG. 11 FIG. 12 FIG. 11 FIG. 132 135 is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which corresponds to an enlarged cross-sectional view of region A of. The embodiments described with respect tomay be different from the embodiments described with respect toin that an organic encapsulation layerover the transmission area TA includes a concave portion. In, like reference numerals as those indenote like members, and thus, some redundant descriptions thereof may be omitted for conciseness.

12 FIG. 132 135 132 132 a Referring to, an organic encapsulation layerover the transmission area TA may include a concave portion. An upper surfaceof the organic encapsulation layerover the transmission area TA may be concave.

1 132 132 132 132 132 132 1 132 132 132 132 132 132 40 10 1 132 132 132 132 132 132 132 132 1 132 132 132 132 132 132 40 10 b a c a b a c a b a c a a b a c a According to some example embodiments, a distance dfrom a bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to a top surfaceof the upper surfaceof the organic encapsulation layermay be more than about 0 μm and less than or equal to about 2 μm. When the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris more than about 2 μm, the componentarranged under the display panelcorresponding to the component area CA may be out of focus. Also, when the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris about 0 μm, the upper surfaceof the organic encapsulation layermay not be considered as being concave. Thus, because the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris more than about 0 μm and less than or equal to 2 μm, the componentarranged under the display panelcorresponding to the component area CA may be prevented from being out of focus.

132 135 132 132 133 132 a Because the organic encapsulation layerover the transmission area TA includes the concave portionand thus the upper surfaceof the organic encapsulation layerover the transmission area TA is concave, the second inorganic encapsulation layerover the organic encapsulation layermay also be concave.

13 FIG. 10 FIG. 13 FIG. 11 FIG. 13 FIG. 11 FIG. 132 137 is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which corresponds to an enlarged cross-sectional view of region A of. The embodiments described with respect tomay be different from the embodiments described with respect toin that an organic encapsulation layerover the transmission area TA includes a convex portion. In, like reference numerals as those indenote like members, and thus, some redundant descriptions thereof may be omitted for conciseness.

13 FIG. 132 137 132 132 a Referring to, an organic encapsulation layerover the transmission area TA may include a convex portion. An upper surfaceof the organic encapsulation layerover the transmission area TA may be convex.

2 132 132 132 132 132 132 2 132 132 132 132 132 132 40 10 2 132 132 132 132 132 132 132 132 2 132 132 132 132 132 132 40 10 e a d a e a d a e a d a a e a d a According to some example embodiments, a distance dfrom a bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to a top surfaceof the upper surfaceof the organic encapsulation layermay be more than about 0 μm and less than or equal to about 2 μm. When the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris more than about 2 μm, the componentarranged under the display panelcorresponding to the component area CA may be out of focus. Also, when the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris about 0 μm, the upper surfaceof the organic encapsulation layermay not be considered as being convex. Thus, because the distance dfrom the bottom surfaceof the upper surfaceof the organic encapsulation layerover the transmission area TA to the top surfaceof the upper surfaceof the organic encapsulation layeris more than about 0 μm and less than or equal to 2 μm, the componentarranged under the display panelcorresponding to the component area CA may be prevented from being out of focus.

132 137 132 132 133 132 a Because the organic encapsulation layerover the transmission area TA includes the convex portionand thus the upper surfaceof the organic encapsulation layerover the transmission area TA is convex, the second inorganic encapsulation layerover the organic encapsulation layermay also be convex.

14 FIG. 14 FIG. 9 FIG. 14 FIG. 9 FIG. is a cross-sectional view illustrating a portion of a display panel according to some example embodiments, which schematically illustrates a main display area and a component area. The embodiments described with respect tomay be different from the embodiments described with respect toin that a touch screen layer TSL may be further arranged on the thin film encapsulation layer TFEL. In, like reference numerals as those indenote like members, and thus, some redundant descriptions thereof may be omitted for conciseness.

14 FIG. 210 230 250 220 210 230 240 230 250 220 240 230 220 240 119 Referring to, a touch screen layer TSL may be arranged over the thin film encapsulation layer TFEL. The touch screen layer TSL may include a first touch insulating layer, a second touch insulating layer, and a third touch insulating layer. Also, the touch screen layer TSL may include a first touch electrodearranged between the first touch insulating layerand the second touch insulating layerand a second touch electrodearranged between the second touch insulating layerand the third touch insulating layers. According to some example embodiments, the first touch electrodeand the second touch electrodemay be electrically connected through a contact hole defined in the second touch insulating layer. The first touch electrodeand the second touch electrodemay at least partially overlap the pixel definition layerarranged thereunder.

220 240 The touch screen layer TSL may include driving electrodes and sensing electrodes. The touch screen layer TSL may be driven by a two-layer mutual capacitance method in which a driving signal is applied to the driving electrodes and then voltages charged in mutual capacitors are sensed through the sensing electrodes. The first touch electrodeand the second touch electrodeof the touch screen layer TSL may be the driving electrode or the sensing electrode.

119 119 132 132 According to some example embodiments, because the pixel definition layerhas a thickness of about 1.3 μm to about 2 μm, and the side surface of the pixel definition layeris provided at an angle of about 30 degrees to about 40 degrees, the spreadability of the organic material constituting the organic encapsulation layerof the thin film encapsulation layer TFEL may be improved to improve the flatness of the organic encapsulation layerarranged over the transmission area TA.

132 132 40 10 Also, by improving the spreadability of the organic materials constituting the organic encapsulation layerof the thin film encapsulation layers TFEL to improve the flatness of the organic encapsulation layerarranged over the transmission area TA, the componentarranged under the display panelcorresponding to the component area CA may be prevented from being out of focus.

132 40 10 Also, the flatness and shape of the upper surface of the organic encapsulation layerover the transmission area TA may be adjusted according to the characteristics of the componentarranged under the display panelcorresponding to the component area CA.

As described above, in the display panel and the display apparatus including the display panel according to some example embodiments, the flatness of the organic encapsulation layer corresponding to the transmission area may be secured by reducing the thickness of the pixel definition layer.

It should be understood that embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features or aspects within each embodiment should typically be considered as available for other similar features or aspects in other embodiments. While one or more embodiments have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the following claims, and their equivalents.