Patentable/Patents/US-20250316662-A1
US-20250316662-A1

Display Device and Method of Manufacturing the Same

PublishedOctober 9, 2025
Assigneenot available in USPTO data we have
Inventorsnot available in USPTO data we have
Technical Abstract

A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

Patent Claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

. An electronic device comprising:

2

. The electronic device of, wherein

3

. The electronic device of, wherein the bank extension portion overlaps at least a portion of the via hole disposed in the subarea in a plan view.

4

. The electronic device of, further comprising a third connection electrode adjacent to the first connection electrode with the second connection electrode interposed therebetween,

5

. The electronic device of, wherein

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. The electronic device of, wherein the via hole overlaps the first electrode and the first connection electrode, and the entire first via hole overlaps the first electrode, in a plan view.

7

. The electronic device of, wherein the first connection electrode overlaps a portion of the via hole and does not overlap the bank extension portion in a plan view.

8

. The electronic device of, wherein an entire area of the bank extension portion overlaps the first electrode in a plan view.

9

. The electronic device of, wherein a side of the bank extension portion is disposed outside of a side of the adjacent first electrode in a plan view.

10

. The electronic device of, wherein a side of the bank extension portion is disposed outside of a side of the adjacent conductive pattern in a plan view.

11

. The electronic device of, further comprising:

12

. The electronic device of, further comprising:

13

. An electronic device comprising:

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. The electronic device of, further comprising a first connection electrode disposed on the first electrode and a second connection electrode disposed on the second electrode,

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. The electronic device of, wherein

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. A method of manufacturing an electronic device, the method comprising:

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. The method of, wherein the bank layer and the bank extension portion are simultaneously formed by forming a bank material layer on the via layer and patterning the bank material layer.

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. The method of, further comprising before the forming of the via layer, forming a protective layer disposed on the conductive pattern,

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. The method of, wherein the bank extension portion is formed such that an entire area of the bank extension portion overlaps the first electrode in a plan view.

20

. The method of, wherein the bank extension portion overlaps the via hole, the first electrode and the conductive pattern in a plan view.

Detailed Description

Complete technical specification and implementation details from the patent document.

This application is a continuation of U.S. application Ser. No. 17/889,916, filed on Aug. 17, 2022, which claims priority to and benefit of Korean Patent Application No. 10-2022-0008380 under 35 U.S.C. § 119, filed on Jan. 20, 2022, in the Korean Intellectual Property Office (KIPO), the disclosure of each of which is incorporated by reference herein in its entirety.

The disclosure relates to a display device and a method of manufacturing the same.

The importance of display devices is increasing with the development of multimedia. Accordingly, various display devices, such as an organic light-emitting display (OLED) device, a liquid crystal display (LCD) device, and the like, are used.

Display devices are devices that display an image, and include a display panel such as an organic light-emitting display panel or a liquid crystal display panel. Among these display panels, the display device may include light-emitting elements as a light-emitting display panel. For example, a light-emitting diode (LED) may include an organic light-emitting diode (OLED) that uses an organic material as a fluorescent material, an inorganic light-emitting diode that uses an inorganic material as a fluorescent material, or the like.

Aspects of the disclosure provide a display device capable of preventing short-circuit of adjacent electrodes and a method of manufacturing the same.

However, aspects of the disclosure are not restricted to those set forth herein. The above and other aspects of the disclosure will become more apparent to one of ordinary skill in the art to which the disclosure pertains by referencing the detailed description of the disclosure given below.

According to an embodiment of the disclosure, a display device may include a conductive pattern disposed on a substrate, a via layer disposed on the conductive pattern, comprising a via hole, and exposing the conductive pattern, a first electrode and a second electrode that are disposed on the via layer and spaced apart from each other, a first insulating layer disposed on the first electrode and the second electrode, a bank layer disposed on the first insulating layer defining an emission area and a subarea, a light-emitting element disposed on the first insulating layer in the emission area, and a first connection electrode and a second connection electrode that are disposed on the first insulating layer and the light-emitting element. The first connection electrode may electrically contact an end of the light-emitting element and the second connection electrode may electrically contact another end of the light-emitting element. The bank layer may include a bank extension portion extended to the subarea, and the bank extension portion may overlap at least a portion of the via hole in a plan view.

In an embodiment, the via hole may overlap the bank layer in a plan view, and at least a portion of the via hole may be disposed in the subarea.

In an embodiment, the bank extension portion may overlap at least a portion of the via hole disposed in the subarea in a plan view.

In an embodiment, the display device may further include a third connection electrode adjacent to the first connection electrode with the second connection electrode interposed therebetween. The first connection electrode and the third connection electrode may be disposed in parallel with each other in a plan view and may extend over the emission area and the subarea.

In an embodiment, the bank extension portion may be disposed between the first connection electrode and the third connection electrode, and the bank extension portion may protrude and extend from the bank layer in a direction parallel to the first connection electrode or the third connection electrode in a plan view.

In an embodiment, the via hole may overlap the first electrode and the first connection electrode, and the entire first via hole may overlap the first electrode, in a plan view.

In an embodiment, the first connection electrode may overlap a portion of the via hole and does not overlap the bank extension portion in a plan view.

In an embodiment, an entire area of the bank extension portion may overlap the first electrode in a plan view.

In an embodiment, a side of the bank extension portion may be disposed outside of a side of the adjacent first electrode in a plan view.

In an embodiment, a side of the bank extension portion may be disposed outside of a side of the adjacent conductive pattern in a plan view.

In an embodiment, the display device may further include a protective layer disposed between the conductive pattern and the via layer. The via hole may penetrate the via layer and the protective layer and may expose the conductive pattern.

In an embodiment, the display device may further include a second insulating layer disposed on the first insulating layer and the light-emitting element, and a third insulating layer disposed on the second insulating layer and overlapping the second connection electrode in a plan view. The second insulating layer and the third insulating layer may overlap the bank layer in a plan view.

According to an embodiment of the disclosure, a display device may include a conductive pattern disposed on a substrate, a via layer disposed on the conductive pattern, comprising a via hole, and exposing the conductive pattern, a first electrode and a second electrode that are disposed on the via layer and spaced apart from each other, and a bank layer disposed on the via layer and defining an emission area and a subarea. The bank layer may include a bank extension portion extended to the subarea. The first electrode may extend from the emission area to the subarea and may be electrically connected to the conductive pattern through the via hole. At least a portion of the via hole may be disposed in the subarea. The bank extension portion may overlap the via hole and the first electrode in the subarea in a plan view.

In an embodiment, the display device may further include a first connection electrode disposed on the first electrode and a second connection electrode disposed on the second electrode. The via hole and the bank extension portion may be disposed between the first connection electrode and the second connection electrode.

In an embodiment, at least a portion of the via hole may overlap the bank extension portion in a plan view, and another portion of the via hole may not overlap the bank extension portion in a plan view.

According to an embodiment of the disclosure, a method of manufacturing a display device may include forming a conductive pattern on a substrate, forming, on the conductive pattern, a via layer comprising a via hole exposing the conductive pattern, forming a first electrode and a second electrode that are spaced apart from each other on the via layer, forming, on the via layer, a bank layer defining an emission area and a subarea, the bank layer comprising a bank extension portion extending to the subarea, forming a light-emitting element on the first electrode and the second electrode in the emission area, and forming a first connection electrode in electrical contact with an end of the light-emitting element and a second connection electrode in electrical contact with another end of the light-emitting element. The bank extension portion may overlap at least a portion of the via hole in a plan view.

In an embodiment, the bank layer and the bank extension portion may be simultaneously formed by forming a bank material layer on the via layer and patterning the bank material layer.

In an embodiment, the method may further include, before the forming of the via layer, forming a protective layer disposed on the conductive pattern. The via hole may be formed by simultaneously etching both the protective layer and the via layer such that at least a portion of the via hole is disposed in the subarea.

In an embodiment, an entire area of the bank extension portion may overlap the first electrode in a plan view.

In an embodiment, the bank extension portion may overlap the first electrode and the conductive pattern in a plan view.

According to embodiments of the disclosure, in a display device and a method of manufacturing the same, a bank extension portion that overlaps a via hole disposed between a first connection electrode and a second connection electrode may be formed, so that a step difference of the via hole may be reduced, thereby preventing a short-circuit defect between the first connection electrode and the second connection electrode.

It should be noted that the effects of the disclosure are not limited to those described above, and other effects of the disclosure will be apparent from the following description.

The disclosure will now be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the disclosure are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will filly convey the scope of the disclosure to those skilled in the art.

When an element, such as a layer, is referred to as being “on,” “connected to,” or “coupled to” another element or layer, it may be directly on, connected to, or coupled to the other element or layer or intervening elements or layers may be present. When, however, an element or layer is referred to as being “directly on,” “directly connected to,” or “directly coupled to” another element or layer, there are no intervening elements or layers present. To this end, the term “connected” may refer to physical, electrical, and/or fluid connection, with or without intervening elements. Also, when an element is referred to as being “in contact” or “contacted” or the like to another element, the element may be in “electrical contact” or in “physical contact” with another element; or in “indirect contact” or in “direct contact” with another element.

Further, the X-axis, the Y-axis, and the Z-axis are not limited to three axes of a rectangular coordinate system, such as the x, y, and z axes, and may be interpreted in a broader sense. For example, the X-axis, the Y-axis, and the Z-axis may be perpendicular to one another, or may represent different directions that are not perpendicular to one another. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be construed as X only, Y only, Z only, or any combination of two or more of X, Y, and Z, such as, for instance, XYZ, XYY, YZ, and ZZ. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

It will be understood that, although the terms “first,” “second,” etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For instance, a first element discussed below could be termed a second element without departing from the teachings of the disclosure. Similarly, the second element could also be termed the first element.

Each of the features of the various embodiments of the disclosure may be combined or combined with each other, in part or in whole, and technically various interlocking and driving are possible. Each embodiment may be implemented independently of each other or may be implemented together in an association.

Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used have the same meaning as commonly understood by those skilled in the art to which this disclosure pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and should not be interpreted in an ideal or excessively formal sense unless clearly defined in the specification.

Hereinafter, embodiments of the disclosure will be described with reference to the attached drawings.

is a schematic plan view of a display device according to an embodiment of the disclosure.

Referring to, a display devicemay display moving images or still images. The display devicemay refer to any electronic device that includes a display screen. Non-limiting examples of the display devicemay include televisions, notebook computers, monitors, billboards, the Internet of things (IoT), mobile phones, smartphones, tablet personal computers (PCs), electronic watches, smart watches, watch phones, head mounted displays, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, game machines, digital cameras and camcorders, all of which provide a display screen.

The display devicemay include a display panel that provides a display screen. Examples of the display panel include an inorganic light-emitting display panel, an organic light-emitting display panel, a quantum dot light-emitting display panel, a plasma display panel, a field emission display panel, and the like. In the following description, for convenience of explanation, an inorganic light-emitting display panel is employed as an example of the display panel. However, embodiments are not limited thereto, and other display panels are also applicable within the scope and technical spirit of the disclosure.

In the drawings illustrating the display device, a first direction DR, a second direction DR, and a third direction DRare defined. The first direction DRand the second direction DRmay be directions perpendicular to each other in one plane. The third direction DRmay be a direction perpendicular to the plane in which the first direction DRand the second direction DRare located. The third direction DRmay be perpendicular to each of the second direction DRand the second direction DR. In the embodiment ofwhich illustrates the display device, the third direction DRmay indicate a thickness direction of the display device.

The shape of the display devicemay be variously modified. For example, the display devicemay have a rectangular shape having long sides in the first direction DRand short sides in the second direction DRin a plan view. In another example, the display devicemay have a rectangular shape having long sides in the second direction DRand short sides in the first direction DRin a plan view. However, the disclosure is not limited thereto, and the shape of the display devicemay have other planar shapes such as a square, a quadrangle with rounded corners (vertices), other polygons, and a circle. The shape of a display area DPA of the display devicemay also be similar to the overall shape of the display device. In, each of the display deviceand the display area DPA may have a rectangular shape having long sides in the first direction DRand short sides in the second direction DR.

The display devicemay include the display area DPA and a non-display area NDA. The display area DPA may be an area where an image can be displayed, and the non-display area NDA may be an area where no image is displayed. The display area DPA may also be referred to as an active area, and the non-display area NDA may also be referred to as an inactive area. The display area DA may generally occupy a center portion of the display device.

The display area DA may include multiple pixels PX. The pixels PX may be arranged in matrix. Each of the pixels PX may be rectangular or square in a plan view. However, the shape of each of the pixels PX is not limited thereto and may also be a rhombic shape having each side inclined with respect to a direction. The pixels PX may be alternately arranged in a stripe or PENTILE™ pattern. Each of the pixels PX may include one or more light-emitting elements which emit light of a specific wavelength band to display a specific color.

The non-display area NDA may be disposed adjacent to the display area DPA. The non-display area NDA may completely or partially surround the display area DPA. The display area DPA may be rectangular, and the non-display area NDA may be disposed adjacent to four sides of the display area DPA. The non-display area NDA may form a bezel of the display device. Lines or circuit drivers included in the display deviceor external devices may be disposed in the non-display area NDA.

is schematic diagram of an equivalent circuit of a subpixel of a display device according to an embodiment of the disclosure.

Referring to, each subpixel SPXn of a display device according to an embodiment may include three transistors T, T, and Tand one storage capacitor Cst, in addition to a light-emitting element ED.

The light-emitting element ED may emit light according to a current supplied through a first transistor T. The light-emitting element ED may emit light of a specific wavelength band in response to electrical signals received from a first electrode and a second electrode that are electrically connected to both ends of the light-emitting element ED.

A first end of the light-emitting element ED may be electrically connected to a source electrode of the first transistor T, and a second end of the light-emitting element ED may be electrically connected to a second voltage line VLto which a low-level voltage (hereinafter, referred to as a second supply voltage), lower than a high-level voltage (hereinafter, referred to as a first supply voltage) of a first voltage line VL, is supplied.

The first transistor Tmay adjust a current flowing from the first voltage line VL, to which the first supply voltage is supplied, to the light-emitting element ED according to a voltage difference between a gate electrode and the source electrode. For example, the first transistor Tmay be a driving transistor for driving the light-emitting element ED. The first transistor Tmay have the gate electrode electrically connected to the source electrode of the second transistor T, and the source electrode electrically connected to the first end of the light-emitting element ED. A drain electrode of the first transistor Tmay be electrically connected to the first voltage line VLto which the first supply voltage is applied.

The second transistor Tmay be turned on by a scan signal of a first scan line SLto electrically connect a data line DTL to the gate electrode of the first transistor T. The second transistor Tmay have a gate electrode electrically connected to the first scan line SL, the source electrode electrically connected to the gate electrode of the first transistor T, and a drain electrode electrically connected to the data line DTL.

A third transistor Tmay be turned on by a scan signal of a second scan line SLto electrically connect an initialization voltage line VIL to the first end of the light-emitting element ED. The third transistor Tmay have a gate electrode electrically connected to the second scan line SL, a drain electrode electrically connected to the initialization voltage line VIL, and a source electrode electrically connected to the first end of the light-emitting element ED or the source electrode of the first transistor T. In the drawings, the first scan line SLis illustrated as being distinct from the second scan line SL, but the disclosure is not limited thereto. In some embodiments, the first scan line SLand the second scan line SLmay be formed as one line, and the second transistor Tand the third transistor Tmay be simultaneously turned on by a same scan signal.

Patent Metadata

Filing Date

Unknown

Publication Date

October 9, 2025

Inventors

Unknown

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Cite as: Patentable. “DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME” (US-20250316662-A1). https://patentable.app/patents/US-20250316662-A1

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