Multi-Layer Reflective Structures for Light-Emitting Diode Chips and Related Methods

This application claims the benefit of provisional patent application Ser. No. 63/637,431, filed Apr. 23, 2024, the disclosure of which is hereby incorporated herein by reference in its entirety.

The present disclosure relates to solid-state lighting devices including light-emitting diodes (LEDs) and more particularly to multiple layer reflective structures for LED chips and related methods.

Solid-state lighting devices such as light-emitting diodes (LEDs) are increasingly used in both consumer and commercial applications. Advancements in LED technology have resulted in highly efficient and mechanically robust light sources with a long service life. Accordingly, modern LEDs have enabled a variety of new display applications and are being increasingly utilized for general illumination applications, often replacing incandescent and fluorescent light sources.

LEDs are solid-state devices that convert electrical energy to light and generally include one or more active layers of semiconductor material (or an active region) arranged between oppositely doped n-type and p-type layers. When a bias is applied across the doped layers, holes and electrons are injected into the one or more active layers where they recombine to generate emissions such as visible light or ultraviolet emissions. An active region may be fabricated, for example, from silicon carbide, gallium nitride, gallium phosphide, aluminum nitride, and/or gallium arsenide-based materials and/or from organic semiconductor materials. Photons generated by the active region are initiated in all directions.

Typically, it is desirable to operate LEDs at the highest light emission efficiency, which can be measured by the emission intensity in relation to the output power (e.g., in lumens per watt). A practical goal to enhance emission efficiency is to maximize extraction of light emitted by the active region in the direction of the desired transmission of light. Light extraction and external quantum efficiency of an LED can be limited by how well current is able to spread within an LED and by internal absorption of photons that fail to exit LED chip structures.

As advancements in modern LED technology progress, the art continues to seek improved LEDs and solid-state lighting devices having desirable illumination characteristics capable of overcoming challenges associated with conventional lighting devices.

The present disclosure relates to solid-state lighting devices including light-emitting diodes (LEDs) and more particularly to multiple layer reflective structures for LED chips and related methods. Multiple layer reflective structures include different metal reflective layers formed of the same metal but with different morphologies and/or grain structures. Exemplary structures include a first metal reflective layer formed by sputtering, and a second metal reflective layer of the same material and formed by a deposition process different from sputtering. Reflective structures may further include capping layers and/or nucleation layers between the first and second metal reflective layers of the same material.

In one aspect, an LED chip comprises: an active LED structure comprising an n-type layer, a p-type layer, and an active layer between the n-type layer and the p-type layer; and a reflective structure on the active LED structure, the reflective structure comprising: a first metal reflective layer on the active LED structure, the first metal reflective layer comprising a first morphology; and a second metal reflective layer on the active LED structure, the second metal reflective layer comprising a same metal as the first metal reflective layer and a second morphology that is different than the first morphology. In certain embodiments, the first morphology comprises a larger grain size than the second morphology. The LED chip may further comprise a capping layer between the first metal layer and the second metal layer, the capping layer comprising a different metal than the metal of the first and second metal reflective layers. In certain embodiments, the metal of the first and second metal reflective layers comprises silver, and the metal of the capping layer comprises ruthenium, rhodium, palladium, osmium, iridium, platinum, or gold. In certain embodiments, the metal of the first and second metal reflective layers comprises silver, and the metal of the capping layer comprises titanium, nickel, or tungsten. The LED chip may further comprise a nucleation layer between the second metal reflective layer and the capping layer. In certain embodiments, the first metal reflective layer comprises a sputtered metal layer. In certain embodiments, the first metal reflective layer comprises a physical vapor deposited layer. In certain embodiments, the second metal reflective layer is thicker than first metal reflective layer. The LED chip may further comprise a dielectric reflective layer between the first metal reflective layer and the active LED structure, wherein a lateral edge of the second metal reflective layer is inset relative to a lateral edge of the first metal reflective layer on the dielectric reflective layer.

In another aspect, an LED chip comprises: an active LED structure comprising an n-type layer, a p-type layer, and an active layer between the n-type layer and the p-type layer; and a reflective structure on the active LED structure, the reflective structure comprising: a first metal reflective layer on the active LED structure, the first metal reflective layer formed of a first metal; and a capping layer on the first metal reflective layer, the capping layer comprising a noble metal that is different than the first metal. In certain embodiments, the noble metal comprises ruthenium, rhodium, palladium, osmium, iridium, platinum, or gold. In certain embodiments, the first metal comprises silver or a silver alloy. In certain embodiments, the reflective structure further comprises a second metal reflective layer formed of the first metal, and the capping layer is between the first metal reflective layer and the second metal reflective layer. In certain embodiments, the first metal reflective layer comprises a different morphology than the second metal reflective layer. In certain embodiments, the first metal comprises silver and the noble metal comprises gold. The LED chip may further comprise a nucleation layer between the second metal reflective layer and the capping layer. In certain embodiments, the second metal reflective layer is at least the same thickness as the first metal reflective layer and up to ten times thicker than first metal reflective layer.

In another aspect, a method comprises: providing an active light-emitting diode (LED) structure comprising an n-type layer, a p-type layer, and an active layer between the n-type layer and the p-type layer; depositing a first metal reflective layer on the active LED structure with a first deposition process; and depositing a second metal reflective layer on the first metal reflective layer with a second deposition process that is different than the first deposition process, the first metal reflective layer and the second metal reflective layer comprising silver. In certain embodiments, the first deposition process comprises sputtering and the second deposition process comprises electron beam deposition. In certain embodiments, the first deposition process comprises a physical vapor deposition process and the second deposition process comprises electron beam deposition. In certain embodiments, the first deposition process comprises ion assisted electron beam deposition. The method may further comprise depositing a capping layer on the first metal reflective layer before depositing the second metal reflective layer, the capping layer being deposited by the first deposition process. In certain embodiments, the capping layer comprises a metal that is different than silver. The method may further comprise depositing a nucleation layer on the capping layer before depositing the second metal reflective layer, the nucleation layer being deposited by the second deposition process. In certain embodiments, the second metal reflective layer is formed with a larger thickness than the first metal reflective layer.

In another aspect, any of the foregoing aspects individually or together, and/or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.

Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.

The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.

Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Embodiments are described herein with reference to schematic illustrations of embodiments of the disclosure. As such, the actual dimensions of the layers and elements can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure. Additionally, sizes of structures or regions may be exaggerated relative to other structures or regions for illustrative purposes and, thus, are provided to illustrate the general structures of the present subject matter and may or may not be drawn to scale. Common elements between figures may be shown herein with common element numbers and may not be subsequently re-described.

The present disclosure relates to solid-state lighting devices including light-emitting diodes (LEDs) and more particularly to multiple layer reflective structures for LED chips and related methods. Multiple layer reflective structures include different metal reflective layers formed of the same metal but with different morphologies and/or grain structures. Exemplary structures include a first metal reflective layer formed by sputtering, and a second metal reflective layer of the same material and formed by a deposition process different from sputtering. Reflective structures may further include capping layers and/or nucleation layers between the first and second metal reflective layers of the same material.

An LED chip typically comprises an active LED structure or region that may have many different semiconductor layers arranged in different ways. The fabrication and operation of LEDs and their active structures are generally known in the art and are only briefly discussed herein. The layers of the active LED structure may be fabricated using known processes with a suitable process being fabrication using metal organic chemical vapor deposition. The layers of the active LED structure may comprise many different layers and generally comprise an active layer sandwiched between n-type and p-type oppositely doped epitaxial layers, all of which are formed successively on a growth substrate. It is understood that additional layers and elements can also be included in the active LED structure, including, but not limited to, buffer layers, nucleation layers, super lattice structures, un-doped layers, cladding layers, contact layers, and current-spreading layers and light extraction layers and elements. The active layer can comprise a single quantum well, a multiple quantum well, a double heterostructure, or super lattice structures.

The active LED structure can be fabricated from different material systems, with some material systems being Group Ill nitride-based material systems. Group Ill nitrides refer to those semiconductor compounds formed between nitrogen (N) and the elements in Group III of the periodic table, usually aluminum (AI), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group Ill nitrides also refer to ternary and quaternary compounds such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). For Group III nitrides, silicon (Si) is a common n-type dopant and magnesium (Mg) is a common p-type dopant. Accordingly, the active layer, n-type layer, and p-type layer may include one or more layers of GaN, AlGaN, InGaN, and AlInGaN that are either undoped or doped with Si or Mg for a material system based on Group III nitrides. Other material systems include organic semiconductor materials, and other Group Ill-V systems such as gallium phosphide (GaP), gallium arsenide (GaAs), and related compounds. The active LED structure may be grown on a growth substrate that can include many materials, such as sapphire, silicon carbide (SiC), aluminum nitride (AlN), and GaN.

Different embodiments of the active LED structure can emit different wavelengths of light depending on the composition of the active layer and n-type and p-type layers. In certain embodiments, the active LED structure may emit blue light with a peak wavelength range of approximately 430 nanometers (nm) to 480 nm. In other embodiments, the active LED structure may emit green light with a peak wavelength range of 500 nm to 570 nm. In other embodiments, the active LED structure may emit red light with a peak wavelength range of 600 nm to 650 nm. In certain embodiments, the active LED structure may emit light with a peak wavelength in any area of the visible spectrum, for example peak wavelengths primarily in a range from 400 nm to 700 nm.

In certain embodiments, the active LED structure may be configured to emit light that is outside the visible spectrum, including one or more portions of the ultraviolet (UV) spectrum, the infrared (IR) or near-IR spectrum. The UV spectrum is typically divided into three wavelength range categories denotated with letters A, B, and C. In this manner, UV-A light is typically defined as a peak wavelength range from 315 nm to 400 nm, UV-B is typically defined as a peak wavelength range from 280 nm to 315 nm, and UV-C is typically defined as a peak wavelength range from 100 nm to 280 nm. In certain applications, UV LEDs may also be provided with one or more lumiphoric materials to provide LED packages with aggregate emissions having a broad spectrum and improved color quality for visible light applications. Near-IR and/or IR wavelengths for LED structures of the present disclosure may have wavelengths above 700 nm, such as in a range from 750 nm to 1100 nm, or more.

The present disclosure can be useful for LED chips having a variety of geometries, such as vertical and/or flip-chip geometries. A vertical geometry LED chip typically includes anode and cathode connections on opposing sides or faces of the LED chip. In certain embodiments, a vertical geometry LED chip may also include a growth substrate that is arranged between the anode and cathode connections. In certain embodiments, LED chip structures may include a carrier submount and where the growth substrate is removed. In still further embodiments, any of the principles described herein are applicable to flip-chip structures where anode and cathode connections are made from a same side of the LED chip for flip-chip mounting to another surface. In certain flip-chip embodiments, the growth substrate of the LED chip may form the intended light-exiting surface for the LED chip.

Light emitted by the active layer or region of an LED chip is typically initiated in multiple directions. For directional applications, internal mirrors or external reflective surfaces may be employed to redirect as much light as possible toward a desired emission direction. Internal mirrors may include single or multiple layers. Some multi-layer mirrors include a metal reflector layer and a dielectric reflector layer, wherein the dielectric reflector layer is arranged between the metal reflector layer and a plurality of semiconductor layers. A passivation layer is arranged between the metal reflector layer and first and second electrical contacts, wherein the first electrical contact is arranged in conductive electrical communication with a first semiconductor layer, and the second electrical contact is arranged in conductive electrical communication with a second semiconductor layer. For single or multi-layer mirrors including surfaces exhibiting less than 100% reflectivity, some light may be absorbed by the mirror. Additionally, light that is redirected through the active LED structure may be absorbed by other layers or elements within the LED chip.

As used herein, a layer or region of a light-emitting device may be considered to be “transparent” when at least 80% of emitted radiation that impinges on the layer or region emerges through the layer or region. Moreover, as used herein, a layer or region of an LED is considered to be “reflective” or embody a “mirror” or a “reflector” when at least 80% of the emitted radiation that impinges on the layer or region is reflected. In some embodiments, the emitted radiation comprises visible light such as blue and/or green LEDs with or without lumiphoric materials. In other embodiments, the emitted radiation may comprise nonvisible light. For example, in the context of GaN-based blue and/or green LEDs, silver (Ag) may be considered a reflective material (e.g., at least 80% reflective). In the case of UV LEDs, appropriate materials may be selected to provide a desired, and in some embodiments high, reflectivity and/or a desired, and in some embodiments low, absorption. In certain embodiments, a “light-transmissive”material may be configured to transmit at least 50% of emitted radiation of a desired wavelength.

In LED chip arrangements, reflective structures that embody mirrors may be formed along one side of an active LED structure to redirect light toward an opposing side in an intended emission direction. Such reflective structures may include a metal reflective layer formed on a layer of the active LED structure, for example the p-type layer or the n-type layer. In certain embodiments, the metal reflective layer may embody a sputtered metal layer, that is, the metal reflective layer is formed by sputter deposition. As known to those skilled in the art, a sputtered metal layer in an LED chip structure has a readily identifiable film structure or morphology by way of scanning electron microscopy (SEM) and/or focused ion beam (FIB) microscopy. For example, a sputtered metal layer may have a larger grain size than a metal layer of the same material formed by other common deposition techniques, such as electron beam deposition. In certain embodiments, other deposition techniques beyond sputtering may be utilized to provide a physical vapor deposited layer with larger grain size (e.g., different morphology). For example, the physical vapor deposited layer may be formed by ion assisted electron beam deposition or thermal evaporation, among other physical vapor deposition processes. In this manner, a sputtered metal layer or a physical vapor deposited layer may have a first morphology and another metal layer of the same material but formed by a different process, such as electron beam deposition, may have a second morphology that is different than the first morphology. The larger associated grain size may provide reduced surface cracking, fewer grain boundaries, and/or reduced discontinuities that may form regions for light absorption. In this manner, such a reflective layer may form an improved reflective surface in LED chips.

Despite the advantages of improved reflectivity, some sputtered metal layers may provide challenges during fabrication of LED chips. For example, the conformal nature of sputtering may increase instances of edge damage artifacts during photolithography lift-off steps. Edge damage artifacts may embody additional material, such as material tags, that extend from intended edges of layers after lift-off. In this manner, metal reflective layers formed by other deposition techniques, such as electron beam deposition, may form in a more line-of-sight manner that reduces occurrence of such edge damage artifacts.

According to aspects of the present disclosure, a hybrid metal reflective structure is employed that takes advantage of both types of deposition. In this manner, a multiple layer reflective structure may include a first metal reflective layer that embodies a sputtered metal layer and a second metal reflective layer of a same material that is not formed by sputtering. The first and second metal reflective layers may comprise various reflective metals, such as Ag or alloys thereof in the context of GaN-based LED structures. By forming a first sputtered metal layer of Ag, the improved reflective surface may be positioned proximate the active LED structure. Then, the remainder of the reflective structure may include a layer of Ag with a structure that reduces formation of edge damage artifacts during subsequent photolithography lift-off steps.

In certain embodiments, a thickness of the first metal layer that is sputtered is smaller than a thickness of the second metal layer. In this manner, while the thickness of the first metal layer is configured to be sufficient for reflectivity purposes, the thickness is purposefully kept as small as possible to mitigate edge damage artifacts. In certain embodiments, the thickness of the first metal reflective layer may be in a range from 200 angstroms (Å) to 1200 Å, or in a range from 200 Å to 800 Å. By comparison, a thickness of the second metal reflective layer may be in a range from 2000 Å to 8000 Å, or in a range from 2000 Å to 5000 Å. Since the second metal reflective layer is formed in a manner that reduces edge damage artifacts, the second metal reflective layer may even have larger thicknesses. In this manner, the second metal reflective layer may be at least twice the thickness of the first metal reflective layer. In still further embodiments, the second metal reflective layer may be at least three times, or at least four times, or at least five times, or up to at least ten times the thickness of the first metal reflective layer, depending on the embodiment. In certain embodiments, the thickness of the second metal layer may be at least the same thickness as the first metal reflective layer or thicker as specified above.

In certain embodiments, the reflective structure may further include a capping layer formed on the sputtered metal layer before removal from the sputtering system. In this manner, the capping layer may also be formed by sputter deposition. The capping layer may serve to protect the sputtered metal layer during transfer to another system, such as an electron beam system, for deposition of the remaining layers of the reflective structure. The capping layer may embody an inert layer that doesn't readily oxidize during system transfer. The selection of material for the capping layer may include any noble metal dissimilar from the sputtered metal layer. For example, when the sputtered metal layer comprises Ag or an alloy thereof, the capping layer may be formed by any of ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), or gold (Au). In further embodiments, additional materials that are slightly less inert than the noble metals described above may still provide suitable capping, such as titanium (Ti), nickel (Ni), or tungsten (W), among others. The selection of materials above for the capping layer may permit the capping layer to have a relatively small thickness while still protecting the first metal reflective layer. For example, the capping layer may have a thickness in a range from 10 Å to 200 Å, or in a range from 10 Å to 50 Å. In certain embodiments, the capping layer may form in a discontinuous manner on the first metal reflective layer, particularly at the lower end of the thickness ranges.

In certain embodiments, the reflective structure may include a nucleation layer formed on the capping layer. The nucleation layer may embody a first deposition step once the structure is transferred to the other system (e.g., the electron beam system). The nucleation layer is positioned to enhance deposition of the second reflective layer, such as a second layer of Ag. The nucleation layer may be formed of Ti, chromium (Cr), conductive ceramics, and/or alloys such as aluminum zinc oxide (AZO) or indium tin oxide (ITO). As described herein, the capping layer and the nucleation layer are electrically conductive layers, comprised of metals or metallic compounds or other electrically conductive elements or compounds. In certain embodiments a thickness of the nucleation layer is also kept as small as possible, such as similar ranges as described above for the capping layer. In still further embodiments, the thickness of the nucleation layer is smaller than the capping layer. As with certain configurations of the capping layer, the nucleation layer may form in a discontinuous manner.

The function and position of the capping and nucleation layers, between first and second metal reflective layers of the same material, provides benefits for one or more of physical, mechanical, electrical, and optical properties of the overall reflective structure. Various benefits include tailoring film morphology, grain size, and/or packing efficiency, among others within the overall reflective structure.

is a cross-sectional view of an exemplary LED chipaccording to principles of the present disclosure. The LED chipincludes an active LED structurecomprising a p-type layer, an n-type layer, and an active layertherebetween. The active LED structuremay be formed on a substrate. In certain embodiments, one or more buffer layers and/or undoped layers may be provided between the substrateand n-type layerof the active LED structure. In certain embodiments, the n-type layeris between the active layerand the substrate. In other embodiments, the doping order may be reversed. The substratecan comprise many different materials such as SiC or sapphire and can have one or more surfaces that are shaped, textured, or patterned to enhance light extraction. In certain embodiments, the substrate is light transmissive (preferably transparent) and may include a patterned surface′ that is proximate the active LED structureand includes multiple recessed and/or raised features.

In, a dielectric reflective layeris provided on portions of the p-type layer. The dielectric reflective layermay comprise many different materials and preferably comprises a material that presents an index of refraction step with the material of the active LED structureto promote total internal reflection (TIR) of light generated from the active LED structure. Light that experiences TIR is redirected without experiencing absorption or loss and can thereby contribute to useful or desired LED chip emission. In certain embodiments, the dielectric reflective layercomprises a material with an index of refraction lower than the index of refraction of the active LED structurematerial. The dielectric reflective layermay comprise many different materials, with some having an index of refraction less than 2.3, while others can have an index of refraction less than 2.15, less than 2.0, and less than 1.5. In certain embodiments, the dielectric reflective layercomprises silicon dioxide (SiO) and/or silicon nitride (SiN). It is understood that many dielectric materials can be used such as SiN, SiNx, SiN, Si, germanium (Ge), SiO, SiOx, titanium dioxide (TiO), tantalum pentoxide (TaO), ITO, magnesium oxide (MgOx), zinc oxide (ZnO), and combinations thereof. In certain embodiments, the dielectric reflective layermay include multiple alternating layers of different dielectric materials, e.g., alternating layers of SiOand SiN that symmetrically repeat or are asymmetrically arranged. Some Group Ill nitride materials such as GaN can have an index of refraction of approximately 2.4, SiOcan have an index of refraction of approximately 1.48, and SiN can have an index of refraction of approximately 1.9. Embodiments with the active LED structurecomprising GaN and the dielectric reflective layercomprising SiOmay have a sufficient index of refraction step between the two to allow for efficient TIR of light. The dielectric reflective layermay have different thicknesses depending on the type of materials used, with some embodiments having a thickness of at least 0.2 microns (μm). In some of these embodiments, the dielectric reflective layercan have a thickness in the range of 0.2 μm to 0.7 μm, while in some of these embodiments the thickness can be approximately 0.5 μm. Portions of the dielectric reflective layermay extend along mesa sidewalls of the active LED structureand along sidewall portions of the p-type layer, the active layer, and the n-type layer.

The LED chipmay further include a reflective structurethat is on the dielectric reflective layersuch that the dielectric reflective layeris arranged between the active LED structureand the reflective structure. As described below in greater detail, the reflective structuremay embody a multiple layer metal reflective structure configured to reflect any light from the active LED structurethat may pass through the dielectric reflective layer. The reflective structurecan comprise many different materials such as Ag or alloys thereof, gold (Au) or alloys thereof, or combinations thereof. As illustrated, the reflective structuremay include one or more reflective layer interconnectsthat provide electrically conductive paths through the dielectric reflective layerto the p-type layer. In certain embodiments, the reflective layer interconnectscomprise reflective layer vias. In some embodiments, the reflective layer interconnectscomprise the same material as the reflective structureand are formed at the same time as the reflective structure. In other embodiments, the reflective layer interconnectsmay comprise a different material than the reflective structure.

The LED chipmay also comprise a barrier layeron a side of the reflective structureopposite the dielectric reflective layerto prevent migration of the reflective structurematerial, such as Ag, to other layers. Preventing this migration helps the LED chipmaintain efficient operation through its lifetime. The barrier layermay comprise an electrically conductive material, with suitable materials including but not limited to sputtered Ti/Pt followed by evaporated Au bulk material or sputtered Ti/Ni followed by an evaporated Ti/Au bulk material.

A passivation layermay be included on the barrier layeras well as any portions of the reflective structurethat may be uncovered by the barrier layer. The passivation layermay further be arranged on portions of the dielectric reflective layerthat are uncovered by the reflective structure. The passivation layerprotects and provides electrical insulation for the LED chipand can comprise many different materials, such as a dielectric material. In certain embodiments, the passivation layeris a single layer, and in other embodiments, the passivation layercomprises a plurality of layers. A suitable material for the passivation layerincludes but is not limited to SiN, SiNx, and/or SiN. In certain embodiments, the dielectric reflective layercomprises SiOand the passivation layercomprises SiN, SiNx, or SiN. In other embodiments, the dielectric reflective layerand at least a portion of the passivation layermay each comprise SiO. As illustrated, the dielectric reflective layermay bound perimeter and/or sidewall portions of the active LED structure, including the p-type layer, the active layer, and the n-type layer, along a perimeter of the LED chip. Furthermore, the passivation layermay be arranged to also bound perimeter portions of the active LED structure. In this manner, portions of the dielectric reflective layermay be arranged between portions of the passivation layeralong sidewalls of active LED structurefor enhanced passivation and protection.

Certain embodiments may also comprise one or more adhesion layerspositioned at one or more interfaces between the dielectric reflective layerand the reflective structureto promote improved adhesion therebetween. Many different materials can be used for the adhesion layer, such as titanium oxide (TiO, TiO), titanium oxynitride (TiON, TiON), tantalum oxide (TaO, TaO), tantalum oxynitride (TaON), aluminum oxide (AlO, AlxOy) or combinations thereof, with a preferred material being TiON, AlO, or AlxOy. In certain embodiments, the adhesion layercomprises AlO, where 1≤x≤4 and 1≤y≤6. In certain embodiments, the adhesion layercomprises AlxOy, where x=2 and y=3, or AlO. The adhesion layermay be deposited by electron beam deposition that may provide a smooth, dense, and continuous layer without notable variations in surface morphology. The adhesion layermay also be deposited by sputtering, chemical vapor deposition, plasma enhanced chemical vapor deposition, or atomic layer deposition (ALD).

In, the LED chipcomprises a p-contactand an n-contactthat are arranged on the passivation layerand are configured to provide electrical connections with the active LED structure. The p-contact, which may also be referred to as an anode contact, may comprise one or more p-contact interconnectsthat extend through the passivation layerto the barrier layeror the reflective structureto provide an electrical path to the p-type layer. In certain embodiments, the one or more p-contact interconnectscomprise one or more p-contact vias. The n-contact, which may also be referred to as a cathode contact, is electrically coupled to the n-type layerby way of one or more n-contact interconnectsthat extend through the passivation layer, the barrier layer, the dielectric reflector layer, the reflective structure, the p-type layer, and the active layer. In certain embodiments, the one or more n-contact interconnectsmay be referred to as one or more n-contact vias. Openings for the n-contact interconnectsmay be formed in a separate etching step than etching along the perimeter of the LED chipwhere the passivation layerbounds the active LED structure. For illustrative purposes,is shown with a single n-contact interconnect. In practice, the LED chipmay include multiple n-contact interconnectsspaced apart in an array pattern across the active LED structure.

In operation, a signal applied across the p-contactand the n-contactis conducted to the p-type layerand the n-type layer, causing the LED chipto emit light from the active layer. The p-contactand the n-contactcan comprise many different materials such as Au, copper (Cu), nickel (Ni), In, Al, Ag, tin (Sn), Pt, or combinations thereof. In still other embodiments, the p-contactand the n-contactcan comprise conducting oxides and transparent conducting oxides such as ITO, nickel oxide (NiO), ZnO, cadmium tin oxide, indium oxide, tin oxide, magnesium oxide, ZnGaO, ZnO/Sb, GaO/Sn, AgInO/Sn, InO/Zn, CuAlO, LaCuOS, CuGaO, and SrCuO. The choice of material used can depend on the location of the contacts and on the desired electrical characteristics, such as transparency, junction resistivity, and sheet resistance. In certain embodiments, the LED chipis arranged for flip-chip mounting and the p-contactand n-contactare configured to be mounted or bonded to a surface, such as a printed circuit board. Whileis described in the context of a flip-chip structure, the principles disclosed are readily applicable to other chip structures.

is a cross-sectional view of a portion of the LED chipoftaken from the superimposed dashed-line boxB of. In this portion of the LED chip, the reflective structureis positioned between the p-type layerand the barrier layerand may form one of the reflective layer interconnectsof. It is understood the details of the reflective structureprovided below are the same in other areas of the LED chip, such as on portions of the dielectric reflective layerand/or adhesion layer.

As illustrated in, the reflective structureincludes a first metal reflective layer-on the p-type layerand on the dielectric reflective layerand/or adhesion layerin other portions of the LED chipas illustrated in. The first metal reflective layer-may comprise a first metal, such as Ag in certain embodiments. The first metal reflective layer-may embody a sputtered metal layer for providing an improved reflective surface to the p-type layerand/or other portions of the active LED structure. A capping layermay be formed on the first metal reflective layer-on a side opposite the p-type layer. The capping layermay include any of the electrically conductive materials described above, such as noble metals or other metals with suitable inertness to protect the first metal reflective layer-during tool transfer. In certain embodiments, a nucleation layermay be formed on the capping layerafter tool transfer to enhance deposition of a second metal reflective layer-. The capping layermay include any of the materials described above. The second metal reflective layer-may comprise the same metal as the first metal reflective layer-but formed by a deposition process that is different from sputtering. For example, the second metal reflective layer-may be formed by electron beam deposition to reduce edge damage artifacts during subsequent lift-off processes. In this regard, both the first and second metal reflective layers-,-may comprise a same metal, such as Ag, but with different morphology structures. For example, the average grain size of the first metal reflective layer-may be larger than the average grain size of the second metal reflective layer-. By separating the first and second metal reflective layers-,-of the same material, a hybrid metal reflective structure is formed that takes advantage of both types of film morphologies and deposition techniques to provide an overall reflective structurewith increased reflectivity and reduced manufacturing defects.

is a cross-sectional view of the reflective structureofillustrating details of the morphology differences between the first and second metal reflective layers-,-. As illustrated, the first metal reflective layer-has a structure with larger grain sizes and fewer associated grain boundaries. As described above, reduced grain boundariesand/or discontinuities provides few regions for undesirable light absorption, thereby forming an increased reflective surface for the active LED structureof. In contrast, the second metal reflective layer-is formed with a much smaller grain structurethan the first metal reflective layer-. Accordingly, the first and second metal reflective layers-,-may be formed with the same metal while having different morphologies. The choice of the same metal for both first and second metal reflective layers-,-may be advantageous by selecting a common metal with increased reflectivity tailored for a particular LED structure, such as Ag in the context of GaN-based active LED structures.

illustrate a sequential fabrication sequence for forming the reflective structurewith different metal deposition techniques.is a cross-sectional view of the portion of the LED chipofafter the first metal reflective layer-is formed. As described above, the first metal reflective layer-may be formed by sputtering such that the first metal reflective layer-embodies a sputtered metal layer. The capping layermay then be formed in the same deposition system, also by sputtering. After sputtering of the first metal reflective layer-and the capping layer, the LED chipmay then be transferred to another deposition system that is different than a sputtering system. Alternatively, the first metal reflective layer-may be formed by another physical vapor deposition process, such as ion assisted electron beam deposition, that is configured to provide a morphology with larger grain size and increased reflectivity in a manner at least partially similar to sputtering.is a cross-sectional view of the portion of the LED chipofat a subsequent fabrication step after the second metal reflective layer-is formed in another deposition system. After transfer to the next deposition system, such as an electron beam deposition system, the second metal reflective layer-may then be formed on the first metal reflective layer-with the capping layertherebetween. In certain embodiments, the nucleation layermay be formed first after the transfer, followed by the second metal reflective layer-. In this regard, the nucleation layerand the second metal reflective layer-may be formed by the same deposition technique (e.g., electron beam) that is different from the sputtering or alternative deposition technique of.

are cross-sectional views illustrating various fabrication steps where edge damage artifacts may be mitigated. The views provided are from portions of the LED chipofwhere edges of the reflective structureand barrier layerterminate on the dielectric reflective layerand/or adhesion layer, such as the box labeledB of.

is a cross-sectional view of a portion of the LED chipofafter formation of the reflective structureand barrier layerand before photolithography lift-off. A photoresistis in place on areas of the dielectric reflective layerand/or adhesion layerto define edge termination of the reflective structureand barrier layer. Due to the nature of deposition for the first metal reflective layer-and the capping layer, these layers may conformally deposit along sidewalls′ of the photoresist. The different deposition process for the nucleation layer, second metal reflective layer-, and barrier layeris such that these layers do not necessarily form along sidewalls′ of the photoresist.

is a cross-sectional view of a portion of the LED chipofafter lift-off of the photoresistand illustrating no edge damage defects according to aspects of the present disclosure.illustrates embodiments after lift-off where the portions of the first metal reflective layer-and the capping layeralong the sidewalls′ ofare cleanly removed. In this manner, a well-defined edge of the first metal reflective layer-and the capping layermay be formed over the dielectric reflective layerand/or adhesion layer. By forming the first and second metal reflective layers-,-according to different deposition techniques, the overall thickness of the first metal reflective layer-and/or capping layermay be sufficiently thin to reduce formation of edge damage artifacts proximate locations where the sidewalls′ of the photoresistwere located in. As further illustrated, a lateral edge of the second metal reflective layer-is inset relative to lateral edges of the first metal reflective layer-and the capping layer. That is, the first metal reflective layer-and capping layerextend farther and/or cover more area of the underlying dielectric reflective layerand/or adhesion layerthan the second metal reflective layer-.

is a cross-sectional view of a portion of the LED chipofafter lift-off of the photoresistand further illustrating edge damage artifacts that are reduced in severity according to aspects of the present disclosure. Instead of the clean lift-off of, a portion-′ of the first metal reflective layer-and/or a portion′ of the capping layerinmay form a tag that extends or lifts up in a direction away from the dielectric reflective layerduring lift-off of the photoresistof, thereby forming an edge damage artifact. This may be due to slight tearing of the first metal reflective layer-and/or capping layerduring lift-off. However, as described above, the overall thickness of the first metal reflective layer-and/or capping layermay be sufficiently thin to mitigate severity of the edge damage artifacts and reduce associated problems in the LED chip.