Protection of Radar Sequencing Data for Efficient Real-Time Programming Model

Radar sensors are used in a number of applications to detect objects, where the detection typically comprises measuring distances, velocities, or angles of arrival associated with detected targets. In particular, in the automotive sector, there is an increasing need for radar sensors that are able to be used in, for example, driving assistance systems (e.g., advanced driver assistance systems (ADAS)), such as, for example, in adaptive cruise control (ACC) or radar cruise control systems. Such systems are able to automatically adjust a speed of a motor vehicle in order to maintain a safe distance from other motor vehicles traveling in front of the motor vehicle (and from other objects and pedestrians). Other example applications of a radar sensor in the automotive sector include blind spot detection, lane change assist, and the like.

In some implementations, a radar semiconductor chip includes a ramp signal generator configured to generate a frequency-modulated ramp signal comprising a plurality of frequency ramps of a ramp scenario; a memory configured to store a sequencing program associated with controlling one or more components of the radar semiconductor chip in a time-dependent manner; a main sequencer configured to: read the sequencing program from the memory, derive, from the sequencing program, a plurality of instances of configuration data and a corresponding timestamp for each instance of configuration data, generate a plurality of telegrams, wherein each telegram of the plurality of telegrams includes at least one instance of configuration data, at least one timestamp associated with the at least one instance of configuration data, and a first error-detecting code associated with the telegram, and transmit the plurality of telegrams; and at least one sequence generator configured to receive the plurality of telegrams from the main sequencer, generate a second error-detecting code for each telegram, compare the first error-detecting code and the second error-detecting code associated with a same telegram, and trigger a first alarm based on a mismatch between the first error-detecting code and the second error-detecting code.

In some implementations, a radar semiconductor chip includes a ramp signal generator configured to generate a frequency-modulated ramp signal comprising a plurality of frequency ramps of a ramp scenario; and a sequence generator configured to: receive a plurality of telegrams that provides a plurality of instances of configuration data and corresponding timestamps, wherein each telegram includes an instance of configuration data and a corresponding timestamp associated with the instance of configuration data, generate a plurality of first corresponding error-detecting codes from the plurality of telegrams, including a first corresponding error-detecting code for each instance of configuration data, store the plurality of instances of configuration data and the corresponding timestamps in a first in, first out (FIFO) buffer according to a FIFO sequence, generate a plurality of second corresponding error-detecting codes, including a second corresponding error-detecting code for each instance of configuration data read out from the FIFO buffer, compare, based on the FIFO sequence, the first corresponding error-detecting code and the second corresponding error-detecting code associated with a same instance of configuration data, and trigger a first alarm based on a mismatch between the first corresponding error-detecting code and the second corresponding error-detecting code.

In some implementations, a monolithic microwave integrated circuit (MMIC) semiconductor chip includes a millimeter-wave signal generator configured to generate a signal comprising a plurality of signal sequences; a central sequencer configured to control at least one decentral sequence generator based on a timestamp information and a configuration instance transmitted in a transmission from the central sequencer to the decentral sequence generator to control at least one corresponding component in a cycle-accurate manner; a first error detection mechanism corresponding to the transmission from the central sequencer to the at least one decentral sequence generator; and a second error detection mechanism that is independent of the first error detection mechanism, the second error detection mechanism corresponding to an execution by the decentral sequence generator to control the at least one corresponding component based on the timestamp information and the configuration instance transmitted in the transmission.

In the following, details are set forth to provide a more thorough explanation of example implementations. However, it will be apparent to those skilled in the art that these implementations may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form or in a schematic view rather than in detail in order to avoid obscuring the implementations. In addition, features of the different implementations described hereinafter may be combined with each other, unless specifically noted otherwise.

Further, equivalent or like elements or elements with equivalent or like functionality are denoted in the following description with equivalent or like reference numerals. As the same or functionally equivalent elements are given the same reference numbers in the figures, a repeated description for elements provided with the same reference numbers may be omitted. Hence, descriptions provided for elements having the same or like reference numbers are mutually exchangeable.

Each of the illustrated x-axis, y-axis, and z-axis is substantially perpendicular to the other two axes. In other words, the x-axis is substantially perpendicular to the y-axis and the z-axis, the y-axis is substantially perpendicular to the x-axis and the z-axis, and the z-axis is substantially perpendicular to the x-axis and the y-axis. In some cases, a single reference number is shown to refer to a surface, or fewer than all instances of a part may be labeled with all surfaces of that part. All instances of the part may include associated surfaces of that part despite not every surface being labeled.

The orientations of the various elements in the figures are shown as examples, and the illustrated examples may be rotated relative to the depicted orientations. The descriptions provided herein, and the claims that follow, pertain to any structures that have the described relationships between various features, regardless of whether the structures are in the particular orientation of the drawings, or are rotated relative to such orientation. Similarly, spatially relative terms, such as “top,” “bottom,” “below,” “beneath,” “lower,” “above,” “upper,” “middle,” “left,” and “right,” are used herein for ease of description to describe one element's relationship to one or more other elements as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the element, structure, and/or assembly in use or operation in addition to the orientations depicted in the figures. A structure and/or assembly may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein may be interpreted accordingly. Furthermore, the cross-sectional views in the figures only show features within the planes of the cross-sections, and do not show materials behind the planes of the cross-sections, unless indicated otherwise, in order to simplify the drawings.

It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., “between” versus “directly between,” “adjacent” versus “directly adjacent,” etc.).

In implementations described herein or shown in the drawings, any direct electrical connection or coupling, e.g., any connection or coupling without additional intervening elements, may also be implemented by an indirect connection or coupling, e.g., a connection or coupling with one or more additional intervening elements, or vice versa, as long as the general purpose of the connection or coupling, for example, to transmit a certain kind of signal or to transmit a certain kind of information, is essentially maintained. Features from different implementations may be combined to form further implementations. For example, variations or modifications described with respect to one of the implementations may also be applicable to other implementations unless noted to the contrary.

As used herein, the terms “substantially” and “approximately” mean “within reasonable tolerances of manufacturing and measurement.” For example, the terms “substantially” and “approximately” may be used herein to account for small manufacturing tolerances or other factors (e.g., within 5%) that are deemed acceptable in the industry without departing from the aspects of the implementations described herein. For example, a resistor with an approximate resistance value may practically have a resistance within 5% of the approximate resistance value. As another example, an approximate signal value may practically have a signal value within 5% of the approximate signal value.

In the present disclosure, expressions including ordinal numbers, such as “first”, “second”, and/or the like, may modify various elements. However, such elements are not limited by the above expressions. For example, the above expressions do not limit the sequence and/or importance of the elements. The above expressions are used merely for the purpose of distinguishing an element from the other elements. For example, a first box and a second box indicate different boxes, although both are boxes. For further example, a first element could be termed a second element, and similarly, a second element could also be termed a first element without departing from the scope of the present disclosure.

A radar monolithic microwave integrated circuit (MMIC), sometimes referred to as a single radar chip, may incorporate all core functions of a radio frequency (RF) frontend of a radar transceiver (e.g., local oscillator, power amplifiers, low-noise amplifiers (LNAs), mixers, etc.), analog preprocessing of the intermediate frequency (IF) or baseband signals (e.g., filters, amplifiers, etc.), and analog-to-digital conversion in one single package. The RF frontend usually includes multiple reception (RX) and transmission (TX) channels, particularly in applications in which beam steering techniques, phased antenna arrays, etc., are used. In radar applications, phased antenna arrays may be employed to sense an incidence angle of incoming RF radar signals (also referred to as “direction of arrival” or DOA).

A microcontroller may act as a supervisor for a radar MMIC by sending commands and receiving responses over one or more communication channels (e.g., a bus system, such as a serial peripheral interface (SPI)). As a result, the radar MMIC may be controlled by the microcontroller.

Frequency-modulated continuous-wave (FMCW) radar applications rely on transmitting multiple frequency sweeps in a time-controlled manner. For example, the radar MMIC may include a ramp signal generator that is configured to generate a frequency-modulated ramp signal (e.g., an FMCW ramp signal) that includes a plurality of frequency ramps of a ramp scenario. In addition to generating the frequency-modulated ramp signal, the radar MMIC may be responsible for performing several on-chip functions, such as temperature monitoring, power or phase monitoring, receiver gain monitoring, decimation rate reconfiguration, and/or interference mitigation actions. The on-chip functions should be performed synchronously with a transmission of the frequency ramps or should be performed between different frequency ramp sequences of the ramp scenario. In some cases, the on-chip functions should be performed without disrupting timing relationships between individual frequency ramps and/or between the different frequency ramp sequences of the ramp scenario.

FMCW radar systems are becoming more prevalent in vehicles in order to enable ADAS, as well as autonomous driving features. As a result, ensuring normal operation of a FMCW radar system is important to ensure safer operation of a vehicle. Thus, each parameter used in the FMCW radar system should be protected against random hardware faults in order to ensure correct and safe operation of the FMCW radar system.

Some implementations disclosed herein are directed to a radar MMIC that includes one or more protection mechanisms for protecting one or more aspects of the radar MMIC by detecting one or more faults. For example, a protection mechanism may protect the radar MMIC from random hardware faults by detecting and indication a presence of a random hardware fault. For example, a protection mechanism may evaluate a data distribution between sequencer components of a sequencing circuit for detecting one or more faults. Additionally, or alternatively, a protection mechanism may evaluate a processing operation performed by one or more sequencer components of the sequencing circuit for detecting one or more faults.

Additionally, or alternatively, a protection mechanism may evaluate an operation of a controlled component of the radar MMIC for detecting one or more faults. Each protection mechanism may evaluate one or more aspects of the radar MMIC without disrupting timing relationships between individual frequency ramps and/or between the different frequency ramp sequences of the ramp scenario.

is a diagram illustrating an example application of an FMCW radar sensor in the form of a radar sensorfor measuring distances, velocities, or angles of arrival (AoAs) associated with objects, also referred to as targets. As shown in, the radar sensormay have one or more TX antennasand one or more RX antennas. In some implementations, a single antenna may be used that serves simultaneously as a TX antennaand as an RX antenna.

In operation, the TX antennacontinuously emits an RF signal s(t) (also referred to as a transmitted radar signal), which is frequency-modulated, for example, by a periodic linear frequency ramp signal (also referred to as a frequency sweep or chirp signal). The transmitted radar signal s(t) is backscattered at a target T and a reflected signal y(t) (e.g., a back-scattered signal, an echo signal, a received RF signal, or a received radar signal) is received by the RX antenna.shows a simplified example—in practice, the radar sensormay include a plurality of TX antennasand RX antennasto be able to determine an AoA of the received RF signal y(t) and, therefore, locate the target T with increased accuracy as compared to a radar sensor that may use a single TX antenna and/or a signal RX antenna.

It will be appreciated that “(1)” denotes an analog signal defined as a continuous-time signal that may change over a time period t, and “[n]” denotes a digital signal defined as a discrete-time signal, where n is an integer and may represent an nth sample or a signal containing n samples. A signal may be represented with or without its continuous-time or discrete-time domain identifier (t) and [n], respectively. It will be further appreciated that RF circuits, such as the radar sensor, may be used in fields other than radar. For example, RF circuits may be used in RF communication systems. Accordingly, in some implementations, the radar sensormay be used in RF applications other than radar, such as RF communications.

As indicated above,is provided as an example. Other examples may differ from what is described with regard to.

illustrates an example of the frequency modulation of the RF signal s(t). As illustrated in the upper diagramof, the RF signal s(t) comprises a plurality of frequency ramps or a series of “chirps”; that is to say, the RF signal s(t) comprises a sequence of sinusoidal signal profiles (e.g., waveforms) with a rising frequency (referred to as an up-chirp) or a falling frequency (referred to as a down-chirp). In the example shown in, the instantaneous frequency f(t) of a chirp increases linearly, from a start frequency fto a stop frequency fwithin a time interval T, as shown in the lower diagramof. Such chirps are also referred to as linear frequency ramps. For a measurement, a sequence of frequency ramps is emitted, and a resulting echo signal is evaluated in baseband to detect one or more radar targets.

A frequency-modulated ramp signal, such as a local oscillator signal used for generating a radar signal, may include a plurality of radar frames, which may also be referred to as radar operation cycles or chirp frames. A sequence of ramps may make up each radar frame. For example, a radar operation cycle may include several hundreds of radar ramps (sweeps) taking up to 10-30 milliseconds (ms) in total. A frame length of the radar frame may correspond to one radar operation cycle. Consecutive ramps may have a short pause therebetween, and a longer pause may be used between consecutive radar frames. The longer pause between consecutive radar frames may be referred to as a configuration interval, during which one or more ramp parameters of the RF signal s(t) can be adjusted for subsequent radar frames. A ramp start time Tindicates a start time for each chirp and may occur at a predetermined interval according to, for example, a number of clock cycles.

The start frequency fand stop frequency fof the ramps may be within a frequency band with minimum frequency Fmin and maximum frequency Fmax. As a result, the minimum frequency Fmin and the maximum frequency Fmax define an operating frequency range or a frequency band usable for the ramping signals, and thus the frequency range or the frequency band of the radar application of a radar MMIC. In some implementations, the frequency range defined by a single ramp having start and stop frequencies fand fmay be smaller than the usable radar frequency band. However, all ramps that are generated during operation may lie between the frequencies Fmin and Fmax of the radar frequency band (e.g., between 76-81 GHz) used for generating the ramping signals.

illustrates three identical linear frequency ramps or chirps. However, the parameters f, f, T, and/or the pause between the individual frequency ramps may vary depending on the actual implementation and/or use of the radar sensor. In practice, the frequency variation may be, for example, linear (linear ramp, frequency ramp), exponential (exponential ramp), or hyperbolic (hyperbolic ramp). In some implementations, the frequency may decrease instead of increase during time interval T. Furthermore, in some implementations, a center frequency of each ramp (and therefore fand f) may vary (e.g., from ramp to ramp or after detecting an interference) to allow using the full or a part of the frequency band. In one example, the frequency band has a minimum frequency Fmin of 76 gigahertz (GHz) and a maximum frequency Fmax of 81 GHz.

Thus, while three identical linear frequency ramps or chirps with the same start frequency fand stop frequency fare illustrated in, the start frequency fand stop frequency fmay vary within a radar frame or across multiple radar frames. A local oscillator signal S(t) may be used to generate the RF signal SRF(t). Thus, it can be said that the local oscillator signal S(t) and the RF signal SRF(t) are frequency-modulated ramp signals that are generated within an operating frequency range (e.g., a predefined radar frequency range). For example, the local oscillator signal S(t) may be a frequency-modulated ramp signal that includes a plurality of frequency ramps, each starting at a respective ramp start frequency and ending at a respective ramp stop frequency, and the respective ramp start frequencies and the respective ramp stop frequencies of the plurality of frequency ramps define a frequency range within the bounds of the operating frequency range. The frequency range of the plurality of frequency ramps may be defined by the lowest start frequency fand the highest stop frequency famong the frequency ramps in a given time interval (e.g., in an implementation in which the frequency increases within each frequency ramp). As noted above, the start frequency fand the stop frequency fof a sequence of frequency ramps may be the same, and thus the center frequency of each ramp may be constant. Alternatively, the center frequency of each ramp (and therefore fand f) may vary from ramp to ramp or after detecting an interference. The bandwidth (e.g., frequency range) of each ramp may also vary from ramp to ramp or after detecting an interference.

As indicated above,is provided as an example. Other examples may differ from what is described with regard to.

is a block diagram that illustrates an example structure of the radar sensor. As shown, the radar sensormay include one or more TX antennas, one or more RX antennas, a radar MMIC(comprising an RF front-end, a baseband signal processing circuit, and an analog-to-digital converter (ADC)), a digital signal processor (DSP), and a controller. In some implementations, the MMIC may include a digital front-end (DFE) coupled downstream from the ADC. The digital front-end may include circuit components associated with performing signal processing on a digital signal generated by the ADC(e.g., digital filtering). In some cases, the DFE may include the DSP.

In the radar sensor, the one or more TX antennasand the one or more RX antennasare connected to the RF front-end. The RF front-endmay include circuit components associated with performing RF signal processing. These circuit components may include, for example, a local oscillator (LO), one or more RF power amplifiers, one or more LNAs, one or more directional couplers (e.g., rat-race couplers, circulators, or the like), or one or more mixers for downmixing (e.g., down-converting or demodulating) RF signals into baseband or an IF band. The RF front-endmay be integrated into the radar MMICwith one or more other components, as shown in. The IF band is sometimes also referred to as baseband. Accordingly, “baseband” and “IF band” may be used interchangeably herein. Baseband signals are those signals on the basis of which radar targets are detected.

Antenna arrays may be used instead of single antennas. The depicted example shows a bistatic (or pseudo-monostatic) radar system, which has separate RX and TX antennas. In the case of a monostatic radar system, a single antenna or a single antenna array may be used to both receive and transmit electromagnetic (radar) signals. In this case, a directional coupler (e.g., a circulator) may be used to separate RF signals to be transmitted to the radar channel from RF signals received from the radar channel. In practice, radar systems often include several TX and RX channels, which allows for measurement of the direction (e.g., direction of arrival) from which the radar echoes are received.

In some implementations, the radar sensormay include a plurality of TX antennasand a plurality of RX antennas, which enables the radar sensorto measure an AoA from which radar echoes are received. In the case of such systems, individual TX channels and RX channels may be constructed identically or similarly and may be distributed over one or more radar MMICs.

In some implementations, a signal emitted by the TX antennamay be in a range from approximately 20 GHz to approximately 100 GHz, such as in a range between approximately 76 GHz and approximately 81 GHz. As mentioned, a radar signal received by the RX antennaincludes radar echoes (e.g., chirp echo signals); that is to say, those signal components that are backscattered at one or more targets.

The received RF signal y(t) is downmixed into, for example, baseband to generate a baseband signal y(t), and the baseband signal y(t) is processed further in baseband by way of analog signal processing performed by the baseband signal processing circuit. In some implementations, the baseband signal processing circuitmay be configured to filter and/or amplify the baseband signal y(t) to generate an analog (baseband) output signal y(t) that is derived from the baseband signal y(t). The baseband signal y(t) may also be referred to as analog radar data. If the received RF signals are down-converted into the IF band, the baseband signal processing circuitmay be referred to as an IF signal processing circuit. Thus, the baseband signal processing circuit, in general, may also be referred to as an analog signal processing circuit.

The ADCmay be configured to digitize the baseband signal y BB(t) or the analog output signal y(t) to generate a digital baseband signal y[n], also referred to as a digital output signal. The digital baseband signal y[n] is representative of the radar data received in the received RF signal y(t). The DSPmay be configured to further process the digital baseband signal y[n] in the digital domain. For example, the DSPmay be configured to receive the digital radar data in the digital baseband signal y[n] and process the digital radar data using the ramp parameters (e.g., respective ramp start frequencies, the respective ramp stop frequencies, a bandwidth of a frequency range, a ramp start time, or a sampling start time) used to generate the respective frequency ramps of the received RF signal y(t) in order to generate a range Doppler map, which may then be further used by the DSPfor object detection, classification, and so on.

In some implementations, the controlleris configured to control operation of the radar sensor(e.g., by controlling one or more other components of the radar sensor, as indicated in). The controllermay include, for example, a microcontroller unit (MCU).

In some implementations, the RF front-end, the baseband signal processing circuit, the ADC, and/or the DSPmay be integrated in a single radar MMIC(e.g., an RF semiconductor chip). Alternatively, two or more of these components may be distributed over multiple radar MMICs. In some implementations, the DSPmay be included in the controller. In some implementations, the techniques associated with TX monitoring and/or RX monitoring may be performed by one or more components of the radar sensor, such as by the DSP, the controller, or the like.

As indicated above,is provided as an example. Other examples may differ from what is described with regard to. The number and arrangement of devices and components shown inare provided as an example. In practice, there may be additional devices or components, fewer devices or components, different devices or components, or differently arranged devices or components than those shown in. Furthermore, two or more devices or components shown inmay be implemented within a single device or component, or a single device or component shown inmay be implemented as multiple, distributed devices or components. Additionally, or alternatively, a set of devices or components (e.g., one or more devices or components) shown inmay perform one or more functions described as being performed by another set of devices or components shown in.

shows a schematic block diagram of a radar systemaccording to one or more implementations. The radar systemincludes the radar MMIC(e.g., a semiconductor chip) and an MCU. The MCUmay correspond to the controllerdescribed in connection with. Thus, the MCUmay be an external controller. The radar MMICincludes a transmitter, including at least one transmit channelfor transmitting radar signals, and/or at least one receive channelfor receiving and processing radar signals (e.g., radar echos). The radar MMICmay further include a sequencer, a monitoring circuit, a ramp signal generator, a controller/MMIC interface, and a power supply unit.

The transmit channelmay include one or more circuit components and is configured to generate radar transmission signals and to output the radar transmission signals to one or more antennas. As indicated in, the transmittercan comprise one or more of the transmit channels. The receive channelmay include one or more circuit components and is configured to receive and process one or more radar reception signals from one or more antennas. As indicated in, the receive channelcan comprise one or more receivers, an analog front-end, an ADC, a digital front-end, and an interface.

The analog front-endmay include all of the circuit components needed for RF signal processing. Such circuit components may (but need not necessarily) include, for example, an LO, RF power amplifiers, LNAs, directional couplers such as rat-race-couplers and circulators, and mixers for the down-conversion of RF signals into the baseband or an IF band.

Antenna arrays may be used instead of single antennas. The depicted example shows a bistatic (or pseudo-monostatic) radar system which has separate RX and TX antennas. In the case of a monostatic radar system, a single antenna or a single antenna array may be used to both receive and transmit electromagnetic (radar) signals. In this case, a directional coupler (e.g., a circulator) may be used to separate RF signals to be transmitted to the radar channel from RF signals received from the radar channel. In practice, radar systems often include several TX channels and reception RX channels, which among other things allows for the measurement of the direction (e.g., DOA) from which the radar echoes are received.

In the case of an FMCW radar system, the transmitted RF signals radiated by the TX antenna may be in the range between approximately 20 GHz and 100 GHz (e.g., in the frequency band 21 to 26 GHz or in the frequency band 76 to 81 GHZ). As mentioned, the RF signal received by the RX antenna includes the radar echoes (for example, the signal back-scattered at the radar targets).

The received RF signals are down-converted into the baseband (or the IF band) and further processed in the baseband using analog signal processing at the analog front-end, which basically includes filtering and amplification of the baseband signal. If the received RF signals are down-converted into the IF band, the baseband signal processing chain of the analog front-endmay be referred to as an IF signal processing chain. Thus, the processing chain of the analog front-endmay, in general, be referred to as an analog signal processing chain.

The baseband signal is finally digitized using the ADCand further processed in the digital domain at the digital front-end. The digital front-endincludes a digital signal processing chain implemented, for example, in a DSP.

The sequencer(e.g., a sequencing circuit) may be configured to determine a sequencing scheme for time-dependent functions of the transmitterand/or of the receive channel, and also to drive circuit elements of the transmit channeland/or of the receive channelin accordance with the sequencing scheme. A time-dependent function of the transmitterand/or of the receive channelmay be a function which is to be performed or carried out in a manner temporally coordinated or synchronized with other time-dependent functions of the transmitterand/or of the receive channelin order to ensure correct operation of the radar sensor or radar system. Accordingly, the sequencing scheme represents a temporally coordinated or synchronized order of performance of individual time-dependent functions.

By way of example, the time-dependent functions may include a function of the transmit channelrelating to generating a radio-frequency radar transmission signal (e.g., a frequency-modulated ramp signal), a function of the receive channelrelating to processing a radio-frequency radar reception signal, a monitoring function for one or more circuit components of the transmit channeland/or of the receive channel, a monitoring function for a signal processed by the transmit channeland/or the receive channel, or a calibration of a transmit channeland/or a receive channel. For example, the time-dependent function may include a transmit calibration function for calibrating the transmit channel, a receive calibration function for calibrating the receive channel, a transmit monitoring function for monitoring the transmit channel, a receive monitoring function for monitoring the receive channel, a ramp function for generating ramp segments of a frequency-modulated ramp signal (e.g., of a radar signal), an event monitoring function for monitoring for a trigger event, a read function to read data from a read memory location of the radar MMIC, or a write function to write data to a write memory location of the radar MMIC.

The sequencercan be implemented, for example, as a dedicated circuit or as a circuit for executing software (e.g., a sequencing program), and configured to determine the sequencing scheme and to drive circuit elements of the transmitterand/or of the receive channelin accordance with the sequencing program. Thus, the sequencing program may be programmed with the sequencing scheme. In some implementations, the sequencermay be referred to as a digital timing engine, a timing control engine, or a timing controller.

In some implementations, the sequencermay include a decoder and a set of first-in first-out (FIFO) buffers. The decoder may be configured to read the sequencing program (e.g., a specific instruction set including a set of opcodes associated with operating the radar device) from a sequencer memory of the sequencer, and generate control values and timestamps based at least in part on the sequencing program. A control value may be a value that is to be provided as an input to a component of the radar MMICat a time indicated by a corresponding timestamp. The component may be any on-chip component of the radar MMIC, including but not limited to the transmit channel, the receive channel, the monitoring circuit, and/or the ramp signal generator. The control value (and, optionally, the timestamp) may be stored by a FIFO buffer associated with the component, and the FIFO buffer may be configured to provide the control value as the input to the component of the radar MMICat the time indicated by the timestamp.

In some implementations, the sequencermay include a processing unit, such as a CPU, configured to read the sequencing program from the sequencer memory and execute the sequencing program. Thus, the sequencermay include a memory (e.g., the sequencer memory) that stores the sequencing program for execution by the dedicated circuit and/or by the processing unit.