An active receiver card for a display is provided. The active receiver comprises a processor, and at least one interface, configured to receive a broadcast serialized video data stream as input from a video processing system. The active receiver card is configured to be electrically connected to a tile of a display. The processor of the active receiver card is configured to extract from the received broadcast serialized video data stream video image data pertaining to the tile of the display, and based thereon, the active receiver card is configured to output the control signals used to control a plurality of pixels of the tile of the display. The display is configured to receive a first video stream and a second video stream for the at least one interface.
Legal claims defining the scope of protection, as filed with the USPTO.
. An active receiver card comprising:
. The active receiver card according to, wherein the active receiver card comprises a first interface and a second interface, and said display is configured to receive the first video stream for the first interface and the second video stream for the second interface.
. The active receiver card according to, wherein the second video stream is different from the first video stream.
. The active receiver card according to, wherein the first video stream is providing an image using odd pixels, and the second video stream is providing an image using even pixels.
. The active receiver card according to, wherein the first video stream is the top or upper layer or overlay of an image, and the second video stream is the bottom or under layer or underlay of said image.
. The active receiver card according to, wherein the first and second video stream are part of a 3D display application, wherein the first video stream is providing an image meant for a left eye, and the second video stream is providing an image meant for a right eye.
. The active receiver card according to, wherein the first video stream is originating from a first source, and the second video stream is originating from a second source.
. The active receiver card according to, wherein the first video stream received by the first interface and the second video stream received by the second interface, are used alternatingly in said active receiver card.
. The active receiver card according to, wherein the second video stream is derived from the first video stream.
. The active receiver card according to, wherein the first video stream and the second video stream are each providing an image to said display.
. The active receiver card according to, wherein the first video stream is providing a first image to said display, the second video stream is providing a second image to said display, and depending on said first or second image, the first video stream is overlaying the second video stream on said display, or vice versa, the second video stream is overlaying the first video stream on said display.
. The active receiver card according to, wherein for said depending on said first or second image, mathematical operations are performed by said processor to analyze in real-time said first and second image.
. The active receiver card according to, wherein algorithms are used by said processor to intelligently adapt the first or second image, for example in opacity/transparency, position, brightness, color rendering, visibility or with animation effects.
. A display comprising:
. The display according to, wherein the active receiver card comprises a plurality of interfaces, each of the plurality of interfaces being configured to receive a broadcast serialized video data stream as input from a video processing system.
. The display according to, wherein the plurality of interfaces of the active receiver card comprises at least a first interface and a second interface, and said display is configured to receive the first video stream for the first interface and the second video stream for the second interface.
. The display according to, wherein the second video stream is different from the first video stream.
. The display according to, wherein each of the plurality of interfaces of the active receiver card are configured to be used in parallel.
. A method for a display according to, the method comprising:
. The method according to, wherein the first video stream and the second video stream received respectively via the first interface and second interface are synchronized and blended such that images provided by said first and second video streams are displayed with reduced latency and such that seamless overlays without frame drops or misalignment are ensured.
Complete technical specification and implementation details from the patent document.
This application is a continuation-in-part of and claims priority to U.S. application Ser. No. 18/545,800, filed Dec. 19, 2023, which claims the benefit of and priority to U.S. Provisional Patent Application Ser. No. 63/433,646 filed on Dec. 19, 2022 and entitled “Modular Display with Integrated on Camera Feature Sets,” which is expressly incorporated herein by reference. This application also further claims priority to each of the following applications: U.S. application Ser. No. 18/322,279, filed May 23, 2023; U.S. application Ser. No. 18/351,243, filed Jul. 12, 2023; U.S. application Ser. No. 18/216,459, filed Jun. 29, 2023; U.S. application Ser. No. 18/217,201, filed Jun. 30, 2023; U.S. application Ser. No. 18/217,261, filed Jun. 30, 2023; U.S. application Ser. No. 18/217,268, filed Jun. 30, 2023; and U.S. application Ser. No. 18/233,115, filed Aug. 11, 2023, the contents of each of which are expressly incorporated herein by reference.
This disclosure relates to a video processing system, and particularly to a video processing system that generates and/or uses a serialized video protocol for delivering video data to a display system. As disclosed herein, the video processing system, in particular, provides a simplified data path from which a display system may read data for eventual display by one or more display components. Also disclosed is a method of reading data from a video data stream such that specific devices viewing the video data stream may read only that data which pertains to itself and allow all data untouched to pass through it, even data that pertains to itself.
There are several methods by which video data may be delivered to a display. Generally, related Light-Emitting Diode (LED) systems are based upon a topology where a processor takes in the desired video data via, for example, an HDMI or SDI cable and performs various calculations and remapping functions on the video data. After these calculations are performed, the data is usually compressed before sending the results, via an ethernet or ethernet-like cable, to a breakout box. Depending on the LED tile resolution and the available bandwidth, one often needs to manually calculate (see calculations below) how many LED tiles one can connect in a loop from any single cable coming from an output of the breakout box. Ethernet or ethernet-like cables are then distributed over a number of LED tiles based on the results of the calculations, as shown in.
The LED tiles often comprise multiple LED Display Modules (LDMs). The LDMs are usually mounted to a mechanical frame electrically connected to the hub board (a.k.a., hub card). The hub card serves as an electrical interface between the LDMs, a power supply, an ethernet or ethernet-like cable, and the receiver card (). The receiver card may be analogized to the heart of the LED tile and contains the digital logic for driving the LEDs. The LDMs usually have a multiplexing layout wherein LEDs are connected on one side to the multiplexing and on the other side to Constant Current Drivers (CCDs).
The calculation to determine how many LED tiles one can connect in a loop from any single ethernet or ethernet-like cable from the breakout box, as mentioned above, may be performed according to the following process:
Assuming that there is a video data signal of 60 Hz which is configured for a 12-bit color depth RGB 512×512 pixel LED tile:
It is noted that this even calculation is optimistic as it doesn't contain any overhead of the ethernet encoding and overhead for sending frames, preambles, and so on. The actual calculation is even lower with an input of a 120 Hz video signal, (usually this vertical frame refresh rate is used for showing 3D video), then Gigabit ethernet cannot be used as the minimal necessary bandwidth is 1.44 Gbps for these kinds of tiles. (The later proposed system as disclosed herein is then really the world's first high resolution processing system that can display 3D for high resolution tiles.)
The inventors of the present application have found that for these kind of applications, traditional processor topologies using ethernet or ethernet-like protocols will need to use much more expensive, high-bandwidth transmissions, such as 10 Gbps ethernet physical layer (ethernet phy) chipsets and interconnect or even use expensive fiber connection and cabling. But still then the inventors of the present application have found the significant problem that this topology—apart from being expensive—will suffer from other drawbacks such as higher latency, the difficulty of configuring the individual LED tiles and increase of processing complexity in related systems.
Some traditional processor manufacturers might also use “compression algorithms” applied to the tile ethernet or ethernet-like data streams to get below the restricted bandwidth, but this introduces pixel artifacts and (sometimes) frame artifacts, which are extremely undesirable. One example is issuing YUV video stream instead of an RGB video stream (RGB->YUV). Some even use comparison to previous video frames and hence introduce frame delay. But again, these methods provide unsatisfactory results.
An object of the invention is to provide a video processing system that generates and/or uses a serialized video protocol for delivering video data to a display system. In particular, the aim is that the video processing system provides a simplified data path from which the display system may read data for eventual display by one or more display components. The aim is also to provide a method of reading data from a video data stream such that specific devices viewing the video data stream may read only that data which pertains to itself and allow all data untouched to pass through it, even data that pertains to itself (passing through).
According to an aspect of the invention, an active receiver card is provided for a display comprising one or more tiles, and wherein each tile comprises a plurality of pixels. The active receiver card is configured to be electrically connected to one of the one or more tiles of the display. The active receiver comprises: a processor; a first interface configured to receive a broadcast serialized video data stream as input from a video processing system; and a second interface configured to output control signals used to control the plurality of pixels of the one tile of the display. The word “active” in active receiver card, particularly refers to the fact that it comprises a processor. The active receiver card is considered as a smart device since it comprises a processor. In other words, the processor makes the receiver card an active device, which does all the work in order to get the right, required or intended image on the screen or display. The video processing system as referred to, is an external system or external equipment, meaning that it is physically present outside of the display. According to the aspect, the video processing system is merely intended to capture video images. Hence, according to an embodiment, the functionality of the video image processing system could be incorporated in a first tile of the display. Such video images are delivered to the video processing system, which results in the broadcast serialized video data stream. Such broadcast serialized video data stream, may comprise only video images (coming in or passing through at e.g. 6.2 or 12.5 Gbps (or more) bandwidth), in a downstream communication, i.e. towards the display (or an active receiver card thereof). Alternatively, such broadcast serialized video data stream, may comprise, in addition to video images, also communication information (coming in or passing through at e.g. 20 Mbps bandwidth), in a downstream communication, i.e. towards the display. Or else, such broadcast serialized video data stream, may comprise, in addition to video images, communication information (coming in or passing through at e.g. 20 Mbps bandwidth), in a downstream communication, i.e. towards the display, as well as communication information (coming in or passing through at e.g. 20 Mbps bandwidth), in an upstream communication (in a direction opposite to the downstream direction), i.e. (from the display back) towards the video processing system. The processor of the active receiver card is configured to extract from the received broadcast serialized video data stream video image data pertaining to the tile of the display, and based thereon, the active receiver card is configured to output the control signals used to control the plurality of pixels of the tile of the display. When the broadcast serialized video data stream arrives at a tile of the display, the active receiver card of that tile “knows” (because of having the processor therein) what image and information comprised in such video data stream is intended for that tile, and hence the active receiver card “knows” what that tile has to display. It is noted that such video data stream may also comprise what image and information is intended for other tiles, and what has to be displayed by these other tiles. In other words, the video data stream is providing an image (or images), possibly also including additional information to the display or the display tiles. The active receiver card may be configured to receive through the first interface the broadcast serialized video data stream, wherein the broadcast serialized video data stream may comprise data not pertaining to the tile of the display, or wherein the broadcast serialized video data stream may comprise data pertaining to other tiles.
The active receiver card may receive the broadcast serialized video data stream as asymmetrical communication between the active receiver card and the video processing system. With asymmetrical communication is meant that for example the video images, all or not combined with communication information, in downstream communication are coming in or passing through at (much) higher bandwidth (e.g. 6.2 or 12.5 Gbps) than for example communication information returning back, in upstream communication at (much) lower bandwidth (at e.g. 20 Mbps). The active receiver card may be configured to operate asymmetrically with the video processing system such that the serialized video data stream transmitted downstream from the video processing system is transmitted at a higher bandwidth than a bandwidth of data transmitted upstream to the video processing system. It is also possible that there is no communication information returned back, hence resulting also in an asymmetric communication. The active receiver card may be configured to receive through the first interface the broadcast serialized video data stream without requiring return communication or without confirmation to the video processing system.
The tile may comprise a board onto which the plurality of pixels of the tile are provided, and wherein such board may comprise per pixel one or more light-emitting elements (LEEs), such as for example LEDs. The second interface may be directly or indirectly electrically connected to such board. In case the second interface being directly electrically connected, the active receiver card may be mounted directly onto the tile (and hence, e.g. without the need of a hub board for an indirect connection). According to an embodiment, the tile may comprise one or more boards, e.g. LED boards, onto which the plurality of pixels can be provided, and wherein such board may comprise per pixel one or more light-emitting elements (LEEs), such as for example LEDs. In case of more than one boards, e.g. four LED boards, the second interface of the active receiver card may be indirectly electrically connected to each of the (four LED) boards, for example via a hub board, connecting the active receiver card with the (four LED) boards.
The active receiver card may further comprise a non-volatile memory that stores at least one (x,y) coordinate of a pixel of the plurality of pixels of one of the tiles of the display that corresponds to said pixel mounted on the board of one of the tiles, the at least one (x,y) coordinate corresponding to a particular (x,y) pixel coordinate of said one of the tiles. The processor of the active receiver card may be configured to determine a coordinate (a,b) out of the serialized video data stream, and compare the determined coordinate (a,b) to the at least one (x,y) coordinate of said pixel of the plurality of pixels.
The processor of the active receiver card may be configured to extract a corresponding pixel value from the serialized video data stream. The processor of the active receiver card may be configured to perform at least one mathematical operation on the corresponding pixel value. The processor of the active receiver card may be configured to convert an outcome of the at least one mathematical operation to an output that can be interfaced with the second interface (e.g. for adapting brightness). The processor of the active receiver card may be configured to send corresponding signals to said board of the tile comprising the plurality of pixels of said tile and per pixel comprising one or more LEEs, to light up the LEEs in correspondence with the outcome of the at least one mathematical operation.
According to an aspect of the invention, a method is provided for controlling with an active receiver card a plurality of pixels of a tile of a display, the active receiver card being electrically connected to the tile of the display, the method comprising: (i) receiving by a first interface a broadcast serialized video data stream as input from a video processing system; (ii) extracting by a processor of the active receiver card, from the received broadcast serialized video data stream, video image data pertaining to the tile of the display; and (iii) based on the extracted video image data pertaining to the tile, outputting, by a second interface of the active receiver card, control signals used to control the plurality of pixels of the tile of the display.
According to an aspect of the invention, a modular display system is provided, configured to broadcast a serialized video data stream, comprising: a display for displaying the serialized video data stream, wherein the display comprising a plurality of tiles, comprising at least a first tile and a second tile; and a video processing system configured to output the serialized video data stream as a plurality of portions of the serialized video data stream, each of the plurality of portions of the serialized video data stream pertaining to a corresponding one of the plurality of tiles, such that the plurality of portions of the broadcast serialized video data stream comprises at least a first portion of the serialized video data stream comprising video image data pertaining to the first tile of the display and a second portion of the serialized video data stream comprising video image data pertaining to the second tile of the display; wherein the video processing system outputs both the first portion of the serialized video data stream and the second portion of the serialized video data stream combined as a single broadcast data stream to a first active receiver card corresponding to the first tile of the display and to a second active receiver card corresponding to the second tile of the display.
According to an aspect of the invention, a video processing system is provided comprising: a video processor configured to output video data to be displayed by a display as a video image, the video data being output by the video processor is a serialized digital video stream, resembling the complete relevant video information to be displayed.
According to an aspect of the invention, an active receiver card is provided for a display, the active receiver comprising: a processor; a first interface configured to receive a broadcast serialized video data stream as input from a video processing system, wherein the active receiver card is configured to be electrically connected to a tile of a display; wherein the active receiver card further comprises a second interface configured to output control signals used to control a plurality of pixels of the tile of the display; wherein the processor of the active receiver card is configured to extract from the received broadcast serialized video data stream video image data pertaining to the tile of the display, and based thereon, the active receiver card is configured to output the control signals used to control a plurality of pixels of the tile of the display.
According to an aspect of the invention, a method is provided for controlling with an active receiver card pixels of tile of a display the active receiver card being electrically connected to a tile of the display, the method comprising: receiving by a first interface a broadcast serialized video data stream as input from a video processing system; extracting by a processor of the active receiver card, from the received broadcast serialized video data stream, video image data pertaining to the tile of the display; and based on the extracted video image data pertaining to the tile, outputting, by a second interface of the active receiver card, control signals used to control a plurality of pixels of the tile of the display.
According to an aspect of the invention, a video processing system is provided comprising: a video processor configured to broadcast a serialized video data stream to be displayed by a display, the video data being output by the video processor as a plurality of portions of the serialized video data stream, each of the plurality of portions of the serialized video data stream pertaining to a corresponding one of a plurality of tiles of the display, including at least a first tile and a second tile, such the plurality of portions of the broadcast serialized video data stream include at least a first portion of the serialized video data stream including video image data pertaining to the first tile of the display and a second portion of the serialized video data stream that includes video image data pertaining to the second tile of the display, wherein the video processor outputs both the first portion of the serialized video data stream and the second portion of the serialized video data stream combined as a single broadcast data stream to an active first receiver card corresponding to the first tile of the display and to a second active receiver card corresponding to the second tile of the display.
According to an aspect of the invention, an active receiver card is provided comprising: a processor; a first interface configured to receive input from a video processing system; and a second interface configured to output signals to a plurality of pixels of a display tile corresponding to the active receiver card, wherein the active receiver card is configured to be connected to a tile of a display comprising a plurality of tiles, wherein the active receiver card is configured to receive a plurality of portions of the video data from the video processing system, each of the plurality of portions of video data corresponding to one of the plurality of tiles of the display, and wherein the active receiver card is configured to retrieve pixel data relating to the plurality of pixels of the display tile, and based thereon, is configured to output signals to light individual pixels of the display tile.
According to an aspect of the invention, a video processing system is provided comprising: a video processor configured to output video data to be displayed by a display as a video image, the video data being output by the video processor as a plurality of portions of the video data to be displayed by a corresponding plurality of tiles of the display, such that a first tile displays a first portion of the video image based on a first portion of the video data and a second tile displays a second portion of the video based on a second portion of the video data, wherein the video processor outputs both the first portion of the video data and the second portion of the video data to each of the first tile and the second tile.
According to an aspect of the invention, a video processing method is provided comprising: outputting video data to be displayed by a display as a video image, the video data being output by a video processor as a plurality of portions of the video data to be displayed by a corresponding plurality of tiles of the display, such that a first tile displays a first portion of the video image based on a first portion of the video data and a second tile displays a second portion of the video based on a second portion of the video data, wherein outputting the video data includes outputting both the first portion of the video data and the second portion of the video data to each of the first tile and the second tile.
Further, in view of the above Background, and the problems with related video processing systems and methods identified by the inventors of the present invention, an aim of the disclosure is to provide a simple, for example, serialized, video protocol for transmitting video data to all LED tiles of a display at once instead of using ethernet or ethernet-like protocols that need to send individual (personalized) data to each of the individual tiles in an LED display. In contrast to current systems, in an embodiment of the system and methods disclosed herein, all LED tiles see or are provided the entire video data transmission of the full relevant image to be displayed and hence, the tile processor may read that part of the video data that pertains to itself and simply display it. In fact, this means that the complex logic, which is typically associated with expensive, centralized video processors, is instead distributed all over the display. This might, at first, seem less cost effective. However, the impact of this decentralization on performance is immense as this non-centralized system enables the execution of more calculations and implementation of more complex algorithms since the pixels which need processing locally in the receiver card will always be less compared to the amount of pixels that are needed for full screen processing as done in related approaches. Further, by using a simple video protocol, the system (frame) latency can be reduced significantly (see later).
According to a first aspect of the invention, a video processor is provided that is configured to send a video data stream, wherein data is communicated downstream from the video processor in a higher amount than the data communicated upstream to the video processor. This may be termed an “asymmetrical” video data stream, in that the that the downstream communication (to the tiles) is of a bandwidth, data rate, or bitrate that is significantly higher than the upstream communication (back to processor). The ratio of the asymmetrical video data stream (downstream to upstream) communication may be, for example, greater than 1, or approximately, 1.05 to 1; 1.1 to 1; 1.5 to 1; 2 to 1; 3 to 1; 4 to 1; 5 to 1; 6 to 1; 7 to 1; 8 to 1; 9 to 1; 10 to 1; 15 to 1; 20 to 1; 30 to 1; 40 to 1; 50 to 1; 60 to 1; 70 to 1; 80 to 1; 90 to 1; 100 to 1; or greater, including, but not limited to, 150 to 1; 200 to 1; 300 to 1; 400 to 1; 500 to 1; 600 to 1; 700 to 1; 800 to 1; 900 to 1; 1,000 to 1; 1,500 to 1; 2,000 to 1; 3,000 to 1; 4,000 to 1; 5,000 to 1; 10,000 to 1; 20,000 to 1; 30,000 to 1; 50,000 to 1; 100,000 to 1; 200,000 to 1; 300,000 to 1; 400,000 to 1; 500,000 to 1; 1,000,000 to 1; 2,000,000 to 1; 5,000,000 to 1; 10,000,000 to 1; or greater. Further, the ratio of the asymmetrical video data stream (downstream to upstream) communication may be in the range of greater than 1-2 to 1; 1.1 to 1-5 to 1; 1.1 to 1-10 to 1; 1.1 to 1-20 to 1; 1.1 to 1-50 to 1; 1.1 to 1-100 to 1; 1.5 to 1-5 to 1; 1.5 to 1-10 to 1; 1.5 to 1-20 to 1; 1.5 to 1-50 to 1; 1.5 to 1-100 to 1; 2 to 1-5 to 1; 2 to 1-10 to 1; 2 to 1-20 to 1; 2 to 1-50 to 1; 2 to 1-100 to 1; 2 to 1-1,000 to 1; 2 to 1-5,000 to 1; 2 to 1-10,000 to 1; 5 to 1-10 to 1; 5 to 1-20 to 1; 5 to 1-50 to 1; 5 to 1-100 to 1; 5 to 1-1,000 to 1; 5 to 1-5,000 to 1; 5 to 1-10,000 to 1; 10 to 1-20 to 1; 10 to 1-50 to 1; 10 to 1-100 to 1; 10 to 1-1,000 to 1; 10 to 1-5,000 to 1; 10 to 1-10,000 to 1; 10 to 1-50,000 to 1; 10 to 1-100,000 to 1; 100 to 1-1,000 to 1; 1,000 to 1-10,000 to 1; 1,000 to 1-100,000 to 1; 1,000 to 1-1,000,000 to 1.
The order of the data communicated need not be communicated sequentially (e.g., pixel N followed by pixel N-1, then N-2, etc.) or in other words linearly, but may be communicated out of order as long as the order the data is in is predetermine and fixed (e.g., it is predetermined and fixed that pixel N comes first, then pixel N-5, then pixel N-2, etc.). Additionally, a display is configured to display at least a part of the data communicated along the video data stream. Further, at least one receiver card is connected to or configured to receive a signal from the video processor, wherein the receiver card comprises a video transceiver/reclocker configured to capture data from the video data stream that is specific to said receiver card and to allow all video data from the video data stream to pass through said receiver card. The receiver card may further comprise non-volatile memory, volatile memory, an embedded processor, logic to mitigate the effects of synchronization banding when capturing in high-speed sync, a video/LED processor, and an interface between the receiver card and a hub board.
Additionally, individual pixel light generation may start and stop after a predefined start and stop period. The display may immediately update at the beginning of the start period. The start of the start and stop period may be based on the vertical sync signal or a programmable time to wait after a vertical sync signal. The stop of the start and stop period may be calculated by digitally measuring the time between two consecutive vertical sync signals or by calculating a fraction of the measurement between two consecutive vertical sync signals. Also, multiple pixel light generations may start and stop during the time between two vertical sync signals. Further, the start and stop conditions may be derived from a vertical sync signal and a measured camera shutter time. This embodiment may also have sync-banding capabilities.
The data communicated along the video data stream may be made up of at least 8-bit RGB pixel data but may be more or less than 8-bits. Further, the data communicated along the video data stream may be uncompressed. Additionally, the data communicated along the video data stream may also contain serialized communication data for communication with the display (typically an LED display). The display may use Pulse Width Modulation (PWM) schemes, multiplexing schemes, or active matrix schemes.
According to a second aspect of the invention, an embodiment may comprise at least two electrical interfaces. The first electrical interface may receive a video data stream, wherein the order of the data communicated along the video data stream need not be communicated sequentially as long as the data is in a predetermined and fixed order; the second electrical interface may be electronically connected directly or indirectly with a board containing one or more LEDs. Additionally, the embodiment may comprise non-volatile memory that stores at least one (x, y) coordinate of a pixel that corresponds to one LED that is mounted on the LED board. This (x, y) coordinate also corresponds to a particular pixel coordinate.
According to an embodiment, digital logic (or a processor, a controller, or other circuitry) may be implemented to determine an (a, b) coordinate pair out of data communicated along the video data stream and compare the (a, b) coordinate with an (x, y) coordinate. The digital logic may also (i) retrieve the corresponding pixel data from the data communicated along the video data stream, (ii) perform at least one mathematical operation on the retrieved data, (iii) convert the outcome of the mathematical operation to logic that can interface with the second electrical interface, and/or (iv) send corresponding signals to the board containing one or more LEDs to light up the LED in correspondence with the outcome of the mathematical operation.
According to another embodiment, a system is provided having at least three electrical interfaces, the first electrical interface being capable of receiving the data communicated along the video data stream; the second electrical interface being capable of sending the data communicated along the video data stream; and/or the third electrical interface being connected directly or indirectly with a board containing one or more LEDs. Digital logic (or a processor, a controller, or other circuitry) may be present that connects the first electrical interface to the second electrical interface. There may also be digital logic, a processor, a controller, or other circuitry to change predetermined data in the video data stream before it is presented to the second electrical interface, for example, to perform autoconfiguration, i.e., automatically detect how many tiles are present and how they need to be positioned. Additionally, the data presented to the second electrical interface may be significantly different than the data presented to the third electrical interface.
According to another embodiment, a video processing system may have at least five electrical interfaces. The first and second electrical interfaces being capable of receiving the data communicated along the video data stream with downstream communication; the third and fourth interfaces being capable of sending the data communicated along the video data stream with downstream communication; the fifth electrical interface is electronically connected directly or indirectly with a board containing one or more LEDs. There may be digital logic, a processor, a controller, or other circuitry that connects the first electrical interface to the third or fourth electrical interface and the second electrical interface to the third or fourth electrical interface. The digital logic may also (i) change predetermined data in the video data stream, received from the first and second electrical interfaces, (ii) determine activity on the first and second electrical interfaces, and (iii) retrieve pixel data from either or both of the first and the second electrical interfaces.
In an embodiment, at least one mathematical operation may be performed on the retrieved pixel data. Such operations include, but are not limited to, correction of the brightness, gamma correction, color correction, or subdelta correction. Other operations may include a calibration, a content-dependent calibration, a time-dependent calibration, a scaling function, and/or a rotation function.
Similar to the first aspect of the invention, this second aspect may perform at least one mathematical operation on the retrieved pixel data. Such operations include, but are not limited to, correction of the brightness, gamma, color, and subdelta of the display. Other operations still include calibrating the display dependent on the content of the digital serialized video data stream or the timing of the stream. Further operations may include scaling or rotation of the video data.
According to one embodiment, digital logic may be present to determine a predefined start to light up the LEDs within one video frame and/or to determine a predefined stop to light up the LEDs. Further, non-volatile memory may be included to store the predefined start and the predefined stop. The digital logic, a processor, a controller, or other circuitry may also read the non-volatile memory and, at power-up, read the non-volatile memory to determine the predefined start and the predefined stop. Multiple such starts and stops may be used in one image frame.
According to yet another embodiment, the video processing system may comprise volatile memory to at least store pixel information before or after the performance of the aforementioned mathematical operation. Digital logic, a processor, a controller, or other circuitry may also perform (i) gamma correction, (ii) calibration, (iii) autodetection, (iv) the reading and writing of data to and from volatile memory, and (v) the storing of measurement data instead of calibration data.
In a third aspect of the invention, a video data stream, wherein the order of the data communicated along the video data stream need not be communicated sequentially as long as the data is in a predetermined and fixed order, is generated by a laptop, Personal Computer (PC), or any other existing device that has a graphical engine or Graphics Processing Unit (GPU) incorporated therein. The Graphical User Interface (GUI) for adjusting screen settings may also be integrated in the existing GUI of the graphical engines of the existing device with a graphical engine or GPU. The aforementioned mathematical operations may be a part of the GPU system for rendering content to be displayed on the LEDs.
According to an embodiment, the video data stream may also contain an upstream communication channel to individual communicate with one or more LEDs or LED tiles via an active receiver card. The data communicated along the video data stream may also be replaced by partially rendered data.
According to a fourth aspect of the invention, a computing device is provided for a display system comprising a display, wherein the computing device is configured to broadcast a serialized video data stream to a plurality of active receiver cards, each of the plurality of active receiver cards being electrically connected respectively to a corresponding tile of the display, the display including a plurality of tiles, each of the active receiver cards being respectively configured to output control signals used to control a plurality of pixels of the tile of the display corresponding to said active receiver card, wherein the serialized video data stream broadcast by the computing device includes in a serialized format video image data pertaining to each of the plurality of tiles of the display.
According to an embodiment, the computing device is a computer, personal computer, laptop, or a device having a graphical engine incorporated therein. According to an embodiment, the computing device broadcasts the serialized video data stream to the plurality of active receiver cards as an asymmetrical communication between the computing device and the active receiver card. According to an embodiment, the computing device broadcasts the serialized video data stream to the plurality of active receiver cards without requiring return communication or without confirmation from the plurality of active receiver cards to the computing device. According to an embodiment, the computing device broadcasts the serialized video data stream to the plurality of active receiver cards such that the broadcast serialized video data stream includes video image data pertaining to a first of said tiles of the display and not pertaining to at least a second of said tiles of the display and the video image data pertaining to a first of said tiles is received by both a first active receiver card corresponding and electrically connected to the first tile of the display and a second active receiver card corresponding to and electrically connected to the second tile of the display. According to an embodiment, the computing device broadcasts the serialized video data stream to the plurality of active receiver cards such that the serialized video data stream transmitted downstream from the computing device is transmitted at a higher bandwidth than a bandwidth of data transmitted upstream to the video processor.
According to an embodiment, the computing device is configured to control a LED display, such that the serialized video data stream broadcast by the computing device includes the video image data pertaining to LEDs of the plurality of tiles of the LED display.
According to a fifth aspect of the invention display system comprising: a computing device in accordance with fourth aspect; a display including a plurality of tiles; and a plurality of active receiver cards, each of the plurality of active receiver cards being electrically connected respectively to a corresponding tile of the plurality of tiles of the display, each of the active receiver cards being respectively configured to output control signals used to control a plurality of pixels of the tile of the display corresponding to said active receiver card.
According to an embodiment, each of the active receiver cards comprises a non-volatile memory that stores at least one (x,y) coordinate of a pixel of the plurality of pixels of the first tile of the display that corresponds to one LED that is mounted on an LED board of the first tile, the at least one (x,y) coordinate corresponding to a particular (x,y) pixel coordinate.
According to an embodiment, each of the active receiver cards comprises a processor configured to determine a coordinate (a,b) out of the serialized video data stream, and compare the determined coordinate (a,b) to the at least one (x,y) coordinate of a pixel of the plurality of pixels.
The processor of each of the active receiver cards may be configured to extract a corresponding pixel value from the serialized video data stream.
The processor of each of the active receiver card may be configured to perform at least one mathematical operation on the corresponding pixel value.
The processor of the active receiver card may be configured to convert an outcome of the at least one mathematical operation to an output of the active receiver card.
The processor of the active receiver card may be configured to send corresponding signals to a board of the first tile containing one or more LEDs, to light up the LEDs in correspondence with the outcome of the at least one mathematical operation.
According to a sixth aspect of the invention, a method is provided for displaying video images on a display system comprising a display with a plurality of tiles, each of the tiles of the display system being respectively controlled with an active receiver card that is electrically connected to a tile of the display, the method comprising: broadcasting with a computing device a serialized video data stream to a plurality of active receiver cards, each of the plurality of active receiver cards being electrically connected respectively to a corresponding tile of the display, the display including a plurality of tiles, each of the active receiver cards being respectively configured to output control signals used to control a plurality of pixels of the tile of the display corresponding to said active receiver card, wherein the serialized video data stream broadcast by the computing device includes in a serialized format video image data pertaining to each of the plurality of tiles of the display.
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November 13, 2025
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