Management Device, Management Method, and Wafer Manufacturing System

This disclosure relates to a management device for managing a wafer processing device, a management method, and a wafer manufacturing system including the wafer processing device.

In a semiconductor wafer polishing device, there has conventionally been known a double-side polishing method for wafers that can control batch-to-batch variation in GBIR values of wafers after polishing (See, e.g., PTL 1, etc.).

PTL 1: JP 2019-114708 A1

In recent years, as design rules in semiconductor devices have increasingly been detailed, the requirements for semiconductor wafer standards have become stricter. As a result, in promoting the improvement of wafer processing yield, problems began to be observed in cases where the yield difference between devices became significant, depending on the required standards.

Therefore, the purpose of the present disclosure is to propose a management device, a management method, and a wafer manufacturing system that can improve the wafer processing yield.

One embodiment of the present disclosure that solves the above problem is as follows.

According to the management device, the management method, and the wafer manufacturing system in accordance with the present disclosure, the wafer processing yield can be improved.

Hereinafter, a wafer manufacturing systemin accordance with one embodiment of the present disclosure will be described with reference to the drawings. As illustrated in, the wafer manufacturing systemcomprises a wafer processing deviceand a management device. The management devicemanages the wafer processing device. The management devicemay assign a process to be processed by the wafer processing device. The management devicemay determine the processing conditions in the wafer processing device.

In this embodiment, the wafer processing deviceis described as a double-side polishing device for wafers. The wafer processing deviceis not limited to a polishing device, but may also be other processing devices such as a wire saw device.

is a top view of the wafer processing devicein accordance with one embodiment of the present disclosure.is a cross-sectional view taken along the line A-A in. As illustrated in, the wafer processing devicecomprises a rotating surface platehaving an upper surface plateand a lower surface plateopposed thereto, a sun gearprovided at the center of rotation of the rotating surface plate, and an internal gearin an annular shape provided around the outer circumference of the rotating surface plate. As illustrated in, polishing padsare affixed to the opposing sides of the upper and lower rotating surface plates, i.e., the lower side, the polishing surface, of the upper surface plate, and the upper side, the polishing surface, of the lower surface plate, respectively.

The wafer processing devicecomprises a plurality of carrier plates, which are provided between the upper surface plateand the lower surface plateand have one or more holesfor holding a workpiece W (wafer) to be processed. In, only one of the pluralities of carrier platesis illustrated. Also, the number of the holesmay be one or more, e.g., three. The workpiece W may be held in the holes.

Assume that the wafer processing deviceis a planetary gear type double-side polishing device that can make the carrier plateperform planetary motion including orbital and rotational motion by rotating the sun gearand the internal gear. By rotating the carrier platein planetary motion while supplying polishing slurry, and by rotating the upper surface plateand the lower surface platerelative to the carrier plate, the wafer processing devicecan slide the polishing padsaffixed to the upper and lower rotating surface platesand both sides of the workpiece W held in the holesof the carrier plateagainst each other, to simultaneously polish both sides of the workpiece W.

In the wafer processing deviceaccording to this embodiment, the upper surface platehas one or more holesthat penetrate from the upper surface of the upper surface plateto the lower surface thereof, which is the polishing surface. That is, the holesare provided in the upper surface plate. One holeis disposed at a location that passes near the center of the workpiece W. The number of the holesis not limited to one, but may be two or more. The holesmay be provided in the lower surface plateas well as in the upper surface plate. One or more holesmay be provided in at least one of the upper surface plateand the lower surface plate. The holesmay be arranged in multiple locations around the circumference of the upper surface plate(on the dash-single-dotted line in). As illustrated in, the holesmay penetrate through to the polishing padaffixed to the upper surface plate. In other words, the holesmay penetrate from the upper surface of the upper surface plateto the lower surface of the polishing pad.

The wafer processing devicemay be configured to measure the thickness of a workpiece W in real time through one or more holesduring double-side polishing on the workpiece W. Specifically, the wafer processing devicemay comprise a workpiece thickness measuring deviceat a position corresponding to the hole. In the example illustrated in, the workpiece thickness measuring deviceis disposed above the upper surface plate. In this embodiment, assume that the workpiece thickness measuring deviceis a wavelength-variable infrared laser device. The workpiece thickness measuring devicemay, for example, comprise an optical unit that irradiates a laser beam onto the workpiece W, a detection unit that detects the laser beam reflected from the workpiece W, and a calculation unit that calculates the thickness of the workpiece W from the detected laser beam. The example workpiece thickness measuring devicecan calculate the thickness of a workpiece W based on the difference in optical path length between the reflected laser light reflected on the front surface of the workpiece W and the reflected laser light on the back surface of the workpiece W. The workpiece thickness measuring devicemay be any device capable of measuring the thickness of the workpiece W in real time, and is not limited to the device using an infrared laser as exemplified above.

The wafer processing devicein accordance with the present disclosure comprises a control section. The control sectionis connected to the upper surface plate, the lower surface plate, the sun gear, the internal gear, and the workpiece thickness measuring device. The control sectioncontrols each component of the wafer processing device.

The wafer processing devicemay perform only one process to process the workpiece W, or it may perform two or more processes. The process of processing a workpiece W is also referred to as a processing process. The wafer processing devicecontrols the amount of wafer processing in each processing process by setting values for one or more setting items in each process. In other words, the value set for each setting item performed by the wafer processing deviceidentifies the processing operation of the wafer processing device. The values set for setting items are also referred to as setting values. That is, the processing volume for wafers in each processing process is controlled by changing the setting value of each setting item.

The setting items in the processing process performed by the wafer processing devicemay include, for example, the polishing time of the workpiece W or the pressure at which the workpiece W is polished. In addition, the setting items may include various items such as the number of rotations of the upper surface plateor the number of revolutions or rotations of the carrier plate.

The characteristics of a wafer change as a result of the wafer processing deviceprocessing the wafer. The characteristics of a wafer are determined by the flatness of the front or back surface of the wafer, or the thickness of the wafer, etc. The characteristics of a wafer processed by the wafer processing deviceare also referred to as post-processing characteristics.

When the wafer processing deviceexecutes one processing process, a plurality of setting items in that process can affect the post-processing characteristics of the wafer in relation to each other. Also, when the wafer processing deviceexecutes a plurality of processing processes, the setting items of each processing process can affect the post-processing characteristics of the wafer in relation to each other. Further, in the wafer manufacturing system, the setting items of the processing process executed by a plurality of wafer processing devicescan affect the post-processing characteristics of the wafer in relation to each other.

The wafer processing devicein accordance with this embodiment may further comprise a calculation sectionthat determines the timing to finish double-side polishing on the workpiece W during double-side polishing on the workpiece W. The calculation sectionis connected to the control section. The calculation sectionobtains a workpiece thickness data measured by the workpiece thickness measuring deviceand determines the timing to finish double-sided polishing on the workpiece W. The control sectionmay terminate the processing operation of the workpiece W by the wafer processing device, at the timing determined by the calculation section. The determination of when to finish double-sided polishing on a workpiece W is also referred to as an endpoint detection. The calculation sectionmay determine the timing for completing double-sided polishing on the workpiece W based on a thickness of the workpiece W as described above, or it may determine the timing as the timing after a predetermined time has elapsed from the timing when a thickness of the workpiece W meets the predetermined condition. The post-processing characteristics of a wafer processed by the wafer processing devicecan be adjusted by setting the time to continue further polishing from the timing when the endpoint is detected, as the processing conditions of the device.

The management devicehas a control section. The control sectiondetermines the parameters that specify the processing conditions of the wafer processing deviceand outputs them to the wafer processing device. The control sectionis configured to be able to communicate with the control sectionof the wafer processing device. The control sectionmay include at least one processor. The processor may execute programs that implement various functions of the control section. The processor may be realized as a single integrated circuit. The integrated circuits are also referred to as ICs. The processors may be realized as a plurality of communicatively connected integrated circuits and discrete circuits. The processors may be realized based on various other known technologies.

The management devicemay further comprise a memory section. The memory sectionstores, for example, measurement results of wafer characteristics measured by an external wafer measurement device. The memory sectionmay include an electromagnetic storage medium such as a magnetic disk, or it may include a memory such as a semiconductor memory or a magnetic memory. The memory sectionmay include a non-transitory computer readable medium. The memory sectionstores various types of information and programs executed by the control section. The memory sectionmay function as a work memory for the control section. At least a portion of the memory sectionmay be configured as a separate entity from the control section.

The management devicemay further comprise a communication sectionthat transmits and receives data to and from the wafer processing deviceor an external device. The communication sectionmay be connected to other devices for communication via a network. The communication sectionmay be connected to other devices for wired or wireless communication. The communication sectionmay comprise a communication module that connects to a network or other device. The communication module may comprise a communication interface such as LAN (Local Area Network). The communication module may comprise a communication interface for contactless communication such as infrared communication or Near Field communication (NFC). The communication module may implement communication using various communication methods, such as 4G or 5G. The communication method implemented by the communication sectionis not limited to the above example and may include various other methods.

The wafer processing deviceprocesses a wafer (workpiece W). The post-processing characteristics of a wafer are determined by processing conditions applied to the wafer. If the wafer manufacturing systemcomprises a plurality of wafer processing devicesthat perform the same processing, each of the wafers is processed by one of the wafer processing devices. That is, the processing conditions applied to the wafer include information for selecting a wafer processing deviceto be applied to process the wafer from among the plurality of wafer processing devices. The processing conditions applied to the wafer include setting items for when the selected wafer processing deviceprocesses the wafer.

When a given type of wafer is manufactured using the wafer processing device, the post-processing characteristics of the wafer must meet the standard for that type. In this wafer manufacturing systemin accordance with this embodiment, the control sectionof the management devicedetermines processing conditions to be applied to the wafer so that the post-processing characteristics of the wafer meet the standards for a given type. The control sectionoutputs the processing conditions to the wafer processing deviceselected as the processing conditions. The wafer processing deviceprocesses the wafer based on the processing conditions.

An indicator representing the post-processing characteristics of a wafer may include, for example, an indicator representing wafer flatness. An indicator representing the wafer flatness is also referred to as a flatness index.

The flatness index of a wafer may include, for example, the amount of unevenness. The amount of unevenness is an indicator of the degree of unevenness in the overall shape of the wafer. The amount of unevenness is obtained by approximating the relationship between the wafer thickness and the wafer radial position on the wafer with an even function, and then calculating the difference between the even function value at the wafer center and the even function value at the wafer outer periphery. Here, the wafer is defined as convex if the calculated value is positive; and the wafer is defined as concave if the calculated value is negative. The magnitude of the absolute value of the calculated value then represents the degree of unevenness. The flatness index of a wafer may include, for example, an outer circumferential flatness. The outer circumferential flatness is a measure of the flatness of the wafer periphery. The outer circumferential flatness may be expressed, for example, by ESFQD (Edge Site flatness Front reference least sQuare Deviation). The ESFQD evaluates the distance between the reference surface in the site and the wafer surface at each site after dividing the wafer periphery into multiple sites. The smaller the maximum absolute value of ESFQD, the higher the flatness of the wafer.

Assume that, in the wafer manufacturing systemin accordance with this embodiment, the indicators of the post-processing characteristics of a wafer shall include the amount of unevenness and the outer circumferential flatness. The amount of unevenness is also referred to as the first index. The outer circumferential flatness is also referred to as the second index. As mentioned above, the amount of unevenness represents the unevenness of the wafer surface. The outer circumferential flatness represents the flatness of the wafer periphery. As illustrated in, the unevenness of the surface of a polished wafer correlate with the shape of the wafer periphery. Specifically,illustrates four different wafer surface topographies (A) through (D). In, the dashed line represents the position of the surface when the wafer is flattened (reference plane). The solid line represents the cross- sectional shape of the wafer surface. In, the left side of the dashed line representing the reference plane is located at the center of the wafer, and the right side thereof is located at the wafer periphery.

The topographies (A) and (B) inrepresent a shape in which the wafer surface is below the reference plane (the surface shape is concave) and the wafer periphery is higher than the reference plane. In comparing (A) and (B) in, the concave shape of the wafer surface is deeper in (A) than in (B). The shape of the wafer periphery is higher in (A) than in (B). That is, there is a relationship that the deeper the concave shape of the wafer surface, the higher the wafer periphery. The state where the wafer periphery is high is also referred to as RollUp.

Assume that, when the shape of the wafer surface is concave as illustrated in (A) and (B) in, the amount of unevenness is a negative value. Also, assume that, when the wafer periphery has a shape that is higher than the reference plane as illustrated in (A) and (B) in, the outer circumferential flatness is a positive value. In comparing (A) and (B) in, the amount of unevenness is smaller in (A) than in (B). The absolute value of the amount of unevenness is greater in (A) than in (B). The outer circumferential flatness is greater in (A) than in (B). That is, there is a relationship that the smaller the amount of unevenness, the greater the outer circumferential flatness.

The topographies (C) and (D) inrepresent a shape in which the wafer surface is above the reference plane (the surface shape is convex) and the wafer periphery is lower than the reference plane. In comparing (C) and (D) in, the convex shape of the wafer surface is higher in (D) than in (C). The wafer periphery is lower in (D) than in (C). That is, there is a relationship that the higher the convex shape of the wafer surface, the lower the wafer periphery. The state where the wafer periphery is low is also referred to as RollOff.

Assume that, when the shape of the wafer surface is convex as illustrated in (C) and (D) in, the amount of unevenness is a positive value. Also, assume that, when the wafer periphery has a shape that is lower than the reference plane as illustrated in (C) and (D) in, the outer circumferential flatness is a negative value. In comparing (C) and (D) in, the amount of unevenness is greater in (D) than in (C). The outer circumferential flatness is smaller in (D) than in (C). The absolute value of the outer circumferential flatness is greater in (D) than in (C). That is, there is a relationship that the larger the amount of unevenness, the smaller the outer circumferential flatness.

To summarize what has been mentioned above with reference to, in a wafer processed with the wafer processing devicein accordance with this embodiment, the uneven shape of the wafer surface correlates with the height of the wafer periphery. In addition, the amount of unevenness correlates with the outer circumferential flatness. Arrows are provided on the right side of each waveform from (A) to (D) in, to provide the trend of changes in values of the amount of unevenness and the outer circumferential flatness. The values of the amount of unevenness and the outer circumferential flatness tend to vary inversely. In this embodiment, it is assumed that the longer the polishing time by the wafer processing device, the larger the value of unevenness and the smaller the value of the outer circumferential flatness.

The flatness index of a wafer is not limited to the above examples and may include GBIR (Global Backside Ideal Range), ESFQR (Edge flatness metric, Sector based, Front surface referenced, least sQuares fit reference plane, Range of the data within a sector), or various other metrics such as Bump. The indicator representing the post-processing characteristics of a wafer is not limited to the flatness index and may include a variety of other indicators, such as an indicator representing the thickness of a wafer.

As mentioned above, the control sectionof the management devicedetermines processing conditions so that post-processing characteristics of a wafer meet the standard for a given type. In this embodiment, the control sectiondetermines the processing conditions so that the amount of unevenness and the outer circumferential flatness, among indicators representing the post-processing characteristics of a wafer, meet the standard.

When the wafer manufacturing systemcomprises a plurality of wafer processing devices, the post-processing characteristics of wafers will vary even if the same processing conditions are set for each of the wafer processing devicesto process the wafers. Considering the variation in the post-processing characteristics of the wafers processed by each of the wafer processing devices, the control sectionmust adjust the processing conditions for each of the wafer processing devicesso that the post-processing characteristics of the wafers processed by each of the wafer processing devicesmeet the standard for a given type. However, by adjusting the processing conditions so that the amount of unevenness and the outer circumferential flatness meet the standard, other indicators may change.

The control sectionmay select, from among the plurality of wafer processing devices, a wafer processing devicethat ensures that the post-processing characteristics of wafers meet the standard for a given type without adjusting the processing conditions. The control sectionmay apply the selected wafer processing deviceto process the wafers. The post-processing characteristics of the wafers processed by the selected wafer processing device, are likely to meet the standard for a given type. In addition, the control sectionmay judge, for each of the wafer processing devices, whether the post-processing characteristics of wafers meet the standard for a given type without adjusting the processing conditions. The control sectionmay apply the wafer processing device, which has been judged to meet the standard, to process the wafers. The post-processing characteristics of the wafers processed by a wafer processing devicethat has been judged to meet the standard for a given type without adjusting the processing conditions, are likely to meet the standard for a given type. By making it easier for the post-processing characteristics of wafers to meet the standard for a given type, the wafer processing yield is improved.

In other words, the control sectionmay evaluate the ease of meeting the standard as a result of the processing by the wafer processing device. The control sectionmay apply the highly rated wafer processing deviceto process wafers. Even in this way, the post-processing characteristics of wafers are likely to meet the standard for a given type. As a result, the wafer processing yield is improved.

Specifically, the control sectionselects a wafer processing devicein which the post-processing characteristics of wafers meet the standard for a given type without adjusting the processing conditions, based on an actual data of the post-processing characteristics of the wafers processed by each of the wafer processing devices. In addition, the control sectionjudges whether the post-processing characteristics of wafers meet the standard for a given type without adjusting the processing conditions with respect to each of the wafer processing devices, based on an actual data of the post-processing characteristics of the wafers processed by each of the wafer processing devices. The control sectionmay evaluate the probability that the post-processing characteristics of wafers processed by each of the wafer processing devicesmeet the standard, based on an actual data of the post-processing characteristics of the wafers processed by each of the wafer processing devices. The control sectionmay determine the wafer processing deviceto be applied to process the given type of wafers by the selection, determination or evaluation.

The control sectionmay determine the wafer processing deviceto be applied to process a given type of wafers, based on a data representing the relationship between the amount of unevenness and the outer circumferential flatness as illustrated in, as an actual data on the post-processing characteristics of wafers. In the graph in, the horizontal axis corresponds to the amount of unevenness. The sign of the value of the amount of unevenness is assumed to be positive (+) on the right side and negative (−) on the left side. The vertical axis corresponds to the outer circumferential flatness. The sign of the outer circumferential flatness value is assumed to be positive (+) on the upper side and negative (−) on the lower side. At the intersection of the horizontal and vertical axes, the values of the amount of unevenness and the outer circumferential flatness are assumed to be zero.

The pointsrepresented by solid (black) circles in the graph inrepresent the average values in the amount of unevenness and the outer circumferential flatness of a plurality of wafers processed under the specified processing conditions in each of the wafer processing devices. The areas, represented by the boundary of ellipses surrounding each of the points, represent the range of variations in the amount of unevenness and the outer circumferential flatness of the plurality of wafers processed by each of the wafer processing devices. The areasare calculated based on the standard deviation of the values of the amount of unevenness and the outer circumferential flatness of the plurality of wafers processed under the specified processing conditions in each of the wafer processing devices. Since the outer circumferential flatness tends to become − as the amount of unevenness becomes +, the areahas a shape with a major axis extending in the direction from the upper left to the lower right in the graph.

When manufacturing a given type of wafers, the post-processing characteristics of the wafers processed by the wafer processing devicemust meet the standard. As illustrated in the graph in, assuming that the standard regarding the amount of unevenness and the outer circumferential flatness, for example, is set as the standard that the post-processing characteristics of a given type of wafers should meet. In, the horizontal axis represents the amount of unevenness. The vertical axis represents the outer circumferential flatness. The two dashed lines along the vertical axis represent the upper and lower limits of the standard for the amount of unevenness. The two dashed lines along the horizontal axis represent the upper and lower limits of the standard for the outer circumferential flatness. In other words, the standard that the post-processing characteristics of a given type of wafers should meet is represented as a rectangular range enclosed by the two dashed lines vertically and horizontally, respectively.

The post-processing characteristics of wafers are represented by the mean value and the range of variation, as described above. Let us assume that the average value of the post-processing characteristics of wafers processed by a certain wafer processing deviceis represented by a pointand the range of variation is represented by an area. This wafer processing deviceshall be referred to as the first processing device. The post-processing characteristics of the wafers processed by the first processing device may not meet the standard if the outer circumferential flatness varies towards the positive side (+), as the areaextends beyond the upper limit of the standard for the outer circumferential flatness.

Also, let us assume that the average value of the post-processing characteristics of wafers processed by a certain wafer processing deviceis represented by a point, and the range of variation is represented by an area. This wafer processing deviceshall be referred to as the second processing device. The post-processing characteristics of the wafers processed by the second processing device can meet the standard even considering the variations in the amount of unevenness and the outer circumferential flatness, since the areais within the standard.

Here, let us assume that the variations in the post-processing characteristics of wafers processed by each of the wafer processing devicesis the same. In this case, the closer the average value of the post-processing characteristics of the wafers processed by the wafer processing deviceis to the center of the standard, the more likely the post-processing characteristics of the wafers processed by that wafer processing devicewill meet the standard, even taking variations into account. As an indicator that represents the average value of the post-processing characteristics of wafers is close to the center of the standard, in the graph in, the distance between the point representing the average value of the post-processing characteristics of the wafers and the origin O representing the center value of the standard can be calculated. A short distance between the point representing the average value of the post-processing characteristics of wafers and the origin O representing the central value of the standard means that the average value of the post-processing characteristics of the wafers is close to the central value of the standard.

In the graph in, the horizontal scale representing the amount of unevenness and the vertical scale representing the outer circumferential flatness are each assumed to be normalized so that the width of the standard for the amount of unevenness is equal to the width of the standard for the outer circumferential flatness. In this case, the distance is calculated as the square root of the sum of: the square of the amount of unevenness; and the square of the outer circumferential flatness. In other words, the distance can be calculated as the length of a two-dimensional vector whose elements are the respective values of the amount of unevenness and the outer circumferential flatness representing the post-processing characteristics, in a two-dimensional space whose origin is a point representing the center value of the standard.

The aspects in which the distance is calculated are not limited to this example. The graph representing the post-processing characteristics of wafers may have a coordinate system in which the widths of the two standards are normalized to be equal, as illustrated in, or it may have a coordinate system in which the widths of the two standards are different. Regardless of the ratio of the display of the width of the standard in the graph, the distance may be calculated by weighting the difference between the amount of unevenness and the central value of the standard, and the difference between the outer circumferential flatness and the central value of the standard, respectively. If the post-processing characteristics are represented by only one type of indicator, the distance can be calculated as the absolute value of the difference between the center of the standard for that indicator and the value of that indicator. If “n” is a natural number greater than or equal to 2 and the post-processing characteristics are represented by n types of indicators, the distance can be calculated as the length of an n-dimensional vector whose elements are the values of each of the n types of indicators representing the post-processing characteristics in n-dimensional space with the point representing the center of the standard at the origin.

If the post-processing characteristics are represented by n types of indicators, the graph has an axis corresponding to each of the n types of indicators. For example, if the number of indicators identifying the post-processing characteristics is n, the graph has n axes. The control sectionmay actually generate and display the graph, or it may generate the graph virtually as an internal process.

The point, which represents the average value of the post- processing characteristics of wafers processed by the first processing device, is located on a circle drawn by a dash-single-dotted line whose center is at the origin O and whose radius is R. That is, the distance: from the origin O which represents the center value of the standard for the given type of wafers; to the pointwhich represents the average value of the post-processing characteristics of the wafers processed by the first processing device, is expressed as R. Also, the point, which represents the average value of the post-processing characteristics of wafers processed by the second processing device, is located on the circle drawn by a dash-single-dotted line whose center is at the origin O and whose radius is R. That is, the distance: from the origin O which represents the center value of the standard for the given type of wafers; to the pointwhich represents the average value of the post-processing characteristics of the wafers processed by the second processing device, is expressed as R.

In, Ris longer than R. In this case, the distance from the origin O to the pointrepresenting the average value of the post-processing characteristics of the wafers processed by the second processing device is shorter than the distance from the origin O to the pointrepresenting the average value of the post-processing characteristics of the wafers processed by the first processing device.