Pressure Detection Element and Pressure Sensor

This application is based on and claims priority to Japanese Patent Application No. 2024-078578 filed on May 14, 2024, the entire contents of which are incorporated herein by reference.

The present disclosure relates to a pressure detection element and a pressure sensor.

A pressure detection element configured to detect a pressure from a fluid based on a change in electrical resistance in a piezoresistor provided in a diaphragm of a semiconductor substrate is provided. Japanese Patent Laid-Open Application Publication No. 1999-344402 discloses a configuration including: a sensor chip formed of a semiconductor and including a diaphragm configured to be displaced by receiving a pressure; a plurality of strain gauges, such as piezoresistors, formed in the diaphragm; and a stress balance film configured to generate a pressure to balance a change in stress generated at respective positions of the plurality of strain gauges due to a change in temperature.

A pressure detection element according to an aspect of the present disclosure includes: a semiconductor substrate that includes a diaphragm and a frame enclosing the diaphragm in a plan view; and a bridge circuit that includes a plurality of piezoresistors disposed over the diaphragm, a first metal interconnect configured to electrically connect adjacent piezoresistors of the plurality of piezoresistors, and a diffusion interconnect disposed between each of the plurality of piezoresistors and the first metal interconnect. The first metal interconnect is disposed in a remaining region excluding a first region in the semiconductor substrate. The first region is a region of a plurality of imaginary circles having a radius of a length that is 0.5 L1 or more and less than L1 from a center of each of the plurality of piezoresistors, where L1 denotes a shortest distance between each of the plurality of piezoresistors and an outer periphery of the frame in the plan view.

A pressure sensor according to another aspect of the present disclosure includes: a pressure detection element; a flow path of a fluid, the flow path being continuous with the pressure detection element; and a meter configured to obtain a pressure detection signal output from the pressure detection element in accordance with a pressure received from the fluid, thereby measuring the pressure. The pressure detection element includes a semiconductor substrate that includes a diaphragm and a frame enclosing the diaphragm in a plan view, and a bridge circuit that includes a plurality of piezoresistors disposed over the diaphragm, a first metal interconnect configured to electrically connect adjacent piezoresistors of the plurality of piezoresistors, and a diffusion interconnect disposed between each of the plurality of piezoresistors and the first metal interconnect. The first metal interconnect is disposed in a remaining region excluding a first region in the semiconductor substrate. The first region is a region of a plurality of imaginary circles having a radius of a length that is 0.5 L1 or more and less than L1 from a center of each of the plurality of piezoresistors, where L1 denotes a shortest distance between each of the plurality of piezoresistors and an outer periphery of the frame in the plan view.

A stress distribution in a semiconductor substrate changes in accordance with a layout of metal interconnects configured to electrically connect a plurality of piezoresistors. Also, a stress applied to the piezoresistors at an initial time, i.e., when no pressure is received from a fluid, can change in accordance with the change in the stress distribution in the semiconductor substrate. This can influence output characteristics of a pressure detection signal when the diaphragm of the semiconductor substrate is deflected by receiving a pressure from the fluid. In some cases, the stress balance film alone cannot sufficiently mitigate the impact of the pressure detection signal on output characteristics. Thus, it is required to further improve pressure detection accuracy.

The present disclosure provides a pressure detection element and a pressure sensor configured to improve pressure detection accuracy.

Hereinafter, embodiments of the present disclosure will be described below with reference to the drawings. In the drawings, the same components are denoted by the same symbols, and thus duplicate description thereof will be omitted.

In the drawings, an orthogonal coordinate having an X axis, a Y axis, and a Z axis is used for directional expressions. The X axis, the Y axis, and the Z axis are orthogonal to each other. A direction along the X axis is described as an X-axis direction. A direction along the Y axis is described as a Y-axis direction. A direction along the Z axis is described as a Z-axis direction. In the X-axis direction, a direction in which an arrow is directed is described as a +X direction or a +X side, and a direction opposite to the +X direction is described as a −X direction or a −X side. In the Y-axis direction, a direction in which an arrow is directed is described as a +Y direction or a +Y side, and a direction opposite to the +Y direction is described as a −Y direction or a −Y side. In the Z-axis direction, a direction in which an arrow is directed is described as a +Z direction or a +Z side, and a direction opposite to the +Z direction is described as a −Z direction or a −Z side. In the present specification, the +Z direction or the +Z side may be referred to as “top” or “upper”, and the −Z direction or the −Z side may be referred to as “bottom” or “lower”.

In the present specification and the claims, “along a direction” refers to two axes or directions being parallel within a tolerance of ±5 degrees. Also, “orthogonal” means that an angle relative to any direction includes a range of 90 degrees±5 degrees. However, these directional expressions do not limit directions in the embodiments. Orientations of the pressure detection element and the pressure sensor in use are as desired.

An example of the overall configuration of a pressure sensoraccording to the embodiment will be described with reference to.is an exploded perspective view schematically illustrating an example of the pressure sensoraccording to the embodiment. In the following description, an electrical connection between object A and object B will be simply referred to as “connection”.

A pressure sensorillustrated inincludes a pressure detection element, a meter, a substrate, and a cover. The pressure detection elementand the meterare mounted at different positions at a first surfaceof the substrate. The coveris provided on the first surfaceside of the substrate, and covers the pressure detection elementand the meter. A flow path of a fluid is provided in the cover. The flow path of the fluid in the coveris continuous with the pressure detection element.

An example of the configuration of the pressure detection elementwill be described with reference to. The pressure detection elementand the meterare connected via a conductive wire, such as a bonding wire or the like. A pressure detection signal output from the pressure detection elementis transmitted to the metervia the conductive wire. However, a conductor forming a signal transmission path from the pressure detection elementto the meteris not limited to the conductive wire.

The meteris configured to obtain the pressure detection signal output from the pressure detection element. The meterincludes a signal processing circuitconfigured to convert an analog pressure detection signal, obtained from the pressure detection element, to a digital signal. The signal processing circuitis also configured to process the converted digital signal, thereby measuring a pressure. The signal processing circuitincludes, for example, an electronic circuit, such as an analog front end, a microcomputer, or the like.

The substratemay be a wiring substrate including the first surfaceand interconnects in the interior of the wiring substrate. The interconnects of the substrateare connected to, for example, an external power supply circuit. The pressure detection elementand the meterare connected to an external power supply circuit via the interconnects provided in the substrate. For example, the interconnects provided in the substrateare connected to the pressure detection elementand the metervia the conductive wire. With this configuration, the external power supply circuit supplies a power supply potential and a reference potential to the pressure detection elementand the meter. However, the conductor forming a path through which the power supply potential and the reference potential are to be supplied from the external power supply circuit to the pressure detection elementand the meteris not limited to the conductive wire.

Next, an example of the configuration of the pressure detection elementwill be described with reference to.is a block diagram illustrating an example of an equivalent circuit corresponding to a circuit configuration in the pressure detection element.is a plan view schematically illustrating an example of an overall configuration of the pressure detection element.is a partial cross-sectional view illustrating an example of a cross section of the pressure detection elementcut along line IV-IV illustrated in.is a partial cross-sectional view illustrating an example of a cross section of the pressure detection elementcut along line V-V illustrated in. For the sake of convenience of description,omits illustration of a surface oxide film, an interlayer insulating film, and a protective film of the semiconductor substrate included in the pressure detection element. In other words, for the sake of convenience of description, in, piezoresistors (or piezoresistive elements), diffusion interconnects, and various metal interconnects included in the pressure detection elementare illustrated to be exposed from the top surface of the semiconductor substrate.

As illustrated in, the pressure detection elementincludes a semiconductor substrateand a bridge circuit. The pressure detection elementmay further include an amplifierand various terminals, such as a power supply potential terminal, a first reference potential terminal, a second reference potential terminal, a first output terminal, a second output terminal, and the like. The pressure detection elementmay further include, for example, other circuit components other than the amplifier. Examples of the other circuit components include a constant current supply circuit configured to supply a constant current to the amplifier. However, the other circuit components are not limited to a constant current supply circuit. The first output terminaland the second output terminalare examples of an “output terminal”.

In addition to metal interconnects included in the bridge circuit(first metal interconnects, which will be described below), the pressure detection elementmay include other metal interconnects (second metal interconnects, third metal interconnects, fourth metal interconnects, fifth metal interconnects, and sixth metal interconnects, which will be described below).

An example of the configuration of the semiconductor substratewill be described below. The semiconductor substrateis formed using, for example, an SOI (Silicon On Insulator) substrate. The semiconductor substrateformed using the SOI substrate includes, for example, a support layerformed of a semiconductor, such as silicon (Si) or the like, a BOX (Buried Oxide) layerformed of an insulator, such as silicon dioxide (SiO) or the like, and an active layerformed of a semiconductor, such as Si or the like.

As illustrated in, the semiconductor substratehas a substantially rectangular shape in a plan view. However, the shape of the semiconductor substratein a plan view is not limited to the substantially rectangular shape. The shape of the semiconductor substratein a plan view may be any other shape, such as a substantially circular shape, a substantially elliptical shape, a substantially polygonal shape, or the like.

In a plan view, the semiconductor substrateincludes a diaphragmdisposed in a center region, and a frameenclosing the diaphragm. The thickness of the diaphragmis smaller than the thickness of the frame. The diaphragmis deflected by receiving a pressure from a fluid. The frameis continuous with an outer peripheryof the diaphragm. Here, the outer peripheryis a region in which the active layeris thicker than in a region inward of the outer peripheryin the diaphragm. The framesupports the diaphragm. In the example illustrated in, an outer peripheryof the framecorresponds to the outer periphery of the semiconductor substrate. The outer peripheryof the framemay be referred to as “the outer peripheryof the semiconductor substrate”.

As illustrated in, the diaphragmfaces a −Z-side surface of the support layer, i.e., a recessthat is recessed from the −Z-side surface toward a +Z-side surface of the semiconductor substrate. The recessis formed by removing the center region of the support layerand the BOX layerof the semiconductor substratein a plan view, for example, by a processing method, such as etching or the like. The diaphragmis formed of the active layerof the semiconductor substrate. In the example illustrated in, the framecorresponds to the remaining region excluding the diaphragmof the semiconductor substrate. As illustrated in, the frameincludes the support layer, the BOX layer, and the active layerof the semiconductor substrate. The diaphragmand the frameare structurally integrated. In the active layer, preferably, the thickness of a portion forming the outer peripheryof the diaphragmis substantially the same as the thickness of a portion forming the frame.

As illustrated in, the diaphragmmay include: a plurality of grooves,,, and, which are recessed toward the −Z side; and a plurality of beams,,, and, which are disposed between the plurality of grooves,,, andand project toward the +Z side beyond the grooves,,, and

In the diaphragm, the remaining regions excluding the outer peripheryand the beams,,, andcorrespond to the regions of the grooves,,, and. When the grooves,,, andare described without distinction, these are collectively referred to as “grooves”, hereinafter. When the beams,,, andare described without distinction, these are collectively referred to as “beams”, hereinafter. In the example illustrated in, the diaphragmincludes four groovesand four beams. Two of the four groovesare disposed next to each other via one of the beams. However, the number of groovesand beamsincluded in the diaphragmis not limited to this.

The beamsextend in different directions from a center O of the diaphragmin a plan view, and are continuous with the outer peripheryof the diaphragm. Specifically, the beamextends from the center O toward the −X side, and is continuous with the −X-side region of the outer periphery. The beamextends from the center O toward the −Y side, and is continuous with the −Y-side region of the outer periphery. The beamextends from the center O toward the +X side, and is continuous with the +X-side region of the outer periphery. The beamextends from the center O toward the +Y side, and is continuous with the +Y-side region of the outer periphery. The ends of the beamscloser to the center O are referred to as “inner ends”, hereinafter. The ends of the beamscloser to the outer peripheryare referred to as “outer ends”, hereinafter.

The beamshave a substantially rhombic shape in a plan view. In other words, the width of the beamsbecomes smaller in the regions at the inner end and the outer end of the beams, while the width of the beamsbecomes the thickest in an intermediate region between the inner end and the outer end. However, the shape of the beamsin a plan view is not limited to the substantially rhombic shape. The shape of the beamsin a plan view may be any other shape, such as a substantially rectangular shape, a substantially elliptical shape, or the like.

As illustrated in, preferably, the semiconductor substratefurther includes a surface oxide film, an interlayer insulating film, and a protective film. The surface oxide filmis disposed over the active layer. The surface oxide filmis, for example, a thermal oxide film that is formed over the surface of the active layerwhen the semiconductor substrateis heated. The interlayer insulating filmis disposed over the surface oxide film. Various types of metal interconnects, such as the separately described first metal interconnects, second metal interconnects, third metal interconnects, fourth metal interconnects, fifth metal interconnects, sixth metal interconnects, and the like are disposed over the interlayer insulating film. For example, a plurality of interlayer insulating filmsmay be provided. The plurality of interlayer insulating filmsmay be provided, for example, at different positions in the Z-axis direction. For preventing a short circuit between at least two metal interconnects of the first metal interconnects, the second metal interconnects, the third metal interconnects, the fourth metal interconnects, the fifth metal interconnects, and the sixth metal interconnects, these different metal interconnects may be disposed, for example, at different positions in the Z-axis direction via a single interlayer insulating film. The protective filmis an insulating film disposed over the interlayer insulating filmand the metal interconnects.

An example of the configuration of the bridge circuitwill be described. The bridge circuitis configured to detect a pressure received from the fluid, and output a pressure detection signal. The bridge circuitincludes a plurality of piezoresistors,,, and, a plurality of first metal interconnects,,, and, and a plurality of diffusion interconnects,,,,,,, and. When the piezoresistors,,, andare described without distinction, these are collectively referred to as “piezoresistors”. When the first metal interconnects,,, andare described without distinction, these are collectively referred to as “first metal interconnects”. When the diffusion interconnects,,,,,,, andare described without distinction, these are collectively referred to as “diffusion interconnects”.

The piezoresistorsare disposed in the diaphragmof the semiconductor substrate. The piezoresistorscorrespond to an impurity diffusion region of a conductive type different from that of the active layer. For example, when the active layeris formed of an n-type semiconductor, the piezoresistorscorrespond to a p-type impurity diffusion region. When the diaphragmis deflected by receiving a pressure from a fluid, the piezoresistorsare distorted. This causes a change in the electrical resistance of the piezoresistors. The change in electrical resistance of the piezoresistors, induced by fluid pressure application, is output externally as a pressure detection signal.

In the example illustrated in, the piezoresistoris disposed at the outer end of the beam. The piezoresistoris disposed at the outer end of the beam. The piezoresistoris disposed at the outer end of the beam. The piezoresistoris disposed at the outer end of the beam. That is, the different piezoresistorsare disposed at the outer ends of the different beams. This can improve pressure detection sensitivity of the bridge circuit, and can widen a detection range until saturation of the pressure detection signal output from the bridge circuit. That is, it is possible to improve the pressure detection accuracy of the bridge circuit.

The first metal interconnectsconnect adjacent piezoresistorsof the piezoresistors. The first metal interconnectsare disposed at positions that are apart from each other. For example, the first metal interconnectconnects the piezoresistorto the piezoresistor. The first metal interconnectconnects the piezoresistorto the piezoresistor. The first metal interconnectconnects the piezoresistorto the piezoresistor. The first metal interconnectconnects the piezoresistorto the piezoresistor

The first metal interconnectsare disposed in the frame. The first metal interconnectsare, for example, aluminum (Al) interconnects. However, the material forming the first metal interconnectsmay be a metal material different from Al. In the present specification, the metal encompasses alloys, and the metal material encompasses alloy materials. Hereinafter, the same applies to references to “metal” or “metal material”. The first metal interconnectsmay include semiconductor materials (e.g., diffusion interconnects) in localized regions, meaning neither individual interconnects nor the entire set requires complete metallic composition. Similarly, the other metal interconnects, such as the second metal interconnects, the third metal interconnects, the fourth metal interconnects, the fifth metal interconnects, the sixth metal interconnects, and the like, may include a semiconductor material, such as a diffusion interconnect or the like, in a part of any of the other metal interconnects.

The width of the first metal interconnectsis preferably larger than the width of the other metal interconnects, such as the second metal interconnects, the third metal interconnects, the fourth metal interconnects, the fifth metal interconnects, the sixth metal interconnects, and the like. By increasing the width of the first metal interconnectscompared to the width of the other metal interconnects, it is possible to reduce an influence of the interconnect resistance of the first metal interconnectson pressure detection signalsS. This can improve the pressure detection accuracy.

Inand some other drawings, the first metal interconnectsare drawn as a substantially belt-like region defined by one pair of inner and outer lines that face each other and extend in parallel. On the other hand, the separately described second metal interconnects, third metal interconnects, fourth metal interconnects, fifth metal interconnects, sixth metal interconnects, and the like are drawn with just a single line. This is for the sake of convenience of description. The actual width of each metal interconnect is not defined by the width of the line corresponding to each metal interconnect illustrated inand some other drawings.

The diffusion interconnectsare disposed at positions that are apart from each other. The diffusion interconnectsare disposed between the piezoresistorsand the first metal interconnects. For example, the diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect. The diffusion interconnectis disposed between the piezoresistorand the first metal interconnect

The diffusion interconnectsextend outward from the piezoresistorsin a plan view. The diffusion interconnectsare disposed in the frameof the semiconductor substrate. However, at least a part of the diffusion interconnectsmay be disposed in the diaphragm.

As illustrated in, the diffusion interconnectscorrespond to an impurity diffusion region of a conductive type different from that of the active layercorresponding to the diaphragm. For example, when the active layeris formed of an n-type semiconductor, the diffusion interconnectscorrespond to a p-type impurity diffusion region. The impurity concentration of the diffusion interconnectsis higher than the impurity concentration of the piezoresistors. The diffusion interconnectshave a higher conductivity than the conductivity of the piezoresistors. The diffusion interconnectsare continuous with the piezoresistors. The diffusion interconnectsmay be connected to the first metal interconnectsvia a conductor, such as a contact plug or the like.

As illustrated in, the width of the diffusion interconnectsincreases from the end on the piezoresistorside toward the end on the first metal interconnectside. This enables connection of the diffusion interconnectsto the smaller piezoresistors, and reduction in electrical resistance of the diffusion interconnects. As a result, a signal indicating a change in the electrical resistance of the piezoresistorsby application of a pressure from a fluid can be stably transmitted to the first metal interconnects. That is, the pressure detection accuracy of the bridge circuitcan be improved.

The piezoresistorsare bridge-connected via the first metal interconnectsand the diffusion interconnects. This arrangement constitutes a Wheatstone bridge circuit configured to detect the pressure of a fluid. In other words, the bridge circuitincludes a Wheatstone bridge circuit formed of the piezoresistors, the first metal interconnects, and the diffusion interconnects.

An example of the configuration of the amplifierwill be described. The amplifieris configured to amplify the pressure detection signalsS output from the bridge circuit. The amplified pressure detection signalsS are an example of an “amplified signal”. Here, the pressure detection signalsS include: a first voltage signalScorresponding to a first voltage between the piezoresistorand the piezoresistorin the bridge circuit; and a second voltage signalScorresponding to a second voltage between the piezoresistorand the piezoresistorin the bridge circuit.

The first voltage corresponds to a voltage value between the power supply potential and the first reference potential, obtained by voltage division using a value (resistance value) of the electrical resistance of the piezoresistorand a resistance value of the piezoresistor. The second voltage corresponds to a voltage value between the power supply potential and the first reference potential, obtained by voltage division using a resistance value of the piezoresistorand a resistance value of the piezoresistor. The first voltage signalSand the second voltage signalSare amplified by the amplifier, and then output to the metervia the first output terminaland the second output terminal, which will be described below. The metercalculates a difference between the first voltage and the second voltage, and calculates a pressure corresponding to the calculated difference.

The amplifierincludes a first amplification circuitand a second amplification circuitconfigured to amplify the first voltage signalSand the second voltage signalS, respectively. The first amplification circuitand the second amplification circuitare connected via a metal interconnect. In the example illustrated in, the amplifieris disposed along the −Y-side peripheral region of the outer peripheryof the frame. However, the position of the amplifieris not limited to this.

The first amplification circuitamplifies the first voltage signalS. The first amplification circuitoutputs a signal corresponding to the amplified first voltage signalStoward the first output terminal. The second amplification circuitamplifies the second voltage signalS. The second amplification circuitoutputs a signal corresponding to the amplified second voltage signalStoward the second output terminal.

The first amplification circuitand the second amplification circuiteach include, for example, an operational amplifier, and resistance elements connected to the operational amplifier, such as an input resistor, a feedback resistor, and the like. The first amplification circuitand the second amplification circuitmay each further include, for example, other circuit elements, such as a capacitor and the like.

For transmitting, to the first amplification circuit, the first voltage signalSoutput from the bridge circuit, the first metal interconnectand the first amplification circuitare connected via the third metal interconnect. The first amplification circuitand the first output terminalare connected via the fourth metal interconnect. Thus, the first voltage signalSoutput from the bridge circuitis output to the metervia the third metal interconnect, the first amplification circuit, the fourth metal interconnect, and the first output terminal. In, a portion of the fourth metal interconnectoverlapping with other metal interconnects in a plan view is indicated by a dashed line. However, this is for the sake of convenience of describing that the fourth metal interconnectis not structurally connected to other metal interconnects overlapping with the fourth metal interconnectin a plan view. For example, a dashed-line portion of the fourth metal interconnectillustrated inmay be a diffusion interconnect, and a solid-line portion and the dashed line portion may be continuous with each other by this diffusion interconnect.

For transmitting, to the second amplification circuit, the second voltage signalSoutput from the bridge circuit, the first metal interconnectand the second amplification circuitare connected via the third metal interconnect. The second amplification circuitand the second output terminalare connected via the fourth metal interconnect. Thus, the second voltage signalSoutput from the bridge circuitis output to the metervia the third metal interconnect, the second amplification circuit, the fourth metal interconnect, and the second output terminal. In, a portion of the fourth metal interconnectoverlapping with other metal interconnects in a plan view is indicated by a dashed line. However, this is for the sake of convenience of describing that the fourth metal interconnectis not structurally connected to other metal interconnects overlapping with the fourth metal interconnectin a plan view. For example, a dashed-line portion of the fourth metal interconnectillustrated inmay be a diffusion interconnect, and a solid-line portion and the dashed line portion may be continuous with each other by this diffusion interconnect.

An example of the configuration of the power supply potential terminalwill be described. The power supply potential terminalis connected to an external power supply circuit. A power supply potential from the external power supply circuit is supplied to the bridge circuitvia the power supply potential terminal.

The power supply potential terminalis, for example, a VDD terminal. The power supply potential terminalis connected to the first metal interconnectof the bridge circuitvia the second metal interconnect. That is, a power supply potential from the power supply potential terminalis supplied to the piezoresistorvia the second metal interconnect, the first metal interconnect, and the diffusion interconnect. Also, a power supply potential from the power supply potential terminalis supplied to the piezoresistorvia the second metal interconnect, the first metal interconnect, and the diffusion interconnect

The power supply potential terminalis a conductor pattern formed of a metal material, such as Al or the like. In the example illustrated in, the power supply potential terminalis disposed near the +Y-side end of the outer peripheryof the frame. However, the power supply potential terminalmay be disposed near any other end of the outer peripheryof the frame.

The power supply potential from the power supply potential terminalmay be supplied to the amplifier. In the example illustrated in, the power supply potential terminaland the first amplification circuitare connected via the sixth metal interconnect. Here, the power supply potential terminaland the first amplification circuitare disposed near opposing ends of the frame. Therefore, the sixth metal interconnectincludes, for example, an interconnecting region along the vicinity of the −X-side end of the outer peripheryof the frame, so as to connect the power supply potential terminaland the first amplification circuit, which are disposed at distant positions. That is, as illustrated in, the interconnecting region occupying the majority of the sixth metal interconnectis disposed near the outer peripheryof the frame.