A method for fabricating semiconductor devices is disclosed. The method includes placing a substrate upon a substrate support and placing a target via a target holder, such that an exposed surface of the target is facing the substrate. The method includes supplying plasma-forming gas via a gas source to the target, where the plasma-forming gas is configured to transition the target from a first phase to a second phase. The method includes determining, via a controller, a first value of a first compensation function according to a lifetime of the target, and a second value of a second compensation function according to the lifetime of the target, where the first value is different from the second value. The first portion of formed on the substrate is formed by depositing the target in the second phase based on the first value.
Legal claims defining the scope of protection, as filed with the USPTO.
. A method for fabricating semiconductor devices, comprising:
. The method of, wherein supplying the plasma-forming gas comprises flowing the plasma-forming gas a chamber to sputter the target, while depositing the first portion and the second portion, the chamber positioned adjacent to the target holder.
. The method of, wherein supplying plasma-forming gas comprises passing the plasma-forming gas through a shield positioned between to the gas source and the target holder, wherein the shield comprises a plurality of apertures configured to admit the plasma-forming gas from an exterior face of the shield into an interior face of the shield.
. The method of, wherein the gas source is configured to supply the plasma-forming gas to the target via a gas supply pipe.
. The method of, further comprising projecting a magnetic field parallel to the target via a magnet assembly, the magnet assembly comprising at least one magnet and configured to increase density of plasma.
. The method of, wherein the magnet assembly spins during deposition.
. The method of, wherein the first compensation function (Z) is represented as:
. The method of, wherein the second compensation function (Z) is represented as:
. The method of, wherein a first thickness of the first portion is determined based on a first thickness function (T):
. The method of, further comprising:
. The method of, further comprising performing a polishing process to remove the second portion of the film until the first portion of the film is exposed.
. A method for fabricating semiconductor devices, comprising:
. The method of, wherein the one or more sensors are configured to monitor a temperature of the substrate.
. The method of, wherein the first condition is a first substrate temperature and the second condition include a second substrate temperature, wherein the second substrate temperature is greater than the first substrate temperature.
. The method of, wherein the first compensation function (Z) is represented as:
. The method of, wherein the second compensation function (Z) is represented as:
. The method of, wherein a first thickness of the first portion is determined based on a first thickness function (T):
. A method for constructing a system for fabricating semiconductor devices, comprising:
. The method of, further comprising:
. The method of, further comprising:
Complete technical specification and implementation details from the patent document.
This application is a continuation of U.S. application Ser. No. 18/326,256, filed May 31, 2023, which claims priority to and the benefit of U.S. Provisional Application No. 63/484,100, filed Feb. 9, 2023, the disclosures of each of which are incorporated herein by reference in their entireties for all purposes.
The semiconductor industry has experienced rapid growth due to ongoing improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, improvement in integration density has resulted from iterative reduction of minimum feature size, which allows more components to be integrated into a given area.
While some integrated device manufacturers (IDMs) design and manufacture integrated circuits (IC) themselves, fabless semiconductor companies outsource semiconductor fabrication to semiconductor fabrication plants or foundries. Semiconductor fabrication consists of a series of processes in which a device structure is manufactured by applying a series of layers onto a substrate. This involves the deposition and removal of various thin film layers. The areas of the thin film that are to be deposited or removed are controlled through photolithography. Each deposition and removal process is generally followed by cleaning as well as inspection steps. Therefore, both IDMs and foundries rely on numerous semiconductor equipment and semiconductor fabrication materials, often provided by vendors. There is always a need for customizing or improving those semiconductor equipment and semiconductor fabrication materials, which results in more flexibility, reliability, and cost-effectiveness.
The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over, or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” “top,” “bottom” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
Physical vapor deposition (PVD) is a common process for depositing a film of material on a substrate and is commonly used in semiconductor fabrication. The PVD process is carried out at a high vacuum in a chamber containing a substrate (e.g., a wafer) and a solid source or slab of the material (i.e., a “PVD target” or a “target”) to be deposited on the substrate. In the PVD process, the PVD target is physically converted from a solid (phase) into a vapor (phase). The vapor of the target material is transported from the PVD target to the substrate, where it is condensed on the substrate as a film (again in the solid phase).
There are many methods for accomplishing PVD, including evaporation, e-beam evaporation, plasma spray deposition, and sputtering. Among those methods, in general, sputtering is the most frequently used method for accomplishing PVD. During sputtering, gas plasma is created in the chamber and directed to the PVD target. The plasma physically dislodges or erodes (sputters) atoms or molecules from the reaction surface of the PVD target into a vapor of the target material, as a result of a collision with high-energy particles (ions) of the plasma. The vapor of sputtered atoms or molecules of the target material is transported to the substrate through a region of reduced pressure and condenses on the substrate, forming the film of the target material.
In general, while using the existing PVD systems to form a film, only a total thickness of the film is examined as a figure of merit (FOM) for determining a quality of the film, regardless of how many portions the film has. This may lead to a poor quality of the formed film. For example, when a film formed by the existing PVD system includes two portions, even though the first formed portion is formed thinner, the second formed portion can be formed thicker to compensate the “thinned” first thickness. However, the second portion, which is commonly formed with a higher substrate temperature (a real temperature measured from the substrate), may have a substantially larger grain size than the first portion, which is commonly formed with a lower substrate temperature. Such a larger grain size may potentially form one or more defects, which can disadvantageously deteriorate the quality of the film. Further, with such a thicker second (upper) portion overlaying a thinner (lower) portion, even applying a polishing process after the PVD process, the second portion may remain, leaving the defects still present on a top surface of the formed film. Thus, the existing PVD systems and/or methods for operating the same have not been entirely satisfactory in certain aspects.
Some embodiments of the present disclosure are described as follows. Additional operations can be provided before, during, and/or after the stages described in these embodiments. Some of the stages that are described can be replaced or eliminated for different embodiments. Some of the features described below can be replaced or eliminated and additional features can be added for different embodiments. Although some embodiments are discussed with operations performed in a particular order, these operations may be performed in another logical order.
The present disclosure provides various embodiments of a method for manufacturing semiconductor devices, in particular, a method for depositing a film including a first portion and a second portion using a physical vapor deposition (PVD) system. In various embodiments, the methods, as disclosed herein, can individually control a first thickness of the first portion and a second thickness of the second portion. For example, the first thickness is controlled based on a first compensation function of a target lifetime and the second thickness is controlled based on a second compensation function of the target lifetime (independent from the first compensation function). The first compensation function and second compensation function can be empirically determined through a substantial large number of lifetime values, respectively, which allows the first thickness and the second thickness each to remain substantially constant over a wide range of the lifetime values. As such, regardless of how much the lifetime of a target is, the first thickness and the second thickness can be accurately controlled. Further, by accurately controlling the first thickness and the second thickness, a subsequent polishing process can also be accurately controlled to expose the first portion, which typically has a smaller grain size. In this way, a film formed by the disclosed method can have a significantly lower amount of defects, when compared to a film formed by other PVD systems that are not operated by the disclosed method.
is a schematic view of a PVD system, in accordance with some embodiments of the present disclosure. The PVD systemcan be configured to form (e.g., deposit) one or more materials (e.g., as a film) onto a substrate. An example material includes a metallic material such as, for example, titanium, titanium nitride, tantalum, tantalum nitride, aluminum, titanium aluminide (gamma titanium). Other example materials include carbides, silicides, and borides for certain applications. According to various embodiments of the present disclosure, the formed film can include two or more portions, each of which has a thickness that can be individually controlled. Alternatively stated, none of the portions of the film needs to compensate for an unintentionally compromised (e.g., thinned) thickness of any other portion of the film.
As shown, a substrate, onto which a filmis formed, is placed on a substrate supportof a chamber body. During the PVD process, a PVD targetis bombarded by energetic ions, such as a plasma, causing material to be knocked off the target and deposited as the filmon the substrate. In some embodiments, the PVD systemmay be a magnetron PVD system, in which the chamber bodyencloses a processing region or a plasma zone. The substrate supporthas a substrate receiving surfaceA that receives and supports the substrateduring the PVD process, so that a surface of the substrateis opposite to a (e.g., front) surface of the PVD targetthat is exposed to the processing region. The substrate supportis electrically conductive and is coupled to ground (GND) so as to define an electrical field between the PVD targetand the substrate. In some embodiments, the substrate supportis composed of aluminum, stainless steel, or ceramic material. In some embodiments, the substrate supportis an electrostatic chuck that includes a dielectric material.
A shield, also referred to as a dark space shield, is positioned inside the PVD chamber bodyand proximate sidewallsof the PVD targetto protect inner surfaces of the chamber bodyand sidewall (i.e., target sidewall) of the PVD targetfrom unwanted deposition. The shieldcan be positioned very close to the target sidewallto minimize re-sputtered material from being deposited thereon. The shieldhas a plurality of apertures (not shown) defined therethrough for admitting a plasma-forming gas such as argon (Ar) from the exterior of the shieldinto its interior.
A power supplyis electrically coupled to a backing plateof the PVD target. The power supplyis configured to negatively bias the PVD targetwith respect to the chamber bodyto excite a plasma-forming gas, for example, argon, into a plasma. In some embodiments, the power supplyis a direct current (DC) power supply source. In other embodiments, the power supplyis a radio frequency (RF) power supply source.
A magnet assemblyis disposed above the PVD target. The magnet assemblyis configured to project a magnetic field parallel to a front surfaceA of the PVD targetto trap electrons, thereby increasing the density of the plasma and increasing the sputtering rate. In some embodiments, the magnet assemblyis configured to scan about the back of the PVD targetto improve the uniformity of deposition. In some embodiments, the magnet assemblyincludes a single magnet disposed above the PVD target(not shown). In some embodiments, the magnet assemblyincludes an array of magnets. In some embodiments and as shown in, the magnet assemblyincludes one or more magnetsdisposed above the PVD target. In some embodiments, the magnet(s)may spin during the deposition. In some embodiments, the magnet assemblyalso includes a side electromagnetaround the chamber body.
A gas sourceis in fluidic combination with the chamber bodyvia a gas supply pipe. The gas sourceis configured to supply a plasma-forming gas to the processing regionvia the gas supply pipe. The plasm-forming gas includes an inert gas and does not react with the materials in the PVD target. In some embodiments, the plasma-forming gas includes argon, xenon, neon, or helium, which is capable of energetically impinging upon and sputtering source material and the dopant from the PVD target. In some embodiments, the gas sourceis also configured to supply a reactive gas into the PVD system. The reactive gas includes one or more of an oxygen-containing gas, a nitrogen-containing gas, a methane-containing gas, that is capable of reacting with the sputtering source material in the PVD targetto form the filmon the substrate.
A vacuum deviceis in fluidic communication with the PVD systemvia an exhaust pipe. The vacuum deviceis used to create a vacuum environment in the PVD systemduring the PVD process. In some embodiments, the PVD systemhas a pressure in a range from about 1 mtorr to about 10 torr. The spent process gases and byproducts are exhausted from the PVD systemthrough the exhaust pipe.
According to various embodiments of the present disclosure, the PVD systemfurther includes or is operatively coupled to a controller. The controlleris configured to adjust a variety of parameters associated with the PVD processes for depositing the filmon the substrate. Although not illustrated, it should be appreciated that the controllercan be operatively coupled to each of the above-described components of the PVD system. By adjusting the parameters, a thickness of each of different portions of the deposited filmcan be individually controlled. For example, the controllercan individually configure, identify, or adjust a substrate temperature, a process time, a magnetic field, an operation voltage, etc., for the PVD process of each of the different portions. Further, the controllercan control the respective thicknesses of the different portions to be independent of a lifetime of the PVD target, by determining respectively different compensation functions.
illustrates an example block diagram of the controller, in accordance with some embodiments of the present disclosure. In brief overview, the controllercan include a process engine, a monitor engine, and a compensation engine. In some embodiments, the controllercan receive an integrated circuit (IC) designto operate the PVD systemto deposit a film on a substrate.
Each of the above-mentioned elements or components is implemented in hardware, or a combination of hardware and software, in one or more embodiments. For instance, each of these elements or components can include any application, program, library, script, task, service, process or any type and form of executable instructions executing on a computing device (e.g., work station, or server of a cloud computing platform). The hardware includes circuitry such as one or more processors in one or more embodiments.
An IC design can include a number of electronic components (e.g., semiconductor-based) built into an electrical network in a circuit representation. The electronic components can include circuit cells such as one or more types of logic gates (e.g., physical devices each implementing a Boolean function, or performing a logical operation on one or more binary inputs to produce a binary output), such as AND, OR, NOR, buffer, inverter, XOR, OR-AND-Invert gates. The electronic components can include logic circuits, logic gates or logic devices such as flip-flops, multiplexers, registers, arithmetic logic units (ALUs), and computer memory. The electronic components can include or incorporate the use of transistors, such as field-effect transistors (FETs).
As used herein, the IC designcan include at least one of a material or dimension of one or more conductive structures/features included in one of the electronic components or connecting the different electronic components. As a non-limiting example, the IC designmay specify the material and the thickness of a seed layer for an interconnect structure connecting multiple electronic components. In another non-limiting example, the IC designmay specify the material and the thickness of a bonding pad connecting multiple semiconductor dies. In yet another non-limiting example, the IC designmay specify the material and the thickness of a liner for an interconnect structure connecting multiple electronic components. In yet another non-limiting example, the IC designmay specify the material and the thickness of a barrier layer for an interconnect structure connecting multiple electronic components.
Upon receiving the IC design(which may specify, e.g., the thickness of a film), the controllercan configure various first process parameters for a first PVD process to form a first portion of the film, and various second process parameters for a second PVD process to form a second portion of the film. The second portion is formed over the first portion. The second portion may be later polished out (i.e., exposing a surface of the first portion), in some embodiments. For example, in response to identifying the total thickness of a film, the process enginecan determine a process (or chamber) temperature for both the first PVD process and second PVD process, and determine process times, magnetic fields (e.g., provided by the magnet assembly), and operation voltages (e.g., provided by the power supply) for the first PVD process and second PVD process, respectively. Such initial parameters can be utilized to determine a first target thickness of the first portion and a second target thickness of the second portion, respectively. In some embodiments, a first formed thickness of the first portion can be controlled to be about equal to or slightly thicker than the total thickness of the film. As such, the second portion may serve as a buffer layer for the later performed polishing process.
Further, the monitor enginecan monitor various real-time process conditions of the PVD system, report back to the process engine, and cause the first PVD process and the second PVD process to be initiated accordingly. For example, the monitor enginecan operatively communicate with one or more sensors (or otherwise detectors) placed in the chamber bodythat are configured to measure a real-time temperature of the substrate(substrate temperature). Such sensors are not shown for clarity purposes, and further, one or more of such sensors can be configured to measure other real-time conditions associated with the PVD process occurred in the PVD system, for example, a formed thickness of each portion of the film, a pressure inside the chamber, etc. Once the monitor engineidentifies that the substrate temperature satisfies a first condition, the process enginemay initiate the first PVD process (using the above-described first process parameters); and once the monitor engineidentifies that the substrate temperature satisfies a second condition, the process enginemay initiate the second PVD process (using the above-described second process parameters).
For example, the controllermay initiate the first PVD process upon identifying the substrate temperature satisfies a first condition (e.g., reaching about 200° C.). Following the first PVD process, the controllermay initiate the second PVD process upon identifying the substrate temperature satisfies a second condition (e.g., reaching about 250° C.). Accordingly, the first PVD process and second PVD process are sometimes referred to as “cold deposition” and “hot deposition,” respectively. Generally, the cold deposition can form the film (e.g., an aluminum film) in a smaller grain size (e.g., about 0.8˜1 μm), while the hot deposition tends to form the film in a bigger grain size (e.g., about 1˜1.2 μm). For certain applications, the grain with a size greater than 1 μm may be selected as a defect. In some embodiments, the first PVD process and second PVD process may be performed continuously (i.e., without a time gap configured between the first and second PVD processes). In some other embodiments, the first PVD process and second PVD process may be performed separately (i.e., with a time gap configured between the first and second PVD processes).
Still further, the monitor enginecan monitor a (service) lifetime of the PVD target, report back to the compensation engine, and cause the first PVD process and the second PVD process to be adjusted accordingly. The lifetime can be determined by tracking an accumulated amount of energy, e.g., the number of kilowatt-hours (kw-hrs), consumed by the PVD system. In some embodiments, once a value of the lifetime is determined, the compensation enginecan determine a first compensation value and a second compensation value for the first PVD process and second PVD process, respectively. The first compensation value is determined according to a first compensation function of the lifetime, and the second compensation value is determined according to a second compensation function of the lifetime. The compensation enginecan thus determine a first formed thickness of the first portion according to a first thickness function that is derived based on the first compensation value and the first target thickness, and a second formed thickness of the second portion according to a second thickness function that is derived based on the second compensation value and the second target thickness. Accordingly, the process enginecan adjust one or more of the first process parameters for the first PVD process based on the determined first formed thickness, and adjust one or more of the second process parameters for the second PVD process based on the determined second formed thickness.
In various embodiments, the compensation enginecan determine the first compensation function (Z) and the second compensation function (Z), which are expressed as follows:
The compensation enginecan determine the parameters (a, b, c) and (d, e, f) for the first compensation function and second compensation function, respectively, based on a plural number of empirical data points associated with the PVD system. For example in, a plotof a plural number of values of previous first formed thickness (through the first PVD process) versus a plural number of values of the lifetime over time is provided (e.g., by the monitor engine); and in, a plotof a plural number of values of previous second formed thickness (through the second PVD process) versus a plural number of values of the lifetime over time is provided (e.g., by the monitor engine). The plotshows that the previous first formed thickness decreases with the increasing lifetime; and the plotshows that the previous second formed thickness increases with the increasing lifetime.
Next, the compensation enginecan calculate a difference (or delta) between the first target thickness () and each of the plural first formed thicknesses, and derive a plotof the plural differences versus the plural lifetimes, as shown in; and calculate a difference (or delta) between the second target thickness () and each of the plural second formed thicknesses, and derive a plotof the plural differences versus the plural lifetimes, as shown in. The compensation enginecan determine respective values of the parameters a, b, and c to fit the plotby any of various fitting techniques; and determine respective values of the parameters d, e, and f to fit the plotby any of various fitting techniques.
After determining the values of the parameters a, b, c, d, e, and f, the compensation enginecan estimate a first formed (or compensated) thickness of the first portion to be formed by the first PVD process and a second formed (or compensated) thickness of the second portion to be formed by the second PVD process, according to the first thickness function (T) and the second thickness function (T), respectively. The first thickness function (T) and the second thickness function (T) are expressed as follows:
Upon the compensation engineestimating the first formed thickness and the second formed thickness, the process enginecan adjust one or more of the first initial process parameters (for the first PVD process), and adjust one or more of the second initial process parameters (for the second PVD process), in accordance with various embodiments of the present disclosure. For example, prior to, concurrently with, or subsequently to the first PVD process being initiated, the process enginemay shorten the process time, decrease the magnetic field, and/or decrease the operation voltage of the first PVD process initially set up according to the IC design, in response to the monitor engineidentifying that an actual formed thickness of the first portion of the film has reached the estimated first formed thickness. The second PVD process can thus be initiated earlier. In another example, prior to, concurrently with, or subsequently to the first PVD process being initiated, the process enginemay lengthen the process time, increase the magnetic field, and/or increase the operation voltage of the first PVD process initially set up according to the IC design, in response to the monitor engineidentifying that an actual formed thickness of the first portion of the film has not reached the estimated first formed thickness. The second PVD process may thus be pushed back.
illustrates a flow chart of an example methodto operate a PVD system, in accordance with various embodiments of the present disclosure. The methodmay be used to operate the disclosed PVD system(), and thus, the following discussion of the methodwill sometimes refer to the components discussed in. It is noted that the methodis merely an example and is not intended to limit the present disclosure. Accordingly, it is understood that additional operations may be provided before, during, and after the methodof, and that some other operations may only be briefly described herein.
In brief overview, at least some of the operations described in the methodcan form a film including two or more portions, and a thickness of each of the portions can be individually controlled. Further, the thickness of each of the portions can be controlled to be independent of the lifetime of a corresponding PVD target based on a respective compensation value. Such compensation values are determined according to respectively different compensation functions of the lifetime of the PVD target.
The methodstarts with operationin which a target is introduced in a chamber of a PVD system, in accordance with various embodiments. For example in, prior to performing any PVD process, the targetis introduced in the chamberof the PVD system. The targetmay be composed of any suitable and appropriate source material including, for example, nickel (Ni), nickel platinum (Ni Pt) alloys, nickel titanium (Ni Ti) alloys, cobalt (Co), aluminum (Al), copper (Cu), titanium (Ti), tantalum (Ta), tungsten (W), indium tin oxide (ITO), zinc sulfide-silicon dioxide (ZnS′SiO), gold (Au), silver (Ag), and other noble metals. In general, the targetis placed with a top surface (e.g.,A) facing a substrate (e.g.,) onto which a film (e.g.,) is to be deposited.
The methodproceeds to operationin which a lifetime of the target is identified, in accordance with various embodiments. In some embodiments, the controller(or its monitor engine) can identify the lifetime of the target. For example, the controllercan track an accumulated amount of energy, e.g., the number of kilowatt-hours (kw-hrs), consumed by the PVD system. In another example, the controllercan operatively communicate with (or monitor) a plurality of filaments suspended in respective tubes, so as to identify the lifetime of the target. The plural tubes, formed of the same material as the target, may be placed at different heights of the target. For example, a first one of the tubes may be placed around the top surfaceA and a last one of the tubes may be placed around a bottom surface of the target(i.e., the surface opposite to the top surfaceA), with one or more other tubes placed between the first and last tubes. The electrical resistance or impedance of each of the filaments may be monitored by the controllerto identify the lifetime of the target
Specifically, at the beginning of the target's lifetime, the electrical resistance or impedance of the filament in first tube (hereinafter “first filament”) may be measured at some initial value. As the targeterodes during the PVD process(es), the electrical resistance or impedance of the first filament may remain at the initial value until the first tube is breached to expose the first filament suspended in the first tube to the PVD process, thus allowing the plasma (in the case of sputtering) to contact and erode the first filament. When this occurs, the electrical resistance or impedance may change (e.g., decrease) from the initial value, thereby indicating that the lifetime of the targethas changed by a (e.g., discrete) level. Following the same principle, the lifetime of the targetmay be “updated” once a next filament is exposed (and eroded).
The operationproceeds to operationin which a first compensation value is determined for a first PVD process, in accordance with various embodiments. In some embodiments, the controller(or its compensation engine) can determine a first compensation value according to a first compensation function (e.g., Z). The controllercan determine the first compensation function based on fitting a number of empirical data points, e.g., a number of first formed thicknesses versus respective lifetimes. In some embodiments, the first compensation function may be a quadratic equation, with the lifetime as an unknown parameter. However, it should be understood that the first compensation function can be an equation with any of various other degree, while remaining within the scope of the present disclosure. The controllercan determine the first compensation value by inputting a currently monitored lifetime of the target into the first compensation function.
The operationproceeds to operationin which a second compensation value is determined for a second PVD process, in accordance with various embodiments. In some embodiments, the controller(or its compensation engine) can determine a second compensation value according to a second compensation function (e.g., Z). The controllercan determine the second compensation function based on fitting a number of empirical data points, e.g., a number of second formed thicknesses versus respective lifetimes. In some embodiments, the second compensation function may be a quadratic equation, with the lifetime as an unknown parameter. However, it should be understood that the second compensation function can be an equation with any of various other degree, while remaining within the scope of the present disclosure. The controllercan determine the second compensation value by inputting a currently monitored lifetime of the target into the second compensation function.
The operationproceeds to operationin which a first portion of a film is deposited based on the first compensation value, in accordance with various embodiments. Continuing with the above example, upon determining the first compensation value, the controllercan estimate a first thickness of the first portion (to be formed by the first PVD process) based on a first thickness equation (e.g., T). Prior to, concurrently with, or subsequently to estimating the first thickness, the controllercan adjust or otherwise configure a plural number of first process parameters (e.g., a process time, an operation voltage, a magnetic field, etc.) associated with the first PVD process. After configuring the first process parameters, the controllercan apply such parameters to the PVD systemfor forming the first portion over a substrate. The first portion is formed by physically converting the PVD target from a solid (phase) into a vapor (phase). The vapor of the target material is transported from the PVD target to the substrate, where it is condensed on the substrate as the first portion (again in the solid phase).illustrates a cross-sectional view of a portion of an example semiconductor device having a substrateoverlaid by a first portionof a film. In some embodiments, the first PVD process is performed at a lower substrate temperature (when compared to the later second PVD process), and thus, the first portioncan have a smaller grain size (when compared to the later formed second portion).
The operationproceeds to operationin which a second portion of the film is deposited based on the second compensation value, in accordance with various embodiments. Continuing with the above example, upon determining the second compensation value, the controllercan estimate a second thickness of the second portion (to be formed by the second PVD process) based on a second thickness equation (e.g., T). Prior to, concurrently with, or subsequently to estimating the second thickness, the controllercan adjust or otherwise configure a plural number of second process parameters (e.g., a process time, an operation voltage, a magnetic field, etc.) associated with the second PVD process. After configuring the second process parameters, the controllercan apply such parameters to the PVD systemfor forming the second portion over the first portion. The second portion is formed by physically converting the PVD target from a solid (phase) into a vapor (phase). The vapor of the target material is transported from the PVD target to the first portion, where it is condensed on the first portion as the second portion (again in the solid phase).illustrates a cross-sectional view of the portion of the example semiconductor device having the first portionoverlaid by a second portionof the film.
Although not illustrated in the method, the methodmay include one or more following polishing processes. In such embodiments, the second portion(with the larger grain size) may serve as a buffer layer for the polishing process. Stated another way, with the first portionformed with a thickness about equal to or slightly greater than a target thickness of the final film, the second portioncan be polished out so as to expose the underlying first portion (with the smaller grain size).
In one aspect of the present disclosure, a method for fabricating semiconductor devices is disclosed. The method includes introducing a target in a chamber of a physical vapor deposition (PVD) system. The method includes depositing, on a substrate, a first portion of a film based on a first compensation function, a first value of the first compensation function being determined according to a lifetime of the target. The method includes depositing, on the first portion of the film, a second portion of the film based on a second compensation function, a second value of the second compensation function being determined according to the lifetime of the target. The first value is different from the second value.
In another aspect of the present disclosure, a method for fabricating semiconductor devices is disclosed. The method includes introducing a target in a chamber of a deposition system. The method includes identifying a lifetime of the target. The method includes determining a first value of a first compensation function based on the identified lifetime. The method includes determining a second value of a second compensation function based on the identified lifetime. The method includes transitioning, according to the first value, the target from a first phase to a second phase to deposit a first portion of a film on a substrate. The method includes transitioning, according to the second value, the target from the first phase to the second phase to deposit a second portion of the film on its first portion.
In yet another aspect of the present disclosure, an apparatus for fabricating semiconductor devices is disclosed. The apparatus includes a substrate support configured to place a substrate. The apparatus includes a target holder configured to place a target, with an exposed surface of the target facing the substrate. The apparatus includes a gas source configured to supply a plasma-forming gas, the plasma-forming gas is configured to transition the target from a first phase to a second phase. The apparatus includes a controller configured to determine a first value of a first compensation function according to a lifetime of the target, and a second value of a second compensation function according to the lifetime of the target. A first portion of a film formed on the substrate is formed by depositing the target in the second phase based on the first value, and a second portion of the film formed on the first portion is formed by depositing the target in the second phase based on the second value.
As used herein, the terms “about” and “approximately” generally mean plus or minus 10% of the stated value. For example, about 0.5 would include 0.45 and 0.55, about 10 would include 9 to 11, about 1000 would include 900 to 1100.
The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.
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November 27, 2025
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