Semiconductor Device

NO. 2021-065973 filed in JP on Apr. 8, 2021 This application is a continuation of U.S. patent application Ser. No. 17/680,270, filed on Feb. 24, 2022, the entire contents of which are explicitly incorporated herein by reference. The application also claims priority from the following Japanese patent application, the entire contents of which are also explicitly incorporated herein by reference:

The present invention relates to a semiconductor device.

Patent Document 1: Japanese Patent Application Publication No. 2017-103400 Patent Document 2: Japanese Patent Application Publication No. 2015-207736 Conventionally, semiconductor devices such as insulated gate bipolar transistors (IGBTs) are known (see, for example, Patent Documents 1 and 2).

Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the scope of the claims. In addition, not all combinations of features described in the embodiments are essential to the solution of the invention.

As used herein, one side in a direction parallel to a depth direction of a semiconductor substrate is referred to as “front” or “upper” and the other side is referred to as “back” or “lower”. One surface of two principal surfaces of a substrate, a layer or other member is referred to as an upper surface, and the other surface is referred to as a lower surface. “Front”, “upper”, “back”, and “lower” directions are not limited to a direction of gravity, or directions in which a semiconductor device is mounted.

In the present specification, technical matters may be described using orthogonal coordinate axes of an X axis, a Y axis, and a Z axis. The orthogonal coordinate axes merely specify relative positions of components, and do not limit a specific direction. For example, the Z axis is not limited to indicate the height direction with respect to the ground. Note that a +Z axis direction and a −Z axis direction are directions opposite to each other. When the Z axis direction is described without describing the signs, it means that the direction is parallel to the +Z axis and the −Z axis. In addition, in the present specification, viewing from the +Z axis direction may be referred to as a top view.

In the present specification, a case where a term such as “same” or “equal” is mentioned may include a case where an error due to a variation in manufacturing or the like is included. The error is, for example, within 10%.

In the present specification, a conductivity type of doping region where doping has been carried out with an impurity is described as a P type or an N type. However, the conductivity type of each doping region may have opposite polarities. In addition, in the present specification, a description of a P+ type or an N+ type means a higher doping concentration than that of the P type or the N type, and a description of a P-type or an N-type means a lower doping concentration than that of the P type or the N type.

In the present specification, the doping concentration refers to the concentration of the donor or acceptor dopant. In the present specification, the concentration difference between the donor and the acceptor may be set as the higher concentration of the donor or the acceptor. The concentration difference can be measured by capacitance-voltage profiling (CV profiling). In addition, the carrier concentration measured by spreading resistance profiling method (SRP) may be set as the donor or acceptor concentration. In addition, in a case where the concentration distribution of the donor or acceptor has a peak, the peak value may be set as the concentration of the donor or acceptor in the region. In a case where the concentration of the donor or acceptor in the region where the donor or acceptor is present is substantially uniform or the like, the average value of the donor concentration or acceptor concentration in the region may be set as the donor concentration or acceptor concentration.

1 FIG. 100 100 10 50 172 178 174 176 178 210 220 172 174 176 210 220 illustrates an example of arrangement of each component in the front surface of a semiconductor deviceaccording to the example embodiment 1. The semiconductor deviceincludes a semiconductor substrate, a gate pad, a current sense pad, a temperature sense portion, an anode padand a cathode padelectrically connected to the temperature sense portion, a bidirectional diode portion, and an output comparison diode portion. The region provided with the current sense pad, the anode pad, the cathode pad, the bidirectional diode portion, and the output comparison diode portionmay be collectively referred to as a pad region.

10 102 102 1 10 102 1 178 10 1 FIG. The semiconductor substratehas an end side. In the present specification, the direction of one end side-of the semiconductor substratein a top view ofis set as the X axis, and the direction perpendicular to the X axis is set as the Y axis. In the present example, the X axis is taken in the direction of the end side-. In addition, a direction that is perpendicular to the X axis direction and the Y axis direction and forms a right-handed system is referred to as the Z axis direction. The temperature sense portionof the present example is provided in the +Z axis direction of the semiconductor substrate.

10 10 178 10 10 The semiconductor substrateis provided with a semiconductor material such as silicon or a compound semiconductor. In the semiconductor substrate, the side in which the temperature sense portionis provided is referred to as a front surface, and the surface on the opposite side is referred to as a back surface. In the present specification, a direction connecting the front surface and the back surface of the semiconductor substrateis referred to as a depth direction. The semiconductor substrateof the present example has an approximately rectangular shape on the front surface, but may have a different shape.

10 120 120 10 100 44 120 50 The semiconductor substratehas an active portionin the front surface. The active portionis a region in which a main current flows in the depth direction between the front surface and the back surface of the semiconductor substratein a case where the semiconductor deviceis turned on. A gate conductive portiondescribed later of the active portionis electrically connected to the gate padby a gate runner portion described later.

120 120 1 120 2 120 3 120 4 120 5 120 6 120 1 120 3 120 4 90 120 2 120 5 120 6 90 120 1 120 2 120 3 52 120 4 120 5 120 6 52 The active portionmay be disposed by being divided into an active portion-, an active portion-, an active portion-, an active portion-, an active portion-, and an active portion-. In particular, the active portion-, the active portion-, and the active portion-may be separated in the X axis direction by a separation portion, and similarly, the active portion-, the active portion-, and the active portion-may be separated in the X axis direction by the separation portion. In the present example, the active portion-, the active portion-, and the active portion-disposed apart from each other in the X axis direction are electrically connected to each other by the emitter electrodedescribed later. Similarly, the active portion-, the active portion-, and the active portion-are also electrically connected to each other by the emitter electrodedescribed later.

120 70 120 80 120 70 80 120 70 80 The active portionmay be provided with a transistor portionincluding a transistor device such as an IGBT (insulated gate bipolar transistor). The active portionmay be provided with a diode portionincluding a diode device such as an FWD (freewheeling diode). In a case where the active portionis provided with an IGBT and an FWD, the transistor portionand the diode portionform an RC-IGBT (Reverse Conducting IGBT, reverse conduction type IGBT). The active portionmay be a region provided with at least one of the transistor portionand the diode portion.

120 70 80 70 80 120 In the present example, in the active portion, a symbol “I” is attached to the region where the transistor portionis disposed, and a symbol “F” is attached to the region where the diode portionis disposed. The transistor portionand the diode portionmay be disposed alternately in the X axis direction in each region of the active portion.

70 80 120 3 80 However, the arrangement of the transistor portionand the diode portionin the present example is an example, and may be different arrangements. In the active portion-, the diode portionmay be disposed on the negative side in the X axis direction.

100 130 120 120 The semiconductor devicehas a P+ type well regionin the front surface outside the active portion. Further outside, it has an edge termination structure portion. The edge termination structure portion has a structure of, for example, a guard ring, a field plate, a RESURF, and a combination thereof, which are provided to surround the active portionin an annular shape.

178 10 120 120 10 10 120 178 70 70 The temperature sense portionmay be disposed in a wide portion provided near the center of the front surface of the semiconductor substrate. The active portionis not provided in the wide portion. When the active portionof the semiconductor substrateis integrated, the central portion of the semiconductor substrateis easily heated by heat generated from a switching device formed in the active portion. By providing the temperature sense portionin the wide portion near the center, the temperature of the transistor portioncan be monitored. As a result, it is possible to prevent the transistor portionfrom being overheated beyond a junction temperature, which is a normal operating temperature range.

178 178 178 10 The temperature sense portionmay be provided by a temperature sense diode. As an example, the temperature sense portionis provided by a Schottky diode. In addition, the temperature sense portionmay be provided by a PN junction diode made of polycrystalline silicon, which is provided above the semiconductor substratevia a dielectric film.

180 182 180 182 180 182 An anode wiringand a cathode wiring, each of which is made of metal, are connected to the anode and the cathode of the temperature sense diode, respectively. The anode wiringand the cathode wiringare wirings containing metal such as aluminum. The anode wiringand the cathode wiringare examples of a temperature sense wiring.

176 178 182 174 178 180 176 174 176 174 The cathode padis connected to the temperature sense portionvia the cathode wiring. The anode padis connected to the temperature sense portionvia the anode wiring. The cathode padand the anode padare electrodes containing metal such as aluminum. The cathode padand the anode padare one example of the temperature sense pad.

172 110 172 110 70 120 70 70 110 70 The current sense padis electrically connected to a current sense portion. The current sense padis an example of a front surface electrode. The current sense portionhas the same structure as the transistor portionof the active portion, and simulates the operation of the transistor portion. A current proportional to the current flowing through the transistor portionflows through the current sense portion. As a result, the current flowing through the transistor portioncan be monitored.

110 12 70 110 110 110 Note that the current sense portionis not provided with an emitter regiondescribed later, unlike the transistor portion. As a result, the current sense portiondoes not operate as a transistor. The current sense portionis provided with a gate trench portion. The gate trench portion of the current sense portionis electrically connected to the gate runner portion.

210 174 176 100 210 174 176 210 178 The bidirectional diode portionis disposed between the anode padand the cathode padin the front surface of the semiconductor device. The bidirectional diode portionincludes a diode electrically connected in series bidirectionally between the anode padand the cathode pad. The bidirectional diode portionprevents the temperature sense portionfrom being damaged by electrostatic discharge (ESD).

220 174 176 220 174 176 220 178 The output comparison diode portionis provided between the anode padand the cathode pad. The output comparison diode portionis electrically connected to the anode padand the cathode pad. The output comparison diode portionincludes an output comparison diode having a direction of the PN junction connected in antiparallel with the PN junction of the temperature sense diode of the temperature sense portion.

220 178 100 220 220 178 The output comparison diode of the output comparison diode portionmay have the same design as the diode of the temperature sense portionexcept for the direction of the PN junction. During operation of the semiconductor device, no current is applied to the output comparison diode portion. An output comparison operation is performed at predetermined intervals. During the output comparison operation, a current is applied to the output comparison diode portion. By the output comparison operation, it is possible to grasp the replacement time of the temperature sense diode of the temperature sense portion.

220 220 178 178 A protection diode having the same forward direction as the output comparison diode portionmay be provided in parallel with the output comparison diode portion. In that case, the protection diode prevents the application of an overvoltage or the inflow of an overcurrent to the temperature sense portiondue to noise or the like during the operation of the temperature sense portion.

2 FIG. 100 50 44 70 120 44 44 70 70 illustrates an example of the arrangement of the gate runner portion in the front surface of the semiconductor device. The gate runner portion may be electrically connected to the gate pad. Further, the gate runner portion is connected to the gate conductive portiondescribed later of the transistor portiondisposed in the active portion, and the gate conductive portionis set to a gate potential. The gate conductive portioncorresponds to the gate electrode of the transistor portion. As a result, the transistor of the transistor portionis switched on.

48 120 148 120 48 The gate runner portion includes an outer peripheral gate runner portionthat extends the outer periphery of the active portionin an annular shape and an inner gate runner portionthat extends between the active portionsand is electrically connected to the outer peripheral gate runner portion.

The gate runner portion has at least one of a metal wiring and a polysilicon wiring provided below the metal wiring and electrically connected to the metal wiring. The metal wiring is formed by covering a conductive material such as aluminum or an aluminum-silicon alloy with a dielectric film such as polyimide, and the polysilicon wiring is formed by covering polysilicon with impurities added with a dielectric film such as polyimide.

48 47 46 148 146 10 2 FIG. In the present example, the outer peripheral gate runner portionhas a metal wiringand a polysilicon wiring, and the inner gate runner portionhas a polysilicon wiring. In, in the front surface of the semiconductor substrate, the position where the metal wiring is provided is indicated by a two-dot chain line, and the position where the polysilicon wiring is provided is indicated by a broken line. However, the positions of these wirings in the drawings are merely approximate positions so as not to be confused with other wirings. The detailed position of the gate runner portion will be described later.

130 120 48 120 148 48 178 10 120 1 120 2 The gate runner portion may be disposed above the well regionaround the active portion. The outer peripheral gate runner portionmay extend the outer periphery of the active portionin an annular shape. The inner gate runner portionmay be disposed together with the outer peripheral gate runner portionso as to surround the pad region, or may be disposed so as to surround the temperature sense portionin the wide portion near the center of the semiconductor substratewhich is sandwiched between the active portion-and the active portion-.

50 50 50 The gate padis electrically connected to an external control terminal. The gate padis provided by a metal conductor such as aluminum. The gate padmay be externally connected by wire bonding.

3 FIG. 52 100 52 52 is an example of the arrangement of the emitter electrodeprovided in the front surface of the semiconductor device. The emitter electrodeis provided by a metal conductor such as aluminum. The emitter electrodeis set to an emitter potential, which is a predetermined reference potential.

52 172 The emitter potential may be set to the ground potential. The emitter electrodeis also an example of a front surface electrode like the current sense pad.

52 52 203 120 52 90 120 1 120 3 120 4 52 120 2 120 5 120 6 52 The emitter electrodeis disposed in the region indicated by oblique lines. The emitter electrodehas a main metal portionprovided so as to cover the entire active portion. Further, the emitter electrodeis also provided in a region above the separation portionthat separates the active portion-, the active portion-, and the active portion-from each other in the X axis direction. These active portions are electrically connected to each other by the emitter electrode. Similarly, the active portion-, the active portion-, and the active portion-are also electrically connected to each other by the emitter electrode.

4 FIG. 4 FIG. 100 120 2 100 10 70 80 is an example of a top view of the semiconductor device.illustrates the vicinity of the end portion of the active portion-on the negative side in the Y axis direction. The semiconductor deviceincludes the semiconductor substratehaving the transistor portionincluding a transistor device such as an IGBT and the diode portionincluding a diode device such as a freewheeling diode (FWD).

100 40 30 130 12 14 15 10 40 30 The semiconductor deviceof the present example includes a gate trench portion, a dummy trench portion, a well region, an emitter region, a base region, and a contact regionprovided inside the front surface side of the semiconductor substrate. Each of the gate trench portionand the dummy trench portionis an example of a trench portion.

100 47 52 10 47 52 47 52 In addition, the semiconductor deviceof the present example includes the metal wiringand the emitter electrodeprovided above the front surface of the semiconductor substrate. The metal wiringand the emitter electrodeare provided separately from each other. The metal wiringand the emitter electrodeare electrically insulated from each other.

52 47 10 49 54 56 4 FIG. 4 FIG. An interlayer dielectric film is provided between the emitter electrodeand the metal wiring, and the front surface of the semiconductor substrate, but is omitted in. In the interlayer dielectric film of the present example, contact holes,, andare provided through the interlayer dielectric film. In, each contact hole is hatched with oblique lines.

52 40 30 130 12 14 15 52 12 14 15 10 54 The emitter electrodeis provided above the gate trench portion, the dummy trench portion, the well region, the emitter region, the base region, and the contact region. The emitter electrodeis electrically connected with the emitter region, the base region, and the contact regionin the front surface of the semiconductor substrateby the contact hole.

52 30 56 25 52 25 30 In addition, the emitter electrodeis connected to a dummy conductive portion in the dummy trench portionby the contact hole. A connection portionformed of a material having conductivity such as polysilicon doped with impurities may be provided between the emitter electrodeand the dummy conductive portion. The connection portionis provided in the front surface of the semiconductor substrate via a dielectric film such as an interlayer dielectric film and a dummy dielectric film of the dummy trench portion.

47 46 49 46 40 10 46 30 52 The metal wiringis electrically connected to the polysilicon wiringby the contact hole. The polysilicon wiringis connected to the gate conductive portion in the gate trench portionin the front surface of the semiconductor substrate. The polysilicon wiringis not electrically connected to the dummy conductive portion in the dummy trench portionand the emitter electrode.

46 52 46 49 40 40 10 46 The polysilicon wiringand the emitter electrodeare electrically separated by an insulating material such as an interlayer dielectric film and an oxide film. The polysilicon wiringof the present example is provided from below the contact holeto the edge portion (the end portion in the Y axis direction) of the gate trench portion. At the edge portion of the gate trench portion, the gate conductive portion is exposed to the front surface of the semiconductor substrateand is in connection with the polysilicon wiring.

52 The emitter electrodeis formed of a conductive material containing metal. For example, it is formed of aluminum or an aluminum-silicon alloy. Each electrode may have a barrier metal formed of titanium, a titanium compound, or the like in a lower layer of a region formed of aluminum or the like.

10 Each electrode may have a plug formed of tungsten or the like in the contact hole. The plug may have a barrier metal on the side in contact with the semiconductor substrate, may be embedded with tungsten so as to be in contact with the barrier metal, and may be formed of aluminum or the like on the tungsten.

15 14 15 15 15 Note that the plug is provided in the contact hole in contact with the contact regionor the base region. In addition, a P++ type plug region is formed below the contact hole of the plug so as to have a higher doping concentration than the contact region. This can improve the contact resistance between the barrier metal and the contact region. In addition, the depth of the plug region is about 0.1 μm or less, and has a region as small as 10% or less as the depth of the contact region.

70 80 By improving the contact resistance of the plug region, the latch-up withstand capability is improved in the operation of the transistor portion. On the other hand, in the operation of the diode portion, it is possible to suppress an increase in conduction loss and switching loss.

130 46 130 120 46 130 54 46 130 14 130 15 46 130 The well regionextends to the outside of the polysilicon wiringso as to overlap the outer peripheral region, and is provided in an annular shape in a top view. The well regionalso extends to the active portioninside the polysilicon wiringwith a predetermined width, and is provided in an annular shape in a top view. The well regionof the present example is provided in a range separated from the end portion of the contact holein the Y axis direction on the polysilicon wiringside. The well regionis a region of a second conductivity type having a higher doping concentration than the base region. The doping concentration of the well regionmay be the same as or lower than the doping concentration of the contact region. The polysilicon wiringis electrically insulated from the well region.

14 130 130 14 14 130 70 80 130 52 The base regionin the present example is a P-type, and the well regionis a P+ type. In addition, the well regionis formed from the front surface of the semiconductor substrate to a position deeper than the lower end of the base region. The base regionis provided in contact with the well regionin the transistor portionand the diode portion. The well regionis electrically connected to the emitter electrode.

70 80 70 40 30 80 30 Each of the transistor portionand the diode portionhas a plurality of trench portions arranged in the arrangement direction. In the transistor portionof the present example, one or more gate trench portionsand one or more dummy trench portionsare alternately provided along the arrangement direction. In the diode portionof the present example, a plurality of dummy trench portionsare provided along the arrangement direction.

40 39 41 39 In the present example, the arrangement direction of the trench portion is the X axis direction, and the extension direction perpendicular to the arrangement direction is the Y axis direction. The gate trench portionof the present example may have two extension portions(portions of the trenches which are straight along the extension direction) extending along the extension direction and a connection portionconnecting the two extension portions.

41 39 46 41 41 40 41 39 At least a part of the connection portionmay be provided in a curved shape in a top view. By connecting the end portions of the two extension portionsin the Y axis direction to the polysilicon wiringby the connection portion, the connection portionfunctions as a gate electrode to the gate trench portion. On the other hand, by forming the connection portionin a curved shape, it is possible to reduce the electric field strength at the end portion rather than by being terminated by the extension portion.

70 30 39 40 30 39 30 4 FIG. In the transistor portion, the dummy trench portionis provided between the respective extension portionsof the gate trench portion. In the example of, one dummy trench portionis provided between the respective extension portions, but two or more dummy trench portionsmay be provided.

30 39 40 12 In addition, the dummy trench portionmay not be provided between the respective extension portions, and the gate trench portionmay be provided. With such a structure, since the electron current from the emitter regioncan be increased, the ON voltage is reduced.

30 29 31 40 100 30 31 100 30 31 4 FIG. The dummy trench portionmay have a linear shape extending in the extension direction, and may have an extension portionand a connection portionsimilar to the gate trench portion. In the semiconductor deviceillustrated in, only the dummy trench portionshaving the connection portionare arranged, but in another example, the semiconductor devicemay include a linear dummy trench portionhaving no connection portion.

130 40 30 40 30 130 130 The diffusion depth of the well regionmay be deeper than the depths of the gate trench portionand the dummy trench portion. The end portions of the gate trench portionand the dummy trench portionin the Y axis direction are provided in the well regionin a top view. That is, the bottom portion of each trench portion in the depth direction (positive side in the Z axis direction) is covered with the well regionat the end portion of each trench portion in the Y axis direction. As a result, electric field strength at the bottom portion of each trench portion can be reduced.

10 A mesa portion is provided between the trench portions in the arrangement direction. The mesa portion refers to a region sandwiched between the trench portions inside the semiconductor substrate. As an example, the depth position of the mesa portion is from the front surface of the semiconductor substrate to the lower end of the trench portion.

10 The mesa portion of the present example is sandwiched between adjacent trench portions in the X axis direction, and is provided to extend in the extension direction (Y axis direction) along the trench in the front surface of the semiconductor substrate.

14 12 15 14 12 15 12 15 14 10 12 The base regionis provided in each mesa portion. In each mesa portion, at least one of the emitter regionof the first conductivity type and the contact regionof the second conductivity type may be provided in a region sandwiched between the base regionsin a top view. The emitter regionof the present example is an N+ type, and the contact regionis a P+ type. The emitter regionand the contact regionmay be provided between the base regionand the front surface of the semiconductor substratein the depth direction. The dopant of the emitter regionis, for example, arsenic (As), phosphorus (P), antimony (Sb), or the like.

70 12 10 12 40 40 15 10 The mesa portion of the transistor portionhas the emitter regionexposed to the front surface of the semiconductor substrate. The emitter regionis provided in contact with the gate trench portion. The mesa portion in contact with the gate trench portionis provided with the contact regionexposed to the front surface of the semiconductor substrate.

15 12 15 12 Each of the contact regionand the emitter regionin the mesa portion is provided from one trench portion to the other trench portion in the X axis direction. As an example, the contact regionsand the emitter regionsof the mesa portion are alternately disposed along the extension direction (Y axis direction) of the trench portion.

15 12 12 15 12 In another example, the contact regionand the emitter regionof the mesa portion may be provided in a stripe shape along the extension direction (Y axis direction) of the trench portion. For example, the emitter regionis provided in a region in contact with the trench portion, and the contact regionis provided in a region sandwiched between the emitter regions.

12 80 14 80 14 80 14 80 The emitter regionis not provided in the mesa portion of the diode portion. The base regionmay be provided in the upper surface of the mesa portion of the diode portion. The base regionmay be disposed in the entire mesa portion of the diode portion. The base regionof the diode portionoperates as an anode.

54 54 14 54 15 14 12 54 The contact holeis provided above each mesa portion. The contact holeis disposed in a region sandwiched between the base regionsin the extension direction (Y axis direction). The contact holeof the present example is provided above each region of the contact region, the base region, and the emitter region. The contact holemay be disposed at the center in the arrangement direction (X axis direction) of the mesa portion.

80 82 22 82 82 22 4 FIG. In the diode portion, an N+ type cathode regionis provided in a region adjacent to the back surface of the semiconductor substrate. In the back surface of the semiconductor substrate, a P+ type collector regionmay be provided in a region where the cathode regionis not provided. In, the boundary between the cathode regionand the collector regionis indicated by a dotted line.

82 130 82 130 130 82 130 54 82 130 54 The cathode regionis disposed away from the well regionin the Y axis direction. As a result, by securing a distance between the cathode regionand the P type region (well region) having a relatively high doping concentration and formed up to a deep position, hole injection from the well regioncan be suppressed, so that the reverse recovery loss can be reduced. The end portion of the cathode regionin the Y axis direction of the present example is disposed farther from the well regionthan the end portion of the contact holein the Y axis direction. In another example, the end portion of the cathode regionin the Y axis direction may be disposed between the well regionand the contact hole.

5 FIG. 5 FIG. 100 40 120 1 120 3 is an example of a top view of the semiconductor device.describes the relationship between the gate trench portionsprovided in the active portion-and the active portion-and the gate runner portions adjacent thereto.

120 1 120 2 120 3 120 4 120 5 120 6 40 The lengths of the active portion-, the active portion-, the active portion-, the active portion-, the active portion-, and the active portion-in the Y axis direction are different. That is, the lengths (lengths in the Y axis direction) of the gate trench portionsprovided in these active portions are also different.

40 120 1 120 3 141 142 141 1 142 2 1 2 39 41 39 1 2 5 FIG. 5 FIG. In the present example, the gate trench portionsprovided in the active portion-and the active portion-are set as a first trench portionand a second trench portion, respectively. The predetermined length of the first trench portionis set as a first trench length L, and the predetermined length of the second trench portionis set as a second trench length L. In, the first trench length Land the second trench length Lare the maximum lengths in the Y axis direction including the extension portionand the connection portion, respectively, but may only correspond to the length of the extension portionin another example. As illustrated in, the first trench length Lis shorter than the second trench length L.

40 49 141 142 48 148 148 141 142 149 150 149 150 146 5 FIG. The gate trench portionis electrically connected to the gate runner portion via the contact holeat the end portion in the extension direction. The first trench portionand the second trench portionare electrically connected to the outer peripheral gate runner portionin the end portion on the positive side in the Y axis direction (extension direction), and the inner gate runner portionin the end portion on the negative side in the Y axis direction. In the present example, in the inner gate runner portion, the portions electrically connected to the end portions of the first trench portionand the second trench portionon the negative side in the Y axis direction are set as a first gate runner portionand a second gate runner portion, respectively. In, both the first gate runner portionand the second gate runner portionare the polysilicon wiring.

40 40 40 40 The resistance of the gate trench portionis obtained from the sum of the resistance of the gate trench portionitself and the resistance of the gate runner portion. The resistance of the gate trench portionitself is calculated depending on the dimension and the number of the gate trench portions. The resistance of the gate runner portion is calculated from the resistivity per unit length and the length, and in a case where the gate runner portion has a polysilicon wiring and a metal wiring, it is calculated from the average value of the respective resistances.

40 40 40 The resistance of the gate trench portionincreases in proportion to the distance from the gate runner portion, and becomes maximum near the center in the extension direction. In such a high resistance portion of the gate trench portion, the channel remains open at the time of turn-off. Due to this delay, the electron current increases in the high resistance portion, and further the hole current attracted to the electron current is concentrated. Therefore, if the resistance difference between the gate trench portionsis large, the delay of the high resistance portion increases and the current further concentrates, which may cause fracture.

149 150 149 150 In order to prevent such current concentration, the resistivity per unit length of the first gate runner portionis larger than the resistivity per unit length of the second gate runner portion. In the present example, the width of the first gate runner portionis narrower than the width of the second gate runner portion. Here, the width of the gate runner portion means a dimension in a direction orthogonal to the extension direction.

141 142 146 1 2 142 141 150 149 141 142 142 In the present example, the first trench portionand the second trench portionare both connected to the polysilicon wiring, and the first trench length Lis shorter than the second trench length L, so that the maximum resistance value of the second trench portionis larger than the maximum resistance value of the first trench portion. Therefore, by making the resistivity per unit length of the second gate runner portionsmaller than the resistivity per unit length of the first gate runner portion, the resistance difference between the first trench portionand the second trench portioncan be reduced, the current concentration in the high resistance portion (near the center of the second trench portionin the extension direction) can be suppressed, and the fracture can be prevented.

150 146 146 146 149 150 146 149 141 142 Alternatively, the second gate runner portionmay further include, in addition to the polysilicon wiring, a metal wiring which is provided at least partially above the polysilicon wiringand electrically connected to the polysilicon wiring. On the other hand, since the metal wiring is not provided in the first gate runner portion, the resistance of the second gate runner portioncalculated from the average value of the resistances of the polysilicon wiringand the metal wiring can be smaller than the resistance of the first gate runner portion, and the resistance difference between the first trench portionand the second trench portioncan be reduced.

149 150 40 The difference between the resistivity per unit length of the first gate runner portionand the resistivity per unit length of the second gate runner portionmay be set to be equal to or less than a predetermined threshold value. For example, the predetermined threshold value is 10%. In this way, by setting the resistance difference between the gate trench portionsto be equal to or less than a predetermined threshold value in this way, it is possible to suppress the concentration of current in the high resistance portion and prevent fracture.

100 100 100 46 47 48 146 148 6 FIG. 11 FIG. 6 FIG. 11 FIG. 2 FIG. Next, the configuration of the gate runner portion of the semiconductor devicefor suppressing the concentration of current will be described with reference toto.toeach are partial sectional views of the semiconductor deviceillustrated in. In the semiconductor deviceof the present example, as described above, the polysilicon wiringand the metal wiringare provided as the outer peripheral gate runner portion, and the polysilicon wiringis provided as the inner gate runner portion.

6 FIG. 2 FIG. 48 40 100 10 38 52 24 is an example of a cross section a-a′ of. The cross section a-a′ is a YZ cross section that passes through the edge portions (end portions on the positive side in the Y axis direction) of the outer peripheral gate runner portionand the gate trench portion. The semiconductor deviceof the present example has the semiconductor substrate, an interlayer dielectric film, the emitter electrode, and a collector electrodein the a-a′ cross section.

38 21 10 38 38 21 38 21 38 49 The interlayer dielectric filmis provided in a front surfaceof the semiconductor substrate. The interlayer dielectric filmis a dielectric film such as silicate glass to which an impurity such as boron or phosphorus is added. The interlayer dielectric filmmay be in contact with the front surface, and another film such as an oxide film may be provided between the interlayer dielectric filmand the front surface. The interlayer dielectric filmis provided with the contact hole.

52 21 10 38 24 23 10 52 24 The emitter electrodeis provided in the front surfaceof the semiconductor substrateand the upper surface of the interlayer dielectric film. The collector electrodeis provided in a back surfaceof the semiconductor substrate. The emitter electrodeand the collector electrodeare formed of a material containing metal or a stacked film thereof.

10 10 The semiconductor substratemay be a silicon substrate, a silicon carbide substrate, a nitride semiconductor substrate such as gallium nitride, or the like. The semiconductor substrateof the present example is a silicon substrate.

10 18 18 18 10 The semiconductor substratehas a drift regionof the first conductivity type. The drift regionof the present example is an N-type. The drift regionmay be a region which remains without providing another doping region in the semiconductor substrate.

18 18 Above the drift region, one or more accumulation regions may be provided in the Z axis direction. The accumulation region is a region in which the same dopant as the drift regionis accumulated at a higher concentration than the drift region. The doping concentration of the accumulation region is higher than the doping concentration of the drift region.

70 70 80 The accumulation region of the present example is an N type. The accumulation region may be provided only in the transistor portion, or may be provided in both the transistor portionand the diode portion. By providing the accumulation region, the injection-enhancement effect (IE effect) of carriers can be enhanced, and the ON voltage can be reduced.

20 18 20 20 18 20 14 22 82 A buffer regionof the first conductivity type may be provided below the drift region. The buffer regionof the present example is an N type. The doping concentration of the buffer regionis higher than the doping concentration of the drift region. The buffer regionmay function as a field stop layer that prevents a depletion layer extending from the lower surface side of the base regionfrom reaching the collector regionand the cathode region.

22 20 70 22 82 23 The collector regionis provided below the buffer regionin the transistor portion. The collector regionmay be provided in contact with the cathode regionin the back surface.

80 82 20 82 22 70 80 70 In the diode portion, the cathode regionis provided below the buffer region. The cathode regionmay be provided at the same depth as the collector regionof the transistor portion. The diode portionmay function as a freewheeling diode (FWD) that allows a freewheeling current that conducts in the reverse direction to flow when the transistor portionis turned off.

40 18 21 40 21 42 44 42 42 The gate trench portionis provided so as to reach the drift regionfrom the front surface. The gate trench portionhas a gate trench provided in the front surface, a gate dielectric film, and the gate conductive portion. The gate dielectric filmis provided to cover the inner wall of the gate trench. The gate dielectric filmmay be formed of an oxide film or a nitride film.

44 42 44 21 42 44 10 44 The gate conductive portionis provided in the gate trench so as to be embedded further inside than the gate dielectric film. The upper surface of the gate conductive portionmay be in the same XY plane as the front surface. The gate dielectric filminsulates the gate conductive portionfrom the semiconductor substrate. The gate conductive portionis formed of polysilicon doped with impurities.

40 38 21 44 14 The gate trench portionis covered with the interlayer dielectric filmin the front surface. If a predetermined voltage is applied to the gate conductive portion, a channel by an inversion layer of electrons is formed in a surface layer of an interface in contact with the gate trench in the base region.

6 FIG. 30 40 30 21 21 10 44 Although not illustrated in, the dummy trench portionmay have the same structure as the gate trench portionin the XZ cross section. The dummy trench portionhas a dummy trench provided in the front surface, a dummy dielectric film, and a dummy conductive portion. The dummy dielectric film is provided to cover the inner wall of the dummy trench. The dummy dielectric film may be formed of an oxide film or a nitride film. The dummy conductive portion is provided in the dummy trench so as to be embedded further inside than the dummy dielectric film. The upper surface of the dummy conductive portion may be in the same XY plane as the front surface. The dummy dielectric film insulates the dummy conductive portion from the semiconductor substrate. The dummy conductive portion may be formed of the same material as the gate conductive portion.

40 30 38 21 30 40 The gate trench portionand the dummy trench portionof the present example are covered with the interlayer dielectric filmin the front surface. Note that the bottom portions of the dummy trench portionand the gate trench portionmay have a curved surface shape protruding downward (a curved shape in a cross section).

44 40 21 10 40 46 46 47 49 47 52 The gate conductive portionof the gate trench portionis exposed to the front surfaceof the semiconductor substrateat the edge portion of the gate trench portion, and is electrically connected to the polysilicon wiring. The polysilicon wiringis electrically connected to the metal wiringprovided above via the contact hole. The metal wiringand the emitter electrodeare separated by a distance at which insulation is maintained.

48 47 52 In this way, the outer peripheral gate runner portionhas the metal wiringwhile maintaining the insulation from the emitter electrode, thereby reducing the resistance of the entire gate runner portion.

7 FIG. 2 FIG. 148 120 3 is an example of a cross section b-b′ of. The cross section b-b′ is an XZ cross section that passes through an inner gate runner portionextending in the X axis direction between the active portion-and the pad region.

8 FIG. 2 FIG. 148 120 3 40 120 3 is an example of a cross section c-c′ of. The cross section c-c′ is a YZ cross section that passes through the inner gate runner portionextending in the X axis direction between the active portion-and the pad region, similarly to the cross section b-b′. In addition, the cross section c-c′ passes through the edge portion (end portion on the negative side in the Y axis direction) of the gate trench portionprovided in the active portion-.

7 FIG. 8 FIG. 44 40 21 10 40 146 As illustrated inand, the gate conductive portionof the gate trench portionis exposed to the front surfaceof the semiconductor substrateat the edge portion of the gate trench portion, and is electrically connected to the polysilicon wiring.

52 172 146 148 48 In this way, even in a region where the emitter electrodeand other electrodes (the current sense padand the like) are close to each other and a space for providing the metal wiring cannot be secured, the polysilicon wiringis provided as the inner gate runner portionso as to assist the outer peripheral gate runner portion.

9 FIG. 2 FIG. 148 120 1 120 2 50 52 50 10 146 52 38 50 is an example of a cross section d-d′ of. The cross section d-d′ is an XZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section d-d′ passes near the gate pad. The emitter electrodeand the gate padare provided above the semiconductor substrate. The polysilicon wiringis insulated from the emitter electrodeby the interlayer dielectric film, but is electrically connected to the gate pad.

10 FIG. 2 FIG. 148 120 1 120 2 178 120 1 120 2 52 10 180 182 52 is an example of the cross section e-e′ of. The cross section e-e′ is a YZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section e-e′ passes between the pad region and the temperature sense portion. In the active portion-and the active portion-, the emitter electrodeis provided above the semiconductor substrate. A pair of the anode wiringand the cathode wiringis provided between the emitter electrodes.

146 40 120 1 120 2 44 40 120 1 120 2 21 10 40 146 The polysilicon wiringis provided so as to straddle the edge portion of the gate trench portionprovided in the active portion-and the active portion-. The gate conductive portionof the gate trench portionprovided in the active portion-and the active portion-is exposed to the front surfaceof the semiconductor substrateat the edge portion of the gate trench portion, and is electrically connected to the polysilicon wiring.

11 FIG. 2 FIG. 10 FIG. 148 120 1 120 2 178 178 180 182 is an example of the cross section f-f′ of. The cross section f-f′ is a YZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section f-f′ passes through the temperature sense portion. Unlike the cross section e-e′ illustrated in, the temperature sense portionis provided between the anode wiringand the cathode wiring.

178 10 38 146 146 178 The temperature sense portionhas a PN junction diode made of polycrystalline silicon provided above the semiconductor substratevia the interlayer dielectric film. The polysilicon wiringbranches in the vicinity of the PN junction diode and extends so as to surround the PN junction diode. As a result, the polysilicon wiringsecures insulation from the temperature sense portion.

146 178 146 149 146 178 146 5 FIG. The width of the polysilicon wiringadjacent to the temperature sense portionis equal to or larger than the width of the polysilicon wiringof the first gate runner portionillustrated in. Here, the polysilicon wiringadjacent to the temperature sense portionmeans the width of the polysilicon wiringsurrounding the PN junction diode.

10 178 120 40 120 1 120 2 178 146 40 178 The central portion of the semiconductor substrateprovided with the temperature sense portionis likely to cause fracture by heat generated from the switching device formed in the active portion. In addition, the gate trench portionprovided in the active portion-and the active portion-has a shorter trench length in the vicinity of the temperature sense portion. In the region where the trench length changes, the current is concentrated at the time of turn-off, and the fracture is likely to occur. Therefore, by increasing the width of the adjacent polysilicon wiring, the resistance of the gate trench portionin the vicinity of the temperature sense portionis reduced, and the current concentration at the time of turn-off is prevented.

100 40 48 47 46 148 146 40 In this way, the semiconductor deviceof the present example includes a gate runner portion provided so as to reduce the resistance difference between the gate trench portions. Here, the outer peripheral gate runner portionhas the metal wiringand the polysilicon wiring, and the inner gate runner portionhas only the polysilicon wiring, but the resistance difference between the gate trench portionsis not limited thereto as long as the resistance difference is below a predetermined threshold value.

48 47 46 148 146 52 The outer peripheral gate runner portionmay have only the metal wiringwithout having the polysilicon wiring. Alternatively, the inner gate runner portionmay further have a metal wiring in addition to the polysilicon wiringin a region where a sufficient distance required for insulation can be secured between the emitter electrodeand other electrodes.

12 FIG. 200 200 100 148 146 147 200 100 illustrates an example of the arrangement of the gate runner portion in the front surface of a semiconductor deviceaccording to an example embodiment 2. In the semiconductor device, unlike the semiconductor device, at least a part of the inner gate runner portionhas the polysilicon wiringand a metal wiring. In the semiconductor device, the portions common to the semiconductor deviceare denoted by the same reference numerals, and the description thereof is omitted.

13 FIG. 12 FIG. 148 120 3 40 120 3 44 40 21 10 40 146 is an example of the cross section g-g′ of. The cross section g-g′ is a YZ cross section that passes through the inner gate runner portionextending in the X axis direction between the active portion-and the pad region. In addition, the cross section g-g′ passes through the edge portion (end portion on the negative side in the Y axis direction) of the gate trench portionprovided in the active portion-. The gate conductive portionof the gate trench portionis exposed to the front surfaceof the semiconductor substrateat the edge portion of the gate trench portion, and is electrically connected to the polysilicon wiring.

14 FIG. 12 FIG. 148 120 3 is an example of the cross section h-h′ of. The cross section h-h′ is an XZ cross section that passes through the inner gate runner portionextending in the X axis direction between the active portion-and the pad region.

13 FIG. 14 FIG. 147 146 146 49 147 52 148 147 40 As illustrated inand, the metal wiringextends above the polysilicon wiringand is electrically connected to the polysilicon wiringvia the contact hole. The metal wiringis provided apart from the emitter electrodeand other electrodes. In this way, the inner gate runner portionfurther includes the metal wiring, so that the resistance of the gate trench portioncan be reduced.

15 FIG. 12 FIG. 148 120 1 120 2 178 180 148 is an example of a cross section k-k′ of. The cross section k-k′ is an XZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section k-k′ passes between the pad region and the temperature sense portion, and passes through the anode wiringnear the inner gate runner portionin the vicinity of the pad region.

52 180 182 147 On the positive side of the pad region in the X axis direction, the gate runner portion may be close to the emitter electrodeor the anode wiringand the cathode wiring. In such a region, it is difficult to provide the metal wiringbecause there is a risk of a short circuit.

200 145 147 145 146 145 147 49 The semiconductor deviceof the present example further includes a polysilicon bridge portionthat electrically connects the metal wiringsto each other. The polysilicon bridge portionmay be a part of the polysilicon wiringand may be a separate member made of polysilicon. The polysilicon bridge portionis electrically connected to the metal wiringprovided above via the contact hole.

15 FIG. 147 180 147 145 180 147 182 145 182 180 182 147 In, the metal wiringis provided to the extent that insulation from the anode wiringcan be secured. In the region where the metal wiringis not provided, the polysilicon bridge portionis provided below the anode wiring. Note that, although not illustrated, the metal wiringmay be provided to the extent that insulation can also be secured from the cathode wiring, and the polysilicon bridge portionmay also be provided below the cathode wiring. In addition, in a case where the anode wiringand the cathode wiringare not provided, only one metal wiringmay be provided.

145 147 120 1 120 2 147 50 The polysilicon bridge portionmay be further provided between the metal wiringextending in the X axis direction between the active portion-and the active portion-and the metal wiringsurrounding the gate pad.

50 145 50 147 178 Since the temperature sense wiring is not provided in the vicinity of the gate padunlike the vicinity of the pad region, it is possible to provide a metal wiring from the viewpoint of insulation. However, by providing the polysilicon bridge portionin the vicinity of the gate padinstead of the metal wiring, the configuration of the gate runner portion becomes symmetrical on both sides of the temperature sense portion, and the concentration of current due to imbalance can be prevented.

16 FIG. 12 FIG. 148 120 1 120 2 178 120 1 120 2 52 10 180 182 52 is an example of the cross section m-m′ of. The cross section m-m′ is a YZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section m-m′ passes between the pad region and the temperature sense portion. In the active portion-and the active portion-, the emitter electrodeis provided above the semiconductor substrate. A pair of the anode wiringand the cathode wiringis provided between the emitter electrodes.

146 40 120 1 120 2 44 40 120 1 120 2 21 10 40 146 The polysilicon wiringis provided so as to straddle the edge portion of the gate trench portionprovided in the active portion-and the active portion-. The gate conductive portionof the gate trench portionprovided in the active portion-and the active portion-is exposed to the front surfaceof the semiconductor substrateat the edge portion of the gate trench portion, and is electrically connected to the polysilicon wiring.

147 52 180 52 182 147 52 180 182 The metal wiringis provided between the emitter electrodeand the anode wiring, and between the emitter electrodeand the cathode wiring. The metal wiringis separated from each of the emitter electrode, the anode wiring, and the cathode wiringso as to sufficiently secure the distance required for insulation.

147 146 146 49 148 147 40 148 120 1 120 2 178 17 FIG. 12 FIG. The metal wiringextends above the polysilicon wiringand is electrically connected to the polysilicon wiringvia the contact hole. In this way, the inner gate runner portionfurther includes the metal wiring, so that the resistance of the gate trench portioncan be reduced.is an example of the cross section n-n′ of. The cross section n-n′ is a YZ cross section of the inner gate runner portionextending in the X axis direction between the active portion-and the active portion-. The cross section n-n′ passes through the temperature sense portion.

146 146 178 The polysilicon wiringbranches in the vicinity of the PN junction diode and extends so as to surround the PN junction diode. As a result, the polysilicon wiringsecures insulation from the temperature sense portion.

16 FIG. 147 52 180 52 182 147 52 180 182 Similar to, the metal wiringis provided between the emitter electrodeand the anode wiring, and between the emitter electrodeand the cathode wiring. The metal wiringis separated from each of the emitter electrode, the anode wiring, and the cathode wiringso as to sufficiently secure the distance required for insulation.

147 146 146 49 148 147 40 The metal wiringextends above the polysilicon wiringand is electrically connected to the polysilicon wiringvia the contact hole. In this way, the inner gate runner portionfurther includes the metal wiring, so that the resistance of the gate trench portioncan be reduced.

18 FIG. 300 300 100 illustrates an example of the arrangement of the gate runner portion in the front surface of a semiconductor deviceaccording to an example embodiment 3. In the semiconductor device, the portions common to the semiconductor deviceare denoted by the same reference numerals, and the description thereof is omitted.

300 148 146 147 147 120 3 120 1 40 1 2 5 FIG. In the semiconductor device, the inner gate runner portionhas mostly only the polysilicon wiring, and locally has the metal wiring. In the present example, the metal wiringextends in the Y axis direction along the end portion of the pad region on the positive side in the X axis direction. The pad region on the positive side in the X axis direction is the boundary between the active portion-and the active portion-. As described with reference to, the length of the gate trench portionchanges from a trench length Lto a trench length Lwith this position as a boundary. As described above, in the region where the trench length changes, the current is concentrated at the time of turn-off, and the fracture is likely to occur.

148 147 148 146 147 Therefore, the inner gate runner portionhas at least the metal wiringalong the end portion on the positive side in the X axis direction of the pad region, thereby reducing the resistance of the gate runner portion in the region where the trench length changes. In this way, even in a case where the inner gate runner portionis formed of the polysilicon wiringdue to safety restrictions, the current concentration at the time of turn-off is prevented by locally providing the metal wiring.

19 FIG. 400 400 100 illustrates an example of the arrangement of the gate runner portion in the front surface of a semiconductor deviceaccording to an example embodiment 4. In the semiconductor device, the portions common to the semiconductor deviceare denoted by the same reference numerals, and the description thereof is omitted.

400 152 40 40 40 40 152 40 The semiconductor devicefurther includes an additional gate runner portionthat is provided above the gate trench portionand is electrically connected to the gate trench portion. Here, the “above” of the gate trench portionmeans the +Z axis direction in the range between the end portions of the gate trench portionin the Y axis direction in a top view. The additional gate runner portionis electrically connected to the gate trench portionvia a contact hole (not illustrated).

152 120 3 120 1 120 4 141 142 141 142 152 120 5 120 2 120 6 5 FIG. The additional gate runner portionmay extend over the active portion-, the active portion-, and the active portion-, may be provided above the first trench portionand the second trench portionillustrated in, and may be electrically connected to each of the first trench portionand the second trench portion. The additional gate runner portionextending over the active portion-, the active portion-, and the active portion-may be further provided.

152 146 147 148 146 44 21 10 146 40 146 44 147 44 The additional gate runner portionmay have at least one of the polysilicon wiringand the metal wiring, similarly to the inner gate runner portion. In the case of having the polysilicon wiring, the gate conductive portionmay be exposed to the front surfaceof the semiconductor substrateat the position where the polysilicon wiringand the gate trench portionoverlap, and the polysilicon wiringand the gate conductive portionmay be electrically connected to each other. The metal wiringmay be electrically connected to the gate conductive portionvia the contact hole.

152 40 152 1 2 152 40 120 120 5 FIG. The additional gate runner portionmay be extended so as to pass through the center of the gate trench portionin the extension direction. For example, the additional gate runner portionextends so as to pass through the center of the first trench length Land the second trench length Lillustrated in. That is, the additional gate runner portionextends the center, which is in the Y axis direction of the gate trench portionin the active portion, in the X axis direction and, between the active portions, extends in the Y axis direction so as to adjust the position in the Y axis direction.

40 152 40 As described above, the resistance of the gate trench portionincreases in proportion to the distance from the gate runner portion and becomes maximum near the center in the extension direction. Therefore, by providing the additional gate runner portionand shortening the maximum distance from the gate runner portion, the resistance difference between the gate trench portionscan be reduced, the current concentration in the high resistance portion can be suppressed, and fracture can be prevented.

While the embodiments of the present invention have been described, the technical scope of the invention is not limited to the above described embodiments. It is apparent to persons skilled in the art that various alterations and improvements can be added to the above-described embodiments. It is also apparent from the scope of the claims that the embodiments added with such alterations or improvements can be included in the technical scope of the invention.

The operations, procedures, steps, and stages of each process performed by an apparatus, system, program, and method shown in the claims, embodiments, or diagrams can be performed in any order as long as the order is not indicated by “prior to,” “before,” or the like and as long as the output from a previous process is not used in a later process. Even if the process flow is described using phrases such as “first” or “next” in the claims, embodiments, or diagrams, it does not necessarily mean that the process must be performed in this order.

10 12 14 15 18 20 21 22 23 24 25 29 30 31 38 39 40 41 42 44 46 47 48 49 50 52 54 56 70 80 82 90 100 102 110 120 130 141 142 145 146 147 148 149 150 152 172 174 176 178 180 182 200 203 210 220 300 400 : semiconductor substrate;: emitter region;: base region;: contact region;: drift region;: buffer region;: front surface;: collector region;: back surface;: collector electrode;: connection portion;: extension portion;: dummy trench portion;: connection portion;: interlayer dielectric film;: extension portion;: gate trench portion;: connection portion;: gate dielectric film;: gate conductive portion;: polysilicon wiring;: metal wiring;: outer peripheral gate runner portion;: contact hole;: gate pad;: emitter electrode;: contact hole;: contact hole;: transistor portion;: diode portion;: cathode region;: separation portion;: semiconductor device;: end side;: current sense portion;: active portion;: well region;: first trench portion;: second trench portion;: polysilicon bridge portion;: polysilicon wiring;: metal wiring;: inner gate runner portion;: first gate runner portion;: second gate runner portion;: additional gate runner portion;: current sense pad;: anode pad;: cathode pad;: temperature sense portion;: anode wiring;: cathode wiring;: semiconductor device;: main metal portion;: bidirectional diode portion;: output comparison diode portion;: semiconductor device;: semiconductor device.