Electronic Package with Surface Contact Wire Extensions

This application is a division of patent application Ser. No. 17/139,987, filed Dec. 31, 2020, the contents of all of which are herein incorporated by reference in its entirety.

This disclosure relates to electronic packages, and more particularly, to electronic packages with surface contacts.

Component packaging is often driven by the consumer electronics market with less consideration given to higher reliability industries such as automotive, medical, industrial, and aviation. Improved packaging technologies and component miniaturization can often lead to new or unexpected design, manufacturing, and reliability issues. This has been the case with non-leaded devices, for example, Quad-Flat No-leads (QFN) and Small-Outline No-leads (SON), also referred to as Dual-Flat No-leads (DFN), devices, especially when it comes to adoption by new non-consumer electronic original equipment manufacturers. Integration of component device families, such as QFN/SON, into high reliability environments can be difficult. QFN/SON components are known to be susceptible to solder fatigue issues, especially thereto-mechanical fatigue due to thermal cycling. The lower standoff in QFN/SON devices can lead to higher thermo-mechanical strains due to coefficient of thermal expansion (CTE) mismatch as compared to leaded devices.

There are also issues on the manufacturing side. For larger QFN/SON components, moisture absorption during solder reflow can be a concern. If there is a large amount of moisture absorption into the device then heating during reflow can lead to excessive component warpage. This can cause the corners of the component lifting off the printed circuit board causing improper joint formation. Several other issues with manufacturing include: part floating due to excessive solder paste under the center thermal pad, large solder voiding, poor rework able characteristics, and optimizing the solder reflow profile. However, one of the most significant issues preventing widespread adoption of QFN/SON devices into high reliability environments is the inability of automated solder joint inspection equipment to adequately inspect the solder joints of QFN/SON devices, which have no contact through-holes and/or external leads extending outward from the QFN/SON devices. Manufacturers who integrate QFN/SON devices onto printed wiring boards (PWBs) cannot adequately inspect the solder joints between the QFN/SON devices and the PWBs. In contrast, leaded devices can be inspected because the leads extend outward and away from the leaded device and the corresponding solder joints each form a solder fillet, which is visible.

1 FIG. As mentioned previously, QFN/SON are widely used in the consumer electronics market. Unlike for leaded devices, in QFN/SON, the electrical contacts or terminals are inset into the mold cap as surface contacts. Nothing extends from the device in order to surface mount, as shown in. This feature of the non-leaded packages, including QFN/SON, allows them to be small, on the order chip-scale.

14 12 18 22 14 20 18 18 12 20 2 FIG. A QFN device begins with a lead frame having a die attach pad, which may also serve as a thermal pad, and surface contacts, as shown in. In at least one example the lead frame is constructed of copper material, 200 μm (or 8 mils) thick and the width of each surface contact lead is 200 mm. Next, a semiconductor dieis attached, via die attach material, to a top surface of die attach pad. Next, wire bondsare formed between the lead frame leads and the bond pads or terminals of semiconductor die, electrically coupling the bond pads of semiconductor dieto associated surface contacts. Gold, copper, or palladium coated wire (PCC) are examples of wire that may be used for wire bonds. PCC wire is low cost and has a noble finish, mitigating oxidation oxidize but bonding wire having other composition and size can also be used.

18 14 20 16 10 36 10 3 FIG. 1 2 FIGS.and Finally, the resulting combination of semiconductor die, die support pad, and wire bondsare covered with a mold compound. Typically, plastic is used as the mold compound, but use of other materials, including ceramics, can also be used. As shown in, with a typical QFN fabrication process, there are multiple QFN deviceson a strip assemblythat are block molded/encapsulated at the same time. QFN devicesare thereafter singulated to produce individual QFN devices, as shown in. A flat surface at the bottom of the QFN device is the only contact surface for mounting to a printed wiring board.

12 14 16 16 14 12 10 12 10 12 10 10 36 12 12 16 1 3 FIGS.- Surface contactsand die attach/thermal padare partially covered by mold compoundwith exposed surfaces being coplanar with bottom and side surfaces of mold compound. The exposed surface of the die attach/thermal padcan be soldered to a corresponding pad on a PWB or attached with other heat conductive die attach material. Surface contactsof QFN devicecan be soldered to corresponding electrical contacts or terminals, on a PWB.show that a first portion of each of surface contactsare exposed on a bottom surface of QFN deviceand an end portion of each of surface contactsare exposed on a side surface of QFN device. The side surfaces of the electrical contacts or terminals are typically exposed during a singulation process during which a saw is used to cut each QFN devicefrom strip assemblywhich cuts through an end portion of each of surface contactsand exposes the resulting side surfaces. The result is that bottom and side surfaces of surface contactsare exposed in a coplanar arrangement with bottom and side surfaces of mold compound.

As disclosed herein, non-leaded packages are modified to include wires extending from bottom surface of their surface contacts. The wires enable inspectable solder joints when attached to a PWB, and offer improved reliability by increasing standoff height and reducing solder fatigue issues compared to standard non-leaded packages, including QFN/SON.

As one example, an electronic package includes an electronic component including terminals, a plurality of surface contacts, at least some of the surface contacts being electrically coupled to the terminals within the electronic package, a mold compound covering the electronic component and partially covering the surface contacts with a bottom surface exposed from the mold compound, and a plurality of wires extending from exposed surfaces of the surface contacts, each of the wires providing a solderable surface for mounting the electronic package at a standoff on an external board.

In another example, a method for fabricating an electronic package includes wire bonding a plurality of wires to exposed bottom surfaces of surface contacts of the electronic package, the electronic package further including an electronic component including terminals and a mold compound covering the electronic component and partially covering the surface contacts. The surface contacts are electrically coupled to the terminals within the electronic package. The method further includes, with the wires attached to the exposed bottom surfaces of the surface contacts, cutting the mold compound to singulate the electronic package from a strip of electronic packages.

4 4 5 FIGS.A,B and 4 FIG.A 4 FIG.B 5 FIG. 110 150 112 110 100 100 110 100 illustrate example QFN packagesincluding wiresextending from bottom surfaces of QFN surface contacts. Specifically,is a perspective view of multiple QFN packageson a strip assemblysubsequent to block molding but prior to singulation.is a close-up perspective view of a portion of strip assembly.is a perspective view of a single packageafter singulation from strip assembly.

110 114 116 112 110 10 150 2 FIG. Each packageincludes at least one electronic component, such as a semiconductor die. For example, the electronic component may be mounted to padand covered by mold compound. The electronic component is also electrically connected to at least some of the surface contacts. For example, each packagemay be substantially similar to QFN device() with the addition of wires.

150 112 116 100 150 112 150 150 110 10 4 FIG.A Wiresextend from the exposed bottom surfaces of some or all of surface contactsbeyond a bottom surface of the mold compound. Although strip assemblymay include wiresfor each surface contacts, some of wiresare omitted fromfor simplicity. Wiresprovide a solderable surface for mounting the packagesat a standoff on an external board, such as a PWB. While any standoff may be selected according to the requirements of a particular application, in some examples, a standoff within a range of 100 to 600 microns is suitable to facilitate inspectable solder joints and reducing solder fatigue compared to standard QFN devices like QFN device.

110 110 100 116 100 110 QFN packagesare mold array process (MAP) type non-leaded packages. This means QFN packagesare molded in a single cavity mold to form strip assembly, and singulation includes cutting through the common mold compoundto separate strip assemblyinto individual QFN packages.

150 112 110 150 152 154 152 112 110 152 152 152 150 154 164 150 150 116 164 150 116 150 116 150 164 110 150 4 FIG.B 5 FIG. Wiresmay be formed on one or more contactsof QFN packagesusing a wire bonder, for example. Prior to singulation, each wireis attached on one side with a stitch bondA, the wire forms an arch, and is attached on the other side with a stich bondB to the associated surface contactof the adjacent package(). Stich bondsA,B are collectively referred to as stich bonds. During singulation, each wireis cut through its archleaving a distal end() of each wirefree floating. As wiresare cut in unison with mold compoundduring singulation, distal endof each wireis coplanar with a side surface of mold compound. In other examples, wiresmay be shaped, such as bending or grinding after singulations such that the distal ends may not be coplanar with a side surface of mold compound. The consistency of the heights, the standoff, of wiresis generally uniform such that distal endsare in planar alignment to support surface mounting packageby way of solder connections between wiresand electrical contacts of a board, such as a PWB.

150 110 150 150 112 20 2 FIG. Heavy gauge aluminum or copper wire may be used for wires. While any wire diameter may be selected according to specific requirements of package, wireswill generally be larger than wires used in wire bonding an electrical component to leads within the package. For example, wireshave wire diameters of at least 200 microns, whereas wire bonds providing electrical connections between electronic component terminals and contacts, such as wire bonds() may have much smaller wire diameters, such as diameters less than 100 microns, such as diameters between about 10 to 50 microns.

110 100 112 112 112 100 112 150 116 112 116 For copper wire or other metal that would benefit from a plating layer, a tin coating may be applied to QFN packageseither as part of strip assemblyor after singulation. Such a tin coating also covers portions of surface contactsexposed during the plating process. For example, if plating were applied prior to singulation, bottom surfaces of contactsmay include a plating layer, but side surfaces may include copper exposed by the singulation process. Alternatively, a partial cut may be used to exposed side surfaces of surface contactsprior to singulation of strip assembly, and both side surfaces and bottom surfaces of contactsmay share the same coating as wires. Assuming the tin coating was applied after mold compound, the tin coating would not cover portions of surface contactscovered by mold compound.

100 108 114 112 110 108 115 114 112 108 115 Strip assemblyincludes a leadframe strip, which includes a padand surface contactsfor each package. Leadframe stripfurther includes tie barswhich interconnect pad, contactsand other elements of the leadframes to one another as well as to elements of adjacent leadframes in a leadframe strip. Leadframes on leadframe stripare arranged in rows and columns. A siderail may surround the array of leadframes to provide rigidity and support leadframe elements on the perimeter of the leadframe strip. The siderail may also include alignment features to aid in manufacturing. The siderail and portions of tie barsare removed during singulation.

108 108 108 Leadframe strippredominantly includes copper, such as a copper alloy. As referred to herein, “predominately including” means greater than fifty percent by weight, up to one hundred percent by weight. Examples of suitable copper alloys for leadframe stripinclude aluminum bronze (copper ninety-two percent by weight, aluminum eight percent by weight), beryllium copper (copper ninety-eight percent by weight, beryllium two percent by weight), cartridge brass (copper seventy percent by weight, zinc thirty percent by weight), cupronickel (copper seventy percent by weight, nickel thirty percent by weight), gunmetal (copper ninety percent by weight, tin ten percent by weight). nickel silver (copper seventy-eight percent by weight, nickel twelve percent by weight, lead ten percent by weight), as well as copper alloys C19210, C19400, and C70250 under the unified numbering system. In other examples, leadframe stripmay predominantly include iron-nickel alloys (for instance the so-called “Alloy 42”), or aluminum.

108 Leadframe stripis formed on a single thin (about 120 to 250 μm) sheet of metal by stamping or etching. The ductility in this thickness range provides the 5 to 15% elongation that facilitates an intended bending and forming operation. The configuration or structure of the leadframe is stamped or etched from the starting metal sheet.

116 112 110 112 114 110 116 Mold compoundprovides a protective outer layer for the electronic component and electrical connections to contactsin each package. Portions of contactsand padare exposed an outer surface of each package. In some examples, mold compoundincludes an epoxy such as an epoxy-based thermoset polymer.

Usually die mounting, die to electrical contact attachment, such as wire bonding, and molding to cover at least part of the leadframe and dies take place while the leadframes are still integrally connected as a leadframe strip. After such processes are completed, the leadframes, and mold compound of a package, are severed (“singulated” or “diced”) with a cutting tool, such as a saw or laser. These singulation cuts separate the leadframe strip into separate packages, each semiconductor package including a singulated leadframe, at least one electronic component, electrical connections between the electronic component and leads (such as gold or copper wire bonds) and the mold compound which covers at least part of these structures.

6 6 7 FIGS.A,B and 6 FIG.A 6 FIG.B 7 FIG. 210 212 210 200 200 210 200 210 110 150 164 250 212 110 210 210 illustrate example QFN packagesincluding wires extending from bottom surface of the QFN surface contacts. Specifically,is a perspective view of multiple packageson a strip assemblysubsequent to block molding but prior to singulation.is a close-up perspective view of a portion of strip assembly.is a perspective view of a single packageafter singulation from strip assembly. packagesare the same as QFN packages, except that wireswith floating distal endshave been replaced with wires, which are secured to contactson both ends. For brevity, details of QFN packagesare not discussed with respect to packages, although those details are equally applicable to packages.

210 214 216 212 Each packageincludes at least one electronic component, which may be mounted to padand covered by mold compound. The electronic component is also electrically connected to at least some of the surface contacts.

250 212 200 250 212 250 250 210 6 FIG.A Wiresextend from the exposed bottom surfaces of some or all of surface contacts. Although strip assemblymay include wiresfor each surface contacts, some of wiresare omitted fromfor simplicity. Wiresprovide a solderable surface for mounting the packagesat a standoff on an external board, such as a PWB. The wires extend beyond a bottom surface of the mold compound in planar alignment to provide the standoff. While any standoff may be selected according to the requirements of a particular application, in some examples, a standoff between 100 to 600 microns is suitable to facilitate inspectable solder joints and reducing solder fatigue compared to standard QFN devices.

250 212 210 265 265 265 250 210 265 263 250 210 263 263 210 250 216 250 263 216 6 FIG.B Wiresmay be formed on one or more contactsof packagesusing a wire bonder, for example. The consistency of the heights, the standoff, of archesA,B (collectively, “arches”) of wiresis uniform to support surface mounting packageby way of solder connections between archesand electrical contacts of a board, such as a PWB. As best shown in, each stitch bondsecures the wiresfor two packages. During singulation, stitch bondsare cut, with a portion of each stitch bondsremaining on each singulated package. As wiresare cut in unison with mold compoundduring singulation, the distal end of each wireat stitch bondis coplanar with a side surface of mold compound.

250 212 265 250 212 250 252 263 212 265 252 263 Following singulation, each of wiresis attached at both ends to an associated surface contactwith an archof the wireproviding the standoff for the associated surface contact. Specifically, each wireis attached on both sides with stitch bonds,to the associated surface contactwith an archbetween the two stitch bonds,.

210 200 212 For copper wire or other metal that would benefit from a plating layer, a tin coating may be applied to packageseither as part of strip assemblyor after singulation. Such a tin coating would also cover portions of surface contactsexposed during the plating process.

200 208 214 212 210 208 215 214 212 208 210 208 Strip assemblyincludes a leadframe strip, which includes a padand surface contactsfor each package. Leadframe stripfurther includes tie barswhich interconnect pad, contactsand other elements of the leadframes to one another as well as to elements of adjacent leadframes in a leadframe strip. Leadframe stripis formed on a single thin (about 220 to 250 μm) sheet of metal by stamping or etching. Tie bars and siderails may be removed during singulation of packagesformed on leadframe strip.

216 212 210 212 214 210 Mold compoundprovides a protective outer layer for the electronic component and electrical connections to contactsin each package. Portions of contactsand padare exposed an outer surface of each package.

8 FIG. 8 FIG. 4 4 5 FIGS.A,B and 110 110 210 is a flowchart of a method of fabricating a semiconductor package including wires extending from surface contacts of the package. For clarity, the method ofis described with reference to packageand; however, the described techniques are not limited to the specific example of package, and may be adapted to other package designs, including package.

100 110 108 108 110 108 112 108 112 302 8 FIG. First, strip assembly, including a number of QFN packages, is assembled on a common leadframe strip. Each QFN device on the leadframe stripincludes an electronic component including terminals. The assembly process includes mounting the electronic component(s) for each packageto leadframe stripand electrically connecting the terminals of the electronic component to at least some of the surface contactsof the leadframe strip. For example, electrically connecting the terminals of the electronic component to at least some of the surface contactsmay include wire bonding (, step).

110 100 116 110 112 114 304 108 110 108 116 114 112 116 116 110 100 116 8 FIG. All of the QFN packagesof strip assemblyare bulk encapsulated with plastic mold compound, with only the bottom surface of each packagenot being completely covered with the mold compound, leaving bottom surfaces of contactsand padsuncovered (, step). In this process, leadframe strip, with the attached electronic components of QFN packages, is placed in the cavity of a mold, such as a steel mold. A heated and viscous mold compound, such as an epoxy resin filled with inorganic granules, such as alumina and silicon dioxide, is pressured into the cavity to fill the cavity and surround the electronic components and leadframe stripportions without voids. Mold compoundcovers padand at least portions of contacts. Mold compoundmay require an extended polymerization period (“curing”; commonly at 175° C. for 5 to 6 hours). After polymerizing the mold compound and cooling to ambient temperature, the mold is opened, while mold compoundremains adhered to the molded parts. Individual QFN packagesremain interconnected as part of strip assemblyafter being covered with mold compound.

110 150 Following molding, QFN packagesmay be tested for quality and functionality. In another example, the testing step occurs after placement of the wires.

110 150 112 110 100 306 150 112 20 150 110 8 FIG. 2 FIG. The bulk molded QFN packagesmay then be processed through a wire bonder step where a wireis added to the exposed bottom surfaces of some or all of contactsof each packageof strip assembly(, step). Wireshave wire diameters of at least 200 microns, whereas wire bonds providing electrical connections between electronic component terminals and contacts, such as wire bonds() may have much smaller wire diameters, such as diameters less than 100 microns, such as diameters between about 10 to 50 microns. For this reason, a larger capillary may be used for forming wiresthan used for forming wire bonds encapsulated within QFN packages.

150 112 154 112 112 110 150 152 112 112 154 152 112 110 152 152 154 150 110 In a wire bonding process, the wire is strung through the capillary of an automated bonder. The capillary tip is constructed by metal, such as steel or stainless steel. The automated bonder also includes cutter attached to cut the wire after making the bonding. For each of the wires, wire bonding includes attaching a first side of the wire to an associated one of surface contacts, forming an archextending beyond the exposed bottom surface of the surface contact, and attaching a second side of the wire to the associated surface contactof the adjacent package. While either wire ribbons or circular wires can be used, as depicted, wiresare circular wires. A first stitch bondA is created by pressure between the capillary tip and the attachment area of contacts, often combined with transmitting ultrasonic energy, in order to attach the wire to the underlying metal of the surface contact. For examples with wire ribbons rather than circular wires, the stich bonds may be referred to as ribbon bonds. After the attachment, the capillary with wire is lifted in a controlled loop to span an archfrom stich bondA, to an attachment area of a contactof an adjacent package. When the wire touches the attachment area surface, the capillary tip is pressed against the wire in order to flatten it and thus to form another stitch bondB. The capillary rises again and the cutter of the automated bonder severs the wire near the end of the second stitch bondB. In some examples, archesmay be ground simultaneously to ensure each of the wiresis in planar alignment to provide a standoff of the package.

252 263 252 200 265 265 154 250 250 212 252 265 112 263 112 210 265 112 110 112 110 252 265 250 210 265 265 210 164 110 The same techniques may be used to form stich bondsA,,B of strip assembly, although a third stitch bond is created before tearing such that each wire forms two archesA,B rather than a single arch. While either wire ribbons or circular wires can be used, as depicted, wiresare circular wires. For each of the wires, wire bonding includes attaching a first side of the wire to an associated one of surface contactswith a stich bondA, forming an archA extending beyond the exposed bottom surface of the surface contact, forming a second stich bondspanning the surface contactsof adjacent packages, forming a second archB extending beyond the exposed bottom surface of the adjacent surface contactof the adjacent packageand attaching a second side of the wire to the associated surface contactof the adjacent packagewith a third stitch bondB. In some examples, archesmay be ground simultaneously to ensure each of the wiresis in planar alignment to provide a standoff of the package. LoopsA,B of packagesmay improve dimensional stability compared to floating distal endof QFN packages.

110 100 308 150 8 FIG. For copper wire or other metal that would benefit from a plating layer, a tin coating may be applied to QFN packageseither as part of strip assemblyor after singulation (, step). For example, the tin coating may be applied by electroplating. Coating the wires and the exposed bottom surfaces of the surface contacts with the tin coating covers the exposed portions of the surface contacts with the tin coating, but not portions of the surface contacts covered by the mold compound. The tin coating may inhibit oxidation of the underlying metal, and improve solderability of wires.

150 110 100 310 108 116 150 110 100 150 154 164 150 200 263 250 210 265 212 8 FIG. 5 FIG. Following forming wires, packageis singulated from strip assembly(, step). Singulation includes cutting leadframe strip, mold compoundand wiresto separate each package. During singulation of strip assembly, each wireis cut through its archleaving a distal end() of each wirefree floating. Singulation of strip assemblyincludes cutting through stich bond, leaving both ends of each wireof each packageforming an archattached on both ends to a surface contact.

164 150 150 164 150 265 150 250 Following singulation, distal endsmay be bent into their final positions and/or ground simultaneously to provide a desired shape and/or ensure each of the wiresis in planar alignment to provide the standoff for the package. For example, while wireswith distal endsare depicted as J-shaped leads, wiresmay be bent into any desired final shape including, but not limited to S-shaped leads, and C-shaped leads. Likewise, archesmay be bent into their final positions and/or ground simultaneously to provide a desired shape. Bending may also ensure each of the wires,is in planar alignment to provide the standoff for its package.

110 210 The specific techniques for semiconductor packages including wires extending from surface contacts of the package, such as described with respect to packages,are merely illustrative of the general inventive concepts included in this disclosure as defined by the following claims. For example, while the disclosed examples refer to QFN devices with semiconductor dies, the disclosed techniques may be applied to any electronic package with a surface contact, including package configurations other the QFN, and/or electronic packages with any combination of active and passive components on a leadframe instead of or in addition to a semiconductor die.