Testing System and Method Thereof

Integrated circuits (ICs), as known as chips, are used in a wide range of electronic devices, including computers, smartphones, and televisions, to perform various functions. “Burn-in” is a process where semiconductor components are tested in order to detect any early failures due to defects in design, materials, process, or manufacturing. The burn-in boards (BIBs) are printed circuit boards designed to carry ICs when the ICs are tested in the burn-in process. Since testing boards can be easily inclined and/or collided during the process, the stability and efficiency of the transportation of testing boards is a critical issue in the field of IC industry.

Despite transporting inclined and/or collided testing boards can cause serious damages and inaccurate test results in the subsequent processes, in the past, only manpower visual inspection of the appearance of the testing boards has been done before they enter the production line. The problem with manpower visual inspection is that it avoids minor abnormalities from being caught, hence inevitably allows the occurrence of transporting abnormal testing boards. What is needed are methods and apparatus for auto-detecting the flatness of testing boards.

The invention provides a testing system that includes a board conveying device for holding a testing board, a board transfer chamber connecting with the board conveying device, in which board transfer chamber includes a first sensor configured to detect a flatness of the testing board, and an IC test chamber connecting with the board transfer chamber.

In some embodiments, the board transfer chamber of the testing system may have a second sensor for detecting the flatness of the testing board.

In some embodiments, the first sensor is configured to detect a first level of one end of the testing board and the second sensor is configured to detect a second level of another end of the testing board.

In some embodiments, the first sensor may be configured to generate a radiation downward to the testing board.

In some embodiments, the first sensor may be an infrared sensor.

In some embodiments, the testing system may also have a processor configured to determine the flatness of the testing board by calculating the difference between the first level and the second level.

In some embodiments, the testing system may have a plurality of layers in the board conveying device, a storage platform configured to support the testing board in the board transfer chamber, and a lifting device configured to move the storage platform along the plurality of layers of the board conveying device.

In some embodiments, the board transfer chamber may have a wall along one side of the storage platform, and the first sensor is fixed on the wall.

In some embodiments, the IC test chamber may have a pick-and-place mechanism configured to place a testing device on the testing board.

In some embodiments, the board transfer chamber may have a robot arm configured to drag the testing board from the board conveying device to the board transfer chamber.

A method of a testing system may have operations of moving a testing board from a board conveying device to a board transfer chamber, moving the testing board from the board transfer chamber to an IC test chamber, determining whether a flatness of the testing board is acceptable during moving the testing board, and placing a testing device on the testing board when the flatness of the testing board is determined as acceptable.

In some embodiments, determining whether the flatness of the testing board is acceptable when moving the testing board includes operations of sensing a first level of one end of the testing board and sensing a second level of another end of the testing board during moving the testing board, calculating the difference between the first level and the second level, and determining whether the difference falls within a pre-determined specification.

In some embodiments, sensing the first level of the one end of the testing board and sensing the second level of the another end of the testing board include emitting radiations, from the first sensor and the second sensor, toward one end and another end of the testing board, respectively, and receiving, by the first sensor and the second sensor, the radiations reflected by the testing board.

In some embodiments, the radiations may be emitted downward toward the testing board.

In some embodiments, the radiations may be infrared radiations.

In some embodiments, the radiations may be emitted toward a first support frame and a second support frame of the testing board, respectively.

In some embodiments, the first and second support frames may include substantially flat surfaces.

In some embodiments, determining whether the flatness of the testing board is acceptable during moving the testing board include sensing a first level of one end of the testing board and sensing a second level of another end of the testing board during moving the testing board, calculating a first difference between the first level and a reference level and a second difference between the first level and the reference level, and determining whether the first and second differences both fall within a pre-determined specification.

In some embodiments, the method also includes halting moving the testing board when the flatness of the testing board is determined as unacceptable.

In some embodiments, the method also includes displaying an abnormality warning signal when the flatness of the testing board is determined as unacceptable.

These and other features, aspects, and advantages of the present invention will become better understood with reference to the following description and appended claims.

It is to be understood that both the foregoing general description and the following detailed description are by examples, and are intended to provide further explanation of the invention as claimed.

Various example embodiments will be described more fully hereinafter with reference to the accompanying drawings, in which some example embodiments are shown. The present invention may, however, be embodied in many different forms and should not be construed as limited to the example embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. It is noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.

Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

As used herein, “around,” “about,” “approximately,” or “substantially” may generally mean within 20 percent, or within 10 percent, or within 5 percent of a given value or range. Numerical quantities given herein are approximate, meaning that the term “around,” “about,” “approximately,” or “substantially” can be inferred if not expressly stated. One skilled in the art will realize, however, that the values or ranges recited throughout the description are merely examples, and may be reduced or varied with the down-scaling of the integrated circuits.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

Example embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized example embodiments (and intermediate structures). As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, example embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and/or a gradient of implant concentration at its edges rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present invention.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Hereinafter, example embodiments will be explained in detail with reference to the accompanying drawings.

1 FIG.A 1 FIG.B is a schematic view of a testing system in accordance with some embodiments of the present disclosure.is a schematic cross-sectional view of a testing system in accordance with some embodiments of the present disclosure.

1 FIG.A 1 FIG.B 10 10 100 110 120 10 101 100 110 120 110 116 100 117 120 Referring toand, shown there is a testing system. The testing systemmay include a board conveying device, a board transfer chamber, and an IC test chamber. The testing systemis configured to carry the testing boardsfrom the board conveying deviceto the board transfer chamber, and to the IC test chamber. In some embodiments, the board transfer chamberhas an interfacefor receiving the board conveying device, and an interfaceconnecting with the IC test chamber.

100 101 100 102 102 102 102 102 101 101 In some embodiments, the board conveying devicecan be a trolley or other suitable conveying device with layer(s) of platforms to hold the testing boards. For example, in the depicted embodiments, the board conveying deviceincludes five layersA,B,C,D, andE of platforms for holding the testing boards, while more or less layers of platforms may also be applied in other embodiments. In some embodiments, the testing boardcan be a burn-in board (BIB), or other suitable test boards.

1 FIG.B 110 111 112 111 113 112 113 112 102 102 102 102 102 100 119 110 113 101 113 Referring to, the board transfer chambermay include a base platform, a lifting devicedisposed on the base platform, and a storage platformsupported by the lifting device. In some embodiments, the storage platformis movable, through the lifting device, along the vertical direction to different vertical layersA,B,C,D, andE of the board conveying device. A robot armin the board transfer chamberand near the storage platformcan grab a testing boardof a target layer onto the storage platform.

110 115 117 110 120 117 110 120 The board transfer chambermay include at least one sensor, such as a first sensorA, located near the interfacebetween the board transfer chamberand the IC test chamber. In some embodiments, the interfacecan be a gate between the board transfer chamberand the IC test chamber.

120 110 120 210 205 101 4 FIG.A 4 FIG.A The IC test chambermay be used to mount, load and unload, and test the incoming boards from board transfer chamber. In some embodiments, the IC test chambermay include a pick-and-place mechanism (e.g., pick-and-place mechanismin) to mount ICs (e.g., ICsin) or other testing devices to a testing board.

1 FIG.C 1 FIG.C 1 1 FIGS.A andB 101 is a schematic view of a testing board in accordance with some embodiments of the present disclosure.　Specifically,illustrates a detailed structure of the testing boardas discussed above in.

101 105 103 107 105 104 104 105 106 106 104 104 The testing boardmay include a main board, socketsand connectorson the main board, support framesA andB on opposite sides of the main board, and guiding membersA andB below the respective support framesA andB.

105 103 105 107 101 In some embodiments, the main boardmay be a printed wiring board. The socketsare electrically coupled to the main board and are configured to mount testing devices, such as ICs. The connectors may be configured to couple test and/or power signals between the testing boardand testing devices (not shown).

104 104 105 104 104 104 104 In some embodiments, the support framesA andB may be L-shaped frames connecting the two sides of the main board. For example, each of the support framesA andB may include a vertical portionV and a horizontal portionH connecting with each other.

106 106 104 104 104 106 106 101 113 104 104 106 106 104 104 106 106 1 FIG.D In some embodiments, the guiding membersA andB are disposed below and are in contact with the horizontal portionsH of the respective support framesA andB. The guiding membersA andB are configured to facilitate the smooth movement of the testing boardalong the storage platform(see). In some embodiments, the support framesA andB and the guiding membersA andB are made of different materials. For example, the support framesA andB may be made of metal, such as steel, stainless steel, or other suitable materials. In some embodiments, the guiding membersA andB may be made of wooden material or other suitable materials to reduce friction and create lubrication.

1 FIG.D 1 FIG.D 101 113 110 is a schematic view where a testing board is loaded into a board transfer chamber in accordance with some embodiments of the present disclosure. Specifically,illustrates a testing boarddragged onto the storage platformin the board transfer chamber.

113 114 114 113 113 101 113 106 106 114 114 106 106 114 114 In some embodiments, the storage platformmay include guiding railsA andB on two ends of the storage platformand protruding upward from the storage platform. For example, when a testing boardis dragged onto the storage platform, the guiding membersA andB are placed on the guiding railsA andB, respectively, such that the guiding membersA andB can be movable along the guiding railsA andB.

110 118 118 113 115 118 115 118 115 115 110 In some embodiments, the board transfer chamberfurther includes two wallsA andB built along the two end sides of the storage platform. In some embodiments, a first sensorA is attached to the wallA and a second sensorB is attached to the wallB. However, in other embodiments, the first sensorA and the second sensorB can be fixed at other suitable positions of the board transfer chamber.

115 115 101 101 115 115 115 115 101 101 101 The first and second sensorsA andB are configured to detect the levels of opposite ends of the testing board. For example, when the testing boardis moved to a position below the first and second sensorsA andB, the first and second sensorsA andB may generate radiations toward opposite ends of the testing boardand receive the reflected radiations from the testing board, so as to detect the levels of opposite ends of the testing board.

115 115 104 104 101 104 104 104 104 104 104 115 115 104 115 104 115 104 104 101 In some embodiments, the first and second sensorsA andB may generate radiations toward the support framesA andB of the testing board, respectively. More specifically, the radiations are generated toward the horizontal portionsH of the support framesA andB, respectively. The horizontal portionsH of the support framesA andB each may include a substantially flat top surface for reflecting the radiations back to the first and second sensorsA andB, respectively. Accordingly, a first distance between the support frameA and the first sensorA and a second distance between the support frameB and the second sensorB can be detected. In some embodiments, the first distance and the second distance may represent a first level and a second level of the support framesA andB, respectively. By calculating the difference between the first and second distances (or between the first and second levels), the flatness of the testing boardcan be therefore determined.

115 115 115 115 115 115 104 104 104 113 In some embodiments, the first and second sensorsA andB are infrared sensors that emit and receive infrared radiation. In some embodiments, the first and second sensorsA andB are configured to emit radiations downward. In some embodiments, the first and second sensorsA andB are configured to emit radiations toward the horizontal portionsH of the support framesA andB on the storage platform.

115 115 117 101 120 115 115 117 116 In some embodiments, the first and second sensorsA andB are built near the interfaceto monitor the latest flatness condition of the testing board, right before it enters the IC test chamber. That is, the first and second sensorsA andB may be closer to the interfacethan to the interface.

2 FIG. 3 FIG.A 3 FIG.B 4 FIG.A 4 FIG.B is a flow chart of methods of testing ICs in accordance with some embodiments of the present disclosure.is schematic cross-sectional view of a testing system where a testing board enters an IC test chamber in accordance with some embodiments of the present disclosure.is a schematic view of a testing board entering an IC test chamber in accordance with some embodiments of the present disclosure.is schematic cross-sectional view of a testing system where ICs are mounted on a testing board in accordance with some embodiments of the present disclosure.is a schematic view of a testing board mounted with ICs in an IC test chamber in accordance with some embodiments of the present disclosure.

10 10 10 10 100 200 300 301 302 303 400 500 600 2 FIG. 1 1 FIGS.A toD 1 1 3 3 4 4 FIGS.A toD,A,B,A andB 2 FIG. The testing method Mofcan be applied by the testing systemwith reference to, and the testing method Mwill be discussed in conjunction with. As illustrated in, a testing method Mmay include the following operations S, S, S, S, S, S, S, S, and S.

10 100 101 102 102 100 101 100 The method Mstarts from operation Sby placing a testing board on a board conveying device. In some embodiments, the testing boardscan be placed on different layers (e.g., layersA toE) of the board conveying devicethrough manpower. That is, the testing boardscan be manually placed on the board conveying device.

10 200 101 100 113 110 112 113 102 102 101 119 100 113 110 101 113 112 113 101 117 110 120 The method Mproceeds to operation Sby moving the testing board to a board transfer chamber. Specifically, the testing boardis moved from the board conveying deviceto a storage platformin the board transfer chamber. For example, the lifting devicemay move the storage platformalong the vertical direction to reach a target layer (e.g., one of the layersA toE). Then, the testing boardat the target layer can be dragged by a robot armor other suitable devices along the horizontal direction from the board conveying deviceto the storage platformin the board transfer chamber. Once the testing boardis moved onto the storage platform, the lifting devicecan move the storage platformagain to move the testing boardto a position near the interfacebetween the board transfer chamberand the IC test chamber.

10 300 101 110 120 101 120 119 113 The method Mproceeds to operation Sby moving the testing board to the IC test chamber. Specifically, the testing boardis moved from the board transfer chamberto an IC test chamber. In some embodiments, the testing boardcan be moved into the IC test chamberby the robot armor other robot arms (not shown) built near the storage platform.

10 301 101 101 101 115 115 101 115 115 115 115 300 101 3 3 FIGS.A andB 5 FIG. The method Mproceeds to operation Sby determining whether a flatness of the testing board is acceptable. Specifically, the flatness of the testing boardis determined during moving the testing board to the IC test chamber. As shown in, during the movement of the testing board, the testing boardmay pass through a position that is vertically below the first and second sensorsA andB. As the testing boardpasses through the first sensorA and the second sensorB, the results from the first sensorA and second sensorB are transmitted to a processor (e.g., processorin) and the flatness of the testing boardcan be calculated based on the sensing results.

101 115 115 115 101 115 101 101 For example, the levels of the opposite ends of the testing boardcan be sensed by the first and second sensorsA andB as discussed above. In detail, the first sensorA can sense a first level at one end of the testing board, and the second sensorB can sense a second level at the other end of the testing board. By comparing the difference between the first level and the second level, the flatness of the testing boardcan be determined.

101 101 101 When the difference between the first level and the second level falls within a pre-determined specification, the testing boardis determined to have an acceptable flatness, thus normal. On the other hand, when the difference between the first level and the second level is beyond the pre-determined specification, the testing boardis determined to have an unacceptable flatness, thus abnormal. In some embodiments, if the difference between the first level and the second level is larger than about 2 mm, the flatness of the testing boardis determined as unacceptable. In other embodiments, the pre-determined specification can also be about 1 mm to about 3 mm.

101 101 In other embodiments, the flatness of the testing boardis determined as acceptable when a first difference between the first level and a reference level and a second difference between the second level and the reference level are all within a pre-determined specification. On the other hand, the flatness of the testing boardis determined as unacceptable when any of the first difference or the second difference is beyond the pre-determined specification.

101 10 400 101 120 205 103 101 210 210 205 103 101 4 FIG.A 4 FIG.B If the flatness of the testing boardis determined as acceptable, the method Mproceeds to operation Sby placing a testing device on the testing board. As shown in, after the testing boardis moved into the IC test chamber, ICsare placed on socketsof testing boardthrough a pick-and-place mechanism. In some embodiments, the pick-and-place mechanismmay include a robot arm.illustrates an example where ICsare placed on the socketsof the testing board.

10 500 205 101 The method Mproceeds to operation Sby testing the testing device on the testing board. After the testing device has been placed on the testing board, the testing device is tested. In some embodiments, the ICson the testing boardare tested to detect any early failures due to defects in design, materials, process, or manufacturing.

205 101 101 205 101 101 In some embodiments, testing the ICson the testing boardincludes a pre-test and a main test. The pre-test is performed to test whether the electric connections between a control unit (such as a computer) and each of the testing boardare well connected, and to test whether the internal circuits well connect the ICson the testing board. When the electric connections and the internal circuits are well connected, the control unit determines the testing boardpassing the pre-test and performs the main test afterwards.

205 101 120 205 101 205 205 The main test is an aging test configured to detect early failures of the ICsunder stress. In the main test, the control unit is configured to transmit a test signals to the testing board. The control unit is further configured to control a temperature in the IC test chamber. The ICsare tested at different temperatures such as about 35, 90, 129, and −10° C. The control unit is configured to receive the test signals from the testing boardand determine a status of each of the ICs. The status includes a pass status or a failed status. The status of each of the ICsindicates whether the corresponded IC passes the main test.

10 600 205 101 Finally, the method Mproceeds to operation Sby removing the testing device from the testing board. Specifically, ICsare removed from the testing boardwhen the test finishes.

301 10 302 10 300 101 120 5 FIG. Referring back to operation S, on the other side, if the flatness of the testing board is determined as unacceptable, the method Mproceeds to Sby halting the movement of the testing board. Specifically, after determining the flatness of the testing board as unacceptable, the testing systemtransmits signals to the processor (e.g., processorin) to halt the abnormal testing boardfrom entering the IC test chamber.

101 120 400 5 FIG. In some embodiments, if the flatness of the testing board is determined as unacceptable, the processor stops the movement of the testing boardto prevent it from entering the IC test chamber, and displays an abnormality warning signal on a display device (e.g., display devicein).

10 303 101 10 101 10 100 Finally, the method Mproceeds to Sby removing the testing board from the testing system. In some embodiments, the testing boardcan be removed from the testing systemthrough manpower for troubleshooting. After troubleshooting is completed, the testing boardmay be placed back into the testing systemin operation S.

101 101 101 205 101 101 120 The unacceptable flatness of the testing boardmay be caused by the defective edges of the testing board. The unacceptable flatness of the testing boardmay lead to the skewing of its feedstock such as ICsin the subsequent processes such as mounting, loading and unloading, which may further cause other issues such as pre-test contact, over kill condition during the basic open/short verification process, or damage on device. The present disclosure provides a system and a method for monitoring the flatness of the testing boardsto avoid abnormal testing boardsentering the IC test chamber. Accordingly, the above issues can be addressed.

5 FIG. 2 FIG. 10 300 112 119 115 115 210 300 112 119 115 115 210 300 200 300 301 302 400 500 10 300 is a block diagram of a testing system in accordance with some embodiments of the present disclosure. The testing systemfurther includes a processorelectrically coupled with the lifting device, the robot arm, the first sensorA, the second sensorB, and the pick-and-place mechanism. The processormay be configured to conduct the operations of the lifting device, the robot arm, the first sensorA, the second sensorB, and the pick-and-place mechanismas discussed above. In some embodiments, the processormay also be configured to perform the operations S, S, S, S, S, and Sof the testing method Min. In some embodiments, the processorcan be a computer system which includes a central processing unit (CPU) , a memory , circuits for the CPU, or In and Out (I/O) device.

10 400 300 400 400 The testing systemfurther includes a display deviceconnecting with the processor. In some embodiments, the display devicecan be used to display the abnormality warning signal when the flatness of the test board is determined as unacceptable as discussed above. In some embodiments, the display devicemay include a monitor, a computer screen, or the like.

Although the present invention has been described in considerable detail with reference to certain embodiments thereof, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims.