Storage Device and Method of Operating the Same

The present application claims priority under 35 U.S.C. § 119 (a) to Korean patent application number 10-2024-0102630 filed on Aug. 1, 2024, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated by reference herein.

The present disclosure relates to an electronic device, and more particularly, to a storage device system and a method of operating the same.

A storage device is a device that stores data under control of a host device such as a computer or a smartphone. A storage device may include a memory device storing data and a controller controlling the memory device. Memory devices may be classified into volatile memory devices and nonvolatile memory devices.

Volatile memory devices are devices that store data only when power is supplied and lose stored data when the power supply is cut off. The volatile memory device may include a static random access memory (SRAM), a dynamic random access memory (DRAM), and the like.

Nonvolatile memory devices are devices that does not lose data even though power is cut off. The types of nonvolatile memory devices include a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory, and the like.

An embodiment of the present disclosure provides a storage device that efficiently manages a storage space and a method of operating the same.

According to an embodiment of the disclosure, a storage device may include a memory device and a controller. The memory device may include a storage area organized into a plurality of zones respectively corresponding to a plurality of logical address groups. The controller may control the memory device to exclude a source zone in which a data copy operation is performed according to a request of the host and to select a victim zone, from among the plurality of zones, satisfying a garbage collection trigger condition and to perform garbage collection for the victim zone.

According to an embodiment of the disclosure, a method of operating a storage device may include excluding a source zone in which a data copy operation is performed according to a request of a host among the plurality of zones and selecting a victim zone satisfying a garbage collection trigger condition from among a plurality of zones, which is a storage area respectively corresponding to logical address groups, and performing garbage collection for the victim zone.

According to an embodiment of the disclosure, a storage device system may include a storage device and a host. The storage device may include a plurality of zones which is a storage area respectively corresponding to logical address groups. The host may provide a data copy command to the storage device instructing copying data stored in a first zone from among the plurality of zones to a second zone. The storage device may perform a data copy operation in response to the data copy command, exclude the first zone and select a victim zone satisfying a garbage collection trigger condition based on an execution history of the data copy operation from among the plurality of zones, and perform garbage collection for the victim zone.

According to the present technology, a storage device that efficiently manages a storage space and a method of operating the same are provided.

Specific structural or functional descriptions of embodiments according to the concepts that are disclosed in the present specification or application are illustrated only to describe the embodiments according to the concepts of the present disclosure. The embodiments according to the concepts of the present disclosure may be carried out in various forms and are not limited to the embodiments described in the present specification or application.

1 FIG. is a drawing illustrating a storage device.

1 FIG. 50 300 50 Referring to, a storage device system (not shown) may include a storage deviceand a hostthat controls the storage device.

50 100 200 50 300 50 300 The storage devicemay include a memory deviceand a controller. The storage devicemay be a device that stores data under control of the hostsuch as a cellular phone, a smartphone, a laptop computer, a desktop computer, a game player, a smart TV, a tablet PC, or an in-vehicle infotainment system. In an embodiment, the storage devicemay be a device that is controlled by the hostthrough wired or wireless communication to store data in a remote position, such as a server or a data center.

50 300 50 50 The storage devicemay interface with the hostthrough various communication methods, and the storage devicemay be configured as various devices according to an interfacing method. For example, the storage devicemay be configured as one of various types of storage devices such as a solid state driver (SSD), an embedded multi-media card (eMMC), a secure digital card in a form of an SD, a mini-SD or a micro-SD, a universal serial bus (USB) storage device, a universal flash storage (UFS) device, a personal computer memory card international association (PCMCIA) card type storage device, a peripheral component interconnection (PCI) card type storage device, a PCI express (PCI-E) card type storage device, a compact flash (CF) card, and a smart media card.

50 50 In an embodiment, the storage devicemay be manufactured as any one of various types of packages. For example, the storage devicemay be manufactured as one of various types of package types, such as a package on package (POP), a system in package (SIP), a system on chip (SOC), a multi-chip package (MCP), a chip on board (COB), a wafer-level fabricated package (WFP), and a wafer-level stack package (WSP).

100 100 200 100 The memory devicemay store data. The memory devicemay operate in response to the control of the controller. The memory devicemay include a plurality of memory cells storing data. Each of the memory cells may be configured to store one data bit or a plurality of data bits.

The memory cells may be accessed in a predetermined size unit according to a type of the memory device. A unit in which the memory cells are accessed may vary for each operation. For example, a write operation (program operation) of storing data in the memory cell, a read operation of sensing data stored in the memory cell, and an erase operation of erasing data stored in the memory cell may be accessed in different size units.

100 In an embodiment, the memory devicemay be a double data rate synchronous dynamic random access memory (DDR SDRAM), a low power double data rate4 (LPDDR4) SDRAM, a graphics double data rate (GDDR) SDRAM, a low power DDR (LPDDR), a Rambus dynamic random access memory (RDRAM), a NAND flash memory, a vertical NAND flash memory, a NOR flash memory, a resistive random access memory (RRAM), a phase-change memory (PCM), a magnetoresistive random access memory (MRAM), a ferroelectric random access memory (FRAM), or a spin transfer torque random access memory (STT-RAM).

100 200 100 100 100 100 100 The memory devicemay be configured to receive a command and an address from the controllerand access a region selected by an address in the memory cell array. The memory devicemay perform an operation instructed by the command on the region selected by the address. For example, the memory devicemay perform a write operation (program operation), a read operation, and an erase operation. During the program operation, the memory devicemay record data in the region selected by the address. During the read operation, the memory devicemay sense or read data from the region selected by the address. During the erase operation, the memory devicemay erase data stored in the region selected by the address.

200 50 The controllermay control an overall operation of the storage device.

50 200 50 300 100 100 When power is applied to the storage device, the controllermay execute firmware (FW). The storage devicemay convert a logical block address (LBA) provided by the hostinto a physical block address (PBA) used by the memory device. The LBA may be an address for identifying data provided by the host. The PBA may be an address indicating a position where data is stored in the memory device. In the present specification, the LBA may have the same meaning as a logical address, and the PBA may have the same meaning as a physical address.

200 100 300 200 100 200 100 200 100 The controllermay control the memory deviceto perform the write operation, the read operation, the erase operation, or the like according to a request of the host. During the write operation, the controllermay provide a write command (program command), an address, and data to the memory device. During the read operation, the controllermay provide a read command and an address to the memory device. During the erase operation, the controllermay provide an erase command and an address to the memory device.

100 50 300 300 50 The memory deviceincluded in the storage devicemay be managed as a plurality of zones. The plurality of zones may be areas managed and controlled by the host. The hostmay control the storage deviceso that data of the same type to be stored and a source of data generation are stored in the same zone.

300 50 50 300 300 For example, the hostmay store data in the storage deviceor request data stored in the storage deviceaccording to the logical address. The logical addresses used by the hostmay be logical addresses of a preset range. The hostmay manage the logical addresses by dividing the logical addresses into a plurality of address groups, and may manage the logical addresses so that data corresponding to each address group is included in the same zone. That is, the plurality of zones may be managed to store data of corresponding address groups, respectively.

200 100 50 200 100 100 In an embodiment, the controllermay control the memory deviceto perform various background operations so that data of the storage devicemay be efficiently managed. For example, the controllermay control the memory deviceto perform a garbage collection operation in order to increase the number of available free blocks for data storage from among memory blocks included in the memory device.

200 50 200 100 In an embodiment, the controllermay include an error correction code (ECC) circuit (not shown). Alternatively, the ECC circuit may be included in the storage deviceas a chip or device separated from the controller. The ECC circuit (not shown) may detect and correct errors included in data obtained through the read operation from a memory die included in the memory device. In an embodiment, the number of bits that the ECC circuit may correct may be limited.

100 300 In an embodiment, the memory devicemay include a plurality of zones, which organizes a storage area respectively corresponding to logical address groups provided from the host.

200 200 300 200 100 The controllermay select candidate zones satisfying a garbage collection trigger condition from among the plurality of zones. The controllermay exclude source zones in which a data copy operation is performed according to a request of the hostand may select victim zones from among the candidate zones. The controllermay control the memory deviceto perform garbage collection for the victim zones.

200 210 220 220 221 222 In an embodiment, the controllermay include a garbage collection controllerand a main memory. The main memorymay store a garbage collection candidate tableand a copy history table.

210 222 210 221 210 100 The garbage collection controllermay identify the source zones based on at least one history information including the most recent history information from among history information included in the copy history table. The garbage collection controllermay identify the source zones based on the logical address and may select zones, while excluding the source zones, from among the candidate zones as the victim zones by referring to the garbage collection candidate table. The garbage collection controllermay control the memory deviceto perform garbage collection by copying valid data stored in the victim zones to a target zone.

221 The garbage collection candidate tablemay include a list of the candidate zones satisfying the garbage collection trigger condition. The garbage collection trigger condition may include a read reclaim condition, where a zone of which a read count is greater than or equal to a critical read count is selected as the candidate zone, a wear-leveling condition selecting a zone of which an erase and write count is greater than or equal to a critical erase and write count as the candidate zone, and a sudden power off recovery condition selecting the candidate zones based on whether data migration due to a sudden power off is performed.

222 300 The copy history tablemay include history information on which data copy operations is performed according to the request of the host. Each history information may include a sequence number in which the data copy operation is performed, a source logical address and a length where copy data is stored, and a target logical address where the copy data is to be stored.

300 310 50 310 310 300 The hostmay include a file systemfor managing the storage space of the storage device. The file systemmay access the plurality of zones based on information on logical addresses corresponding to the plurality of zones. The file systemmay perform garbage collection of copying valid pages included in a zone, where data fragmentation is generated, to a new zone. The garbage collection may be referred to as host garbage collection since the garbage collection is performed under the control of the host.

310 50 310 310 50 310 50 The host garbage collection may be performed by the following methods. In a first method, the file systemmay read data by providing a read command, for data stored at the logical address of the victim zone, to the storage device. The file systemmay write data by providing a write command for the data to the logical address of the source zone. At this time, the file systemmay provide a command including information on the victim zone to the storage device. In a second method, the file systemmay perform garbage collection by providing a data copy command including the source logical address, the length of the logical address where data is stored, and the target logical address to the storage device. In an embodiment, the data copy command may be a small computer system interface (SCSI) copy command.

50 50 The storage devicemay write data stored in the source logical address to the target logical address in response to the data copy command. The storage devicemay identify a zone corresponding to the source logical address as the victim zone where the host garbage collection is performed using the history of the data copy command.

2 FIG. 1 FIG. is a diagram illustrating a memory device of.

2 FIG. 100 110 120 130 140 150 Referring to, a memory devicemay include a memory cell array, a voltage generator, an address decoder, an input/output circuit, and a control logic.

110 1 1 130 1 140 The memory cell arraymay include a plurality of memory blocks BLKto BLKi. The plurality of memory blocks BLKto BLKi are connected to the address decoderthrough row lines RL. The plurality of memory blocks BLKto BLKi may be connected to the input/output circuitthrough column lines CL. In an embodiment, the row lines RL may include word lines, source select lines, and drain select lines. In an embodiment, the column lines CL may include bit lines.

1 1 Each of the plurality of memory blocks BLKto BLKi includes a plurality of memory cells. In an embodiment, the plurality of memory cells may be nonvolatile memory cells. Among the plurality of memory cells, memory cells connected to the same word line may be defined as one page. That is, each of the memory blocks BLKto BLKi may include a plurality of pages.

110 Each of the memory cells included in the memory cell arraymay be configured as a single level cell (SLC) that stores one data bit, a multi-level cell (MLC) that stores two data bits, a triple level cell (TLC) that stores three data bits, or a quad level cell (QLC) capable of storing four data bits.

1 300 1 1 FIG. In an embodiment, the plurality of memory blocks BLKto BLKi may be allocated to the plurality of zones managed by the hostdescribed with reference to, respectively. In an embodiment, a portion of the plurality of memory blocks BLKto BLKi may include a zone area allocated to the plurality of zones and a normal area that is not managed by the plurality of zones.

120 130 140 110 150 110 In an embodiment, the voltage generator, the address decoder, and the input/output circuitmay be collectively referred to as a peripheral circuit. The peripheral circuit may drive the memory cell arrayunder control of the control logic. The peripheral circuit may drive the memory cell arrayto perform the write operation (program operation), the read operation, and the erase operation.

120 100 120 150 120 120 100 The voltage generatoris configured to generate a plurality of operation voltages using an external power voltage supplied to the memory device. The voltage generatoroperates in response to the control of the control logic. In an embodiment, the voltage generatormay generate an internal power voltage by regulating the external power voltage. The internal power voltage generated by the voltage generatormay be used as an operation voltage of the memory device.

120 120 100 120 In an embodiment, the voltage generatormay generate the plurality of operation voltages using an external power voltage or an internal power voltage. The voltage generatormay be configured to generate various voltages required in the memory device. For example, the voltage generatormay generate a plurality of erase voltages, a plurality of program voltages, a plurality of pass voltages, a plurality of selected read voltages, and a plurality of unselected read voltages.

120 150 The voltage generatormay include a plurality of pumping capacitors that receive internal power voltage to generate the plurality of operation voltages having various voltage levels, and may generate a plurality of operation voltages by selectively activating the plurality of pumping capacitors in response to the control of the control logic.

110 130 The generated plurality of operation voltages may be supplied to the memory cell arrayby the address decoder.

130 110 130 150 130 150 130 130 1 130 130 130 140 110 The address decoderis connected to the memory cell arraythrough the row lines RL. The address decodermay be configured to operate in response to the control of the control logic. The address decodermay receive an address ADDR from the control logic. The address decodermay decode a block address among the received addresses ADDR. The address decodermay select at least one memory block among the memory blocks BLKto BLKi according to the decoded block address. The address decodermay decode a row address among the received addresses ADDR. The address decodermay select at least one word line among word lines of a selected memory block according to the decoded row address. In an embodiment, the address decodermay decode a column address among the received addresses ADDR. The input/output circuitand the memory cell arraymay be connected to each other according to the decoded column address.

130 For example, the address decodermay include components such as a row decoder, a column decoder, and an address buffer.

140 110 The input/output circuitmay include a plurality of page buffers (not shown). The plurality of page buffers may be connected to the memory cell arraythrough bit lines. During the write operation (program operation), data may be stored in selected memory cells according to data stored in the plurality of page buffers. During the read operation, the data stored in the selected memory cells may be sensed through the bit lines, and the sensed data may be stored in the page buffers.

150 130 120 140 The control logicmay control the address decoder, the voltage generator, and the input/output circuit.

150 150 The control logicmay operate in response to the command CMD transmitted from an external device. The control logicmay generate control signals in response to the command CMD and the address ADDR to control the peripheral circuits.

3 FIG. is a drawing illustrating a super block according to an embodiment of the disclosure.

3 FIG. 1 4 1 Referring to, each of a plurality of memory dies Dieto Diemay include a plurality of memory blocks BLKto BLKi. The memory blocks included in each memory die may configure a super block. The super block may be managed as a unit that configures one storage area.

1 1 2 2 For example, a first super block SBmay include the first memory block BLKincluded in each memory die. A second super block SBmay include the second memory block BLKincluded in each memory die. In a similar method, an i-th super block SBi may include the i-th memory block BLKi included in each memory die.

4 FIG. is a diagram illustrating an embodiment of managing a storage space of a storage device and a copy operation according to an embodiment of the disclosure.

1 4 FIGS.and 300 50 Referring to, a hostmay manage a storage space of a storage deviceas a plurality of zones. A zone may be a storage area where sequential writing is performed. Therefore, write data corresponding to) successive logical addresses may be stored in a zone, and data may be managed with a block mapping method. The plurality of zones may be mapped one-to-one to a plurality of logical address groups in which the successive logical addresses are grouped.

300 50 1 6 300 0 0 0 1 6 4 FIG. For example, the hostmay manage the storage space of the storage deviceby dividing the storage space into first to sixth zones Zoneto Zone. The number of zones is not limited to the present embodiment. In, a logical address provided by the hostmay be selected among a 0-th logical address LBAto an n-th logical address LBAn. Each of the 0-th logical address to n-th logical address LBAto LBAn may be divided into the plurality of logical address groups. For example, the 0-th logical address to the n-th logical address LBAto LBAn may be grouped into first to sixth logical address groups LBA Group 1 to LBA Group 6. The number of logical addresses included in each logical address group may be the same. The first to sixth zones Zoneto Zonemay be mapped to the first to sixth logical address groups LBA Group 1 to LBA Group 6, respectively.

3 4 FIGS.and Referring to, a zone may correspond to at least one memory block. In an embodiment, a zone may correspond to a super block on a one-to-one basis. A size of a physical storage space corresponding to the zone is not limited to examples of the present embodiment.

300 50 The hostmay provide a data copy command instructing copying data stored in a source zone, from among the plurality of zones, to the target zone in the storage device. The data copy command may include the source logical address and the length from where the copy data is stored and the target logical address where the copy data is to be stored.

4 FIG. 50 2 In, the storage devicemay copy data stored in the source logical address Source LBA of the second zone Zone, which is the source zone, to a logical address according to the data length and store the data in the target logical address Target LBA of the fourth zone, which is the target zone, in response to the data copy command.

5 FIG. is a diagram illustrating an example in which host garbage collection and device garbage collection overlap.

5 FIG. Referring to, garbage collection may be an operation of migrating valid data stored in a victim zone, from among a plurality of zones, to a target zone. The garbage collection may be divided into host garbage collection performed according to the request of a host and device garbage collection performed according to a trigger condition that exists in a storage device.

The host garbage collection may be an operation performed by the host of copying data, of a valid page included in a zone where data fragmentation is generated, to a new zone.

The device garbage collection may be an operation by the storage device of copying data, of a valid page included in the victim zone selected from among the candidate zones that satisfy the garbage collection trigger condition, to a new zone. The garbage collection trigger condition may include a read reclaim condition that selects the candidate zones based on a read count, a wear-leveling condition that selects the candidate zones based on an erase and write count, and a sudden power off recovery condition that selects the candidate zones based on whether data migration due to a sudden power off is performed.

5 FIG. 2 2 4 6 2 4 6 In, a second zone Zonemay overlap as a victim zone of both of a device garbage collection and a host garbage collection. In this case, valid data stored in the second zone Zonemay be copied to the fourth zone Zonein the host garbage collection and may be copied to the sixth zone Zonein the device garbage collection. Thus, the valid data stored in the second zone Zonemay be duplicated and copied to the fourth zone Zoneand the sixth zone Zone, thereby reducing efficiency of the storage space of the storage device.

6 FIG. Therefore, an embodiment for preventing an overlap between the victim zone of the device garbage collection and the victim zone of the host garbage collection is described with reference tobelow.

6 FIG. is a diagram illustrating a process of selecting a victim zone when performing device garbage collection according to an embodiment of the disclosure.

6 FIG. 5 FIG. 221 Referring to, a garbage collection candidate tablemay include a list of candidate zones satisfying a device garbage collection trigger condition described with reference to.

222 A copy history tablemay include a history information about which data copy operation is performed. Each history may include a sequence number in which the data copy operation is performed, the source logical address where the copy data is stored, the data length, and the target logical address where the copy data is to be stored.

6 FIG. 221 2 5 6 In, when referring to the garbage collection candidate table, the candidate zones satisfying the garbage collection trigger condition may be the second, fifth, and sixth zones Zone, Zone, and Zone.

6 FIG. 222 3 5 210 400 1 3 0 250 2 4 150 350 In, in the execution history of K−2 to K-th data copy operations among the history information stored in the copy history table, a data copy operation of a (K−2)-th sequence number is an operation of copying valid data stored from the third zone Zoneto the fifth zone Zone(LBAto LBA). In addition, a data copy operation of a (K−1)-th sequence number is an operation of copying valid data stored in the first zone Zoneto the third zone Zone(LBAto LBA). Furthermore, a data copy operation of a K-th sequence number is an operation of copying valid data stored in the second zone Zoneto the fourth zone Zone(LBAto LBA).

222 1 3 When examining three histories including the most recent history from among the history information stored in the copy history table, the source zones of the data copy operation may be the first to third zones Zoneto Zone.

2 5 6 5 6 1 3 From among the second, fifth, and sixth zones Zone, Zone, and Zone, which are candidate zones of the device garbage collection, the storage device may select the fifth and sixth zones Zoneand Zone, while excluding the first to third zones Zoneto Zonewhich are the source zones of the data copy operation, as the victim zones of the device garbage collection.

6 FIG. Through the embodiments described with reference to, the overlap of the victim zone of a host garbage collection and the victim zone of a device garbage collection may be prevented.

7 FIG. is a flowchart illustrating an operation of a storage device according to an embodiment of the disclosure.

7 FIG. 701 Referring to, in step S, a storage device may exclude a source zone where a data copy operation according to a host request is performed, and may select a victim zone satisfying a garbage collection trigger condition from among a plurality of zones.

The garbage collection trigger condition may include a read reclaim condition that selects a victim zone based on a read count, a wear-leveling condition that selects a victim zone based on an erase and write count, and a sudden power off recovery condition that selects a victim zone based on whether data migration due to sudden power off is performed. The storage device may identify the source zone where the data copy operation is performed using a copy history table.

701 701 701 a b. In an embodiment, step Smay be executed as step Sor step S

701 801 803 a Step Smay include steps Sand S.

801 In step S, the storage device may exclude a source zone and select a remaining zone from among a plurality of zones.

803 In step S, the storage device may select a victim zone satisfying a garbage collection trigger condition from among the remaining zones.

701 805 807 b Step Smay include steps Sand S.

805 In step S, the storage device may select a candidate zone satisfying the garbage collection trigger condition from among a plurality of zones.

807 In step S, the storage device may exclude the source zone and select the victim zone from among the candidate zones.

703 In step S, the storage device may perform device garbage collection for the selected victim zone.