A wearable device may include a display including a driving layer formed on a silicon substrate and a light-emitting layer on the driving layer. The wearable device may comprise at least one processor, comprising processing circuitry. The display may be configured to receive information about an image from the processor through the driving layer. The display may be configured to use each of first bit sequences to cause each of first light-emitting elements in the light-emitting layer to emit light according to a pulse width modulation (PWM) technique, wherein the first light-emitting elements ensure displaying of a first portion of the image to be recognized by foveal vision of a user wearing the wearable device. The display may be configured to use each of second bit sequences to cause each of second light-emitting elements in the light-emitting layer to emit light according to the PWM technique, wherein the second light-emitting elements ensure displaying of a second portion of the image to be recognized by peripheral vision of the user.
Legal claims defining the scope of protection, as filed with the USPTO.
a display including a driving layer formed at a silicon substrate, and an emission layer on the driving layer; and at least one processor comprising processing circuitry, wherein the display is configured to: receive, from the at least one processor, via the driving layer, information regarding an image; using each of first bit sequences, control, in accordance with a pulse width modulation (PWM) scheme, each of first light emission elements in the emission layer to emit light for displaying of a first portion of the image identified in accordance with a gaze of a user wearing the wearable device; using each of second bit sequences, control, in accordance with the PWM scheme, each of second light emission elements in the emission layer to emit light for displaying of a second portion of the image around the first portion of the image; and based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, display the image, wherein a bit depth of each of the first bit sequences is greater than a bit depth of each of the second bit sequences. . A wearable device comprising:
claim 1 a plurality of light emission elements including the first and second light emission elements; and a plurality of memory cells respectively connected to the plurality of light emission elements, and wherein the display is configured to: store, in each of the plurality of memory cells, each of a plurality of bit sequences obtained from the information received from the at least one processor; obtain each of the plurality of bit sequences from each of the plurality of memory cells; obtain each of the first bit sequences by adding one or more bits to each of bit sequences of a first set obtained from a portion of the plurality of memory cells respectively connected to the first light emission elements; obtain each of the second bit sequences by bypassing adding the one or more bits to each of bit sequences of a second set obtained from another portion of the plurality of memory cells respectively connected to the second light emission elements; using each of the first bit sequences, control each of the first light emission elements to emit light; and using each of the second bit sequences, control each of the second light emission elements to emit light. . The wearable device of, wherein the display includes:
claim 2 . The wearable device of, wherein the one or more bits in each of the first bit sequences are positioned behind the least significant bit (LSB) of each of the bit sequences of the first set.
claim 2 . The wearable device of, wherein the one or more bits in each of the first bit sequences are positioned in front of the most significant bit (MSB) of each of the bit sequences of the first set.
claim 2 wherein the display is configured to: by providing each of the first bit sequences to the circuitry connected to each of the first light emission elements, control each of the first light emission elements to emit light; and by providing each of the second bit sequences to the circuitry connected to each of the second light emission elements, control each of the second light emission elements to emit light. . The wearable device of, wherein each of the plurality of light emission elements is respectively connected to each of the plurality of memory cells through circuitry configured for pulse width modulation, and
claim 2 wherein the one or more bits are obtained from the memory, and wherein a size of each of the first bit sequences is greater than a maximum storage size of each of the plurality of memory cells. . The wearable device of, wherein the display further includes memory different from the plurality of memory cells,
claim 1 a plurality of light emission elements including the first and second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells, wherein memory cells of a first set respectively connected to the first light emission elements from among the plurality of memory cells are used to obtain each of the first bit sequences in conjunction with the memory, wherein memory cells of a second set respectively connected to the second light emission elements from among the plurality of memory cells are used to obtain each of the second bit sequences, and wherein the memory is used to obtain each of the first bit sequences from among the first bit sequences and the second bit sequences. . The wearable device of, wherein the display includes:
claim 1 a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells, wherein the plurality of memory cells includes memory cells of a first set respectively connected to the first light emission elements, and memory cells of a second set respectively connected to the second light emission elements, and wherein the display is configured to: obtain the first bit sequences by adding one or more bits obtained from the memory to each of bit sequences of a first set respectively obtained from the memory cells of the first set, and control each of the first light emission elements to emit light using each of the first bit sequences; and obtain, as the second bit sequences, bit sequences of a second set respectively obtained from the memory cells of the second set, and control each of the second light emission elements to emit light using each of the second bit sequences. . The wearable device of, wherein the display includes:
claim 1 a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells, and wherein the display is configured to: obtain a plurality of bit sequences from the information received from the at least one processor; by adding one or more bits to each of bit sequences of a first set to be stored in a portion of the plurality of memory cells respectively connected to the first light emission elements from among the plurality of bit sequences, obtain each of first bit sequences; obtain, as the second bit sequences, bit sequences of a second set to be stored in another portion of the plurality of memory cells respectively connected to the second light emission elements from among the plurality of bit sequences; store, in the memory, the one or more bits which are a portion of each of the first bit sequences; store, in each of memory cells of a first set which is the portion of the plurality of memory cells, each of the bit sequences of the first set which is a remaining portion of each of the first bit sequences; store, in each of memory cells of a second set which is the another portion of the plurality of memory cells, each of the second bit sequences; control each of the first light emission elements, to emit light using each of the first bit sequences obtained by adding the one or more bits obtained from the memory to each of the bit sequences of the first set obtained from each of the memory cells of the first set; and control each of the second light emission elements, to emit light using each of the second bit sequences obtained from each of the memory cells of the second set. . The wearable device of, wherein the display includes:
claim 1 a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells, and wherein the display is configured to: obtain, from the information received from the at least one processor, a plurality of bit sequences including the first bit sequences and the second bit sequences; store, in the memory, a portion of each of the first bit sequences; store, in each of memory cells of a first set which is a portion of the plurality of memory cells respectively connected to the first light emission elements, a remaining portion of each of the first bit sequences; store, in each of memory cells of a second set which is another portion of the plurality of memory cells respectively connected to the second light emission elements, each of the second bit sequences; control each of the first light emission elements, to emit light using each of the first bit sequences obtained by adding the portion of each of the first bit sequences obtained from the memory to the remaining portion of each of the first bit sequences obtained from each of the memory cells of the first set; and control each of the second light emission elements, to emit light using each of the second bit sequences obtained from each of the memory cells of the second set. . The wearable device of, wherein the display includes:
claim 1 a plurality of light emission elements including the first light emission elements and the second light emission elements, and a plurality of memory cells respectively connected to the plurality of light emission elements, and wherein the display is configured to: obtain, from the information received from the at least one processor, a plurality of bit sequences; identify bit sequences of a first set and bit sequences of a second set from among the plurality of bit sequences; in memory cells of a first set which are a portion of the plurality of memory cells respectively connected to the first light emission elements, respectively store, as the first bit sequences, the bit sequences of the first set; in memory cells of a second set which are another portion of the plurality of memory cells respectively connected to the second light emission elements, respectively store the second bit sequences obtained by removing one or more bits from each of the bit sequences of the second set; control each of the first light emission elements, to emit light using each of the first bit sequences obtained from each of the memory cells of the first set; and control each of the second light emission elements, to emit light using each of the second bit sequences obtained from each of the memory cells of the second set. . The wearable device of, wherein the display includes:
claim 1 at least one camera facing an eye of a user, and wherein the first portion is identified based on a position of a gaze of the user identified from images obtained through the at least one camera. . The wearable device of, further comprising:
claim 1 a rechargeable battery, and wherein the display is configured to: based on a remaining capacity of the battery being less than a reference capacity, display the image, by controlling each of the first light emission elements to emit light in accordance with the PWM scheme using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of the second bit sequences; and based on the remaining capacity being greater than or equal to the reference capacity, display the image, by controlling each of the first light emission elements in accordance with the PWM scheme to emit light using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of third bit sequences, wherein the third bit sequences have a bit depth equal to the bit depth of each of the first bit sequences. . The wearable device of, further comprising:
claim 1 . The wearable device of, wherein the display is further configured to identify the first portion from the information.
claim 14 . The wearable device of, wherein the information includes data for identifying the first portion outside an area for the image displayed on the display.
claim 1 based on a brightness level of a portion of an environment around the wearable device provided together with the image being lower than a reference brightness level, display the image, by controlling each of the first light emission elements to emit light in accordance with the PWM scheme using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of the second bit sequences; based on the brightness level being greater than the reference brightness level, display the image, by controlling each of the first light emission elements to emit light in accordance with the PWM scheme using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of third bit sequences having a bit depth equal to the bit depth of each of the first bit sequences. . The wearable device of, wherein the display is configured to:
claim 1 wherein the second portion is a portion of an image configured to be recognized by a peripheral vision of the user. . The wearable device of, wherein the first portion is a portion of an image configured to be recognized by a foveal vision of the user, and
receiving, from at least one processor, information regarding an image; using each of first bit sequences, controlling in accordance with a pulse width modulation (PWM) scheme, each of first light emission elements in an emission layer of the display of the wearable device to emit light for displaying of a first portion of the image identified in accordance with a gaze of a user wearing the wearable device; using each of second bit sequences, controlling, in accordance with the PWM scheme, each of second light emission elements in the emission layer to emit light for displaying of a second portion of the image around the first portion of the image; and based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, displaying the image, wherein a bit depth of each of the first bit sequences is greater than a bit depth of each of the second bit sequences. . A method of operating a display of a wearable device including at least one processor, comprising:
claim 18 . The method of, wherein the first portion is identified based on a position of a gaze of the user identified from images obtained through at least one camera of the wearable device facing an eye of the user.
claim 18 based on a remaining capacity of a rechargeable battery of the wearable device being less than a reference capacity, displaying the image, by controlling each of the first light emission elements to emit light in accordance with the PWM scheme using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of the second bit sequences; and based on the remaining capacity being greater than or equal to the reference capacity, display the image, controlling each of the first light emission elements to emit light in accordance with the PWM scheme using each of the first bit sequences and controlling each of the second light emission elements to emit light in accordance with the PWM scheme using each of third bit sequences having third bit sequences have a bit depth equal to the bit depth of each of the first bit sequences. . The method of, comprising:
Complete technical specification and implementation details from the patent document.
This application is a continuation of International Application No. PCT/KR2024/003369 designating the United States, filed on Mar. 18, 2024, in the Korean Intellectual Property Receiving Office and claiming priority to Korean Patent Application Nos. 10-2023-0060735, filed on May 10, 2023, and 10-2023-0076447, filed on Jun. 14, 2023, in the Korean Intellectual Property Office, the disclosures of each of which are incorporated by reference herein in their entireties.
The disclosure relates to a wearable device and a method for displaying an image based on bit sequences having different bit depths.
A wearable device may be used to provide an augmented reality (AR) service, a virtual reality (VR) service, a mixed reality (MR) service, or an extended reality (XR) service. For example, the wearable device may include a display positioned relatively close in front of an eye of a user. For example, the display may have a relatively narrow size. For example, in order to provide a relatively high resolution, the display may include a driving layer formed on a silicon substrate and an emission layer positioned on the driving layer and including a plurality of light emission elements.
The above-described information may be provided as a related art for the purpose of helping to understand the present disclosure. No assertion or determination is raised as to whether any of the above-described information may be applied as a prior art related to the present disclosure.
According to an example embodiment, a wearable device is provided. The wearable device may comprise a display including a driving layer formed at a silicon substrate, and an emission layer on the driving layer. The wearable device may comprise at least one processor, comprising processing circuitry. The display may be configured to receive, from the processor, via the driving layer, information regarding an image. The display may be configured to, using each of first bit sequences, emit, in accordance with a pulse width modulation (PWM) scheme, light via each of first light emission elements in the emission layer for displaying of a first portion of the image identified in accordance with a gaze of a user wearing the wearable device. The display may be configured to, using each of second bit sequences, emit, in accordance with the PWM scheme, light via each of second light emission elements in the emission layer for displaying of a second portion of the image around the first portion of the image. The display may be configured to, based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, display the image. A bit depth of each of the first bit sequences may be greater than a bit depth of each of the second bit sequences.
According to an example embodiment, a method is provided. The method may be executed by a display of a wearable device including at least one processor, comprising processing circuitry. The method may comprise: receiving, from the at least one processor, information regarding an image. The method may comprise, using each of first bit sequences, emitting, in accordance with a pulse width modulation (PWM) scheme, light via each of first light emission elements in an emission layer of the display of the wearable device used for displaying of a first portion of the image identified in accordance with a gaze of a user wearing the wearable device. The method may comprise, using each of second bit sequences, emitting, in accordance with the PWM scheme, light via each of second light emission elements in the emission layer for displaying of a second portion of the image around the first portion of the image. The method may comprise, based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, displaying the image. A bit depth of each of the first bit sequences may be greater than a bit depth of each of the second bit sequences.
1 FIG. A wearable device may be used to provide an augmented reality (AR) service, a virtual reality (VR) service, a mixed reality (MR) service, and/or an extended reality (XR) service. For example, the wearable device may be an AR glass, a video see through (VST) device, or a VR device, and may be worn on a body part (e.g., head and/or face) of a user. The wearable device may include a display positioned in front of an eye of the user when worn by the user. For example, the display may be used to display an image (or content) for the AR service, the VR service, the MR service, and/or the XR service. For example, since the wearable device is worn on the body part of the user, operations of the display for reducing power consumed by displaying the image may be executed within the wearable device. The wearable device may include components for the execution of the operations. Example components and configurations are illustrated in greater detail below in the description of.
1 FIG. is a block diagram illustrating an example configuration of an example wearable device according to various embodiments.
1 FIG. 100 110 120 Referring to, a wearable devicemay include a processor (e.g., including processing circuitry)and a display.
110 820 120 110 120 110 120 8 FIG. For example, the processormay include various processing circuitry (described in greater detail below with reference to the processorin) and may be used to generate, obtain, and/or render an image, a screen, and/or content to be displayed on the display. For example, the processormay provide and/or transmit, to the display, the image, the screen, and/or the content. For example, the processormay provide and/or transmit, to the display, data, information, a signal, a command, and/or an instructionfor processing related to the image, the screen, and/or the content. As a non-limiting example, the data, the information, the signal, the command, and/or the instruction may indicate a portion (e.g., a first portion of an image to be illustrated below) of the image having a visual characteristic different from that of another portion (e.g., a second portion of an image to be illustrated below) of the image. For example, the data, the information, the signal, the command, and/or the instruction may include address information of the portion of the images.
110 820 820 110 120 110 120 110 120 112 112 120 110 112 110 120 120 110 110 120 8 FIG. 8 FIG. For example, the processormay include at least a portion of the processorof, or may correspond to at least a portion of the processorof. For example, the processormay be operably (or operatively) coupled to the display. For example, the processorbeing operably coupled to the displaymay indicate that the processoris connected to the displaythrough an interface. For example, the interfacemay include various circuitry or circuit elements and be used to transmit, to display, the image, the screen, the content, the data, the information, the signal, the command, and/or the instruction transmitted from the processor. As a non-limiting example, the interfacemay include a mobile industry processor interface (MIPI). For example, the processorbeing operably coupled to the displaymay indicate that the displayis controlled by the processor. As a non-limiting example, the processormay control the display, based on a video mode of a display serial interface (DSI).
120 120 For example, the displaymay be used to display the image, the screen, and/or the content. For example, the image, the screen, and/or the content may be displayed according to processing of the displayexecuted based on the data, the information, the signal, the command, and/or the instruction.
120 100 120 120 120 120 120 For example, the displaymay include a display area positioned in front of an eye of a user when the wearable deviceis worn by the user. For example, since the display area is generally positioned closer to the user's eye than a display area of a handheld such as a smartphone, a size of the display area of the displaymay be smaller than a size of the display area of the display of the handheld. For example, since the size of the display area of the displayis smaller than a size of the display area of the handheld, a level of integration of pixels (or sub-pixels) of the displaymay be higher than that of pixels (or sub-pixels) of the handheld. For example, a size of each of the pixels (or the sub-pixels) of the displaymay be smaller than a size of each of the pixels (or the sub-pixels) of the display of the handheld. As a non-limiting example, a size (e.g., width) of each of the pixels (or the sub-pixels) of the displaymay be about several tens of micrometers (e.g., about 1 micrometer to about 50 micrometers).
120 120 For example, the displaymay include a driving layer (e.g., a backplane) and an emission layer disposed on the driving layer. For example, the driving layer may be formed on a silicon substrate (or formed of the silicon substrate), for the pixels (or the sub-pixels) having a level of integration higher than that of the pixels (or the sub-pixels) of the display of the handheld. For example, the emission layer may include a plurality of light emission elements driven using the driving layer. As a non-limiting example, the displaymay include an organic light emitting diode (OLED) on silicon (OLEDoS) or a light emitting diode (LED) on silicon (LEDoS).
120 122 122 122 122 122 120 122 120 120 2 FIG. For example, since the driving layer is formed on the silicon substrate, the displaymay include a plurality of memory cells(or a plurality of cell memories) adjacent to each of the plurality of light emission elements. For example, the plurality of memory cellsmay be connected to each of the plurality of light emission elements. For example, each of the plurality of memory cellsbeing connected to each of the plurality of light emission elements may indicate that each of the plurality of memory cellsis connected to each of the plurality of light emission elements through driving circuitry (e.g., circuitry for a pulse width modulation (PWM) illustrated below). However, the disclosure is not limited thereto. For example, each of the sub-pixels of the displaymay include each of the plurality of light emission elements and each of the plurality of memory cells. For example, the displaymay have a memory in pixel (MIP) structure. The displayhaving the MIP structure is described in greater detail below with reference to.
2 FIG. is a diagram illustrating a display of an example wearable device according to various embodiments.
2 FIG. 120 200 200 Referring to, a displaymay include a plurality of sub-pixels. For example, each of the plurality of sub-pixelsmay include a memory cell, circuitry for PWM, and a light emission element. For example, the light emission element may be configured to emit light. As a non-limiting example, the light may include red light, green light, blue light, or white light.
200 200 122 202 122 203 202 For example, one sub-pixel-K (K is a natural number greater than or equal to 1 and less than or equal to N, and N is the number of the plurality of sub-pixels) may include a memory cell-K, circuitry-K for PWM connected to the memory cell-K, and a light emission element-K connected to the circuitry-K for PWM.
202 122 202 For example, the circuitry-K for PWM may obtain a bit sequence from the memory cell-K. For example, the circuitry-K for PWM may generate or obtain one or more pulse signals corresponding to the bit sequence.
203 203 For example, the light emission element-K may be configured to emit light in accordance with a PWM scheme (or PWM driving, or PWM control), based on the one or more pulse signals. For example, a luminance (or grayscale) of light emitted from the light emission element-K may be changed according to a width of each of the one or more pulse signals.
1 FIG. 1 FIG. 3 FIG.A 100 100 100 120 120 110 100 120 Referring back to, since the wearable deviceis worn on a portion of the user's body, a capacity of a rechargeable battery (not illustrated in) in the wearable devicemay be relatively small for light weight. As a non-limiting example, the wearable devicemay display an image on the displayusing foveated rendering to compensate for the relatively small capacity of the rechargeable battery. For example, the displaymay receive information on an image from the processorthrough the driving layer, using each of first bit sequences, emit, in accordance with the PWM scheme, each of first light emission elements in the emission layer used for displaying of a first portion of the image to be recognized (or gazed) by foveal vision of a user wearing the wearable device, and using each of second bit sequences, emit, according to the PWM scheme, each of second light emission elements in the emission layer for displaying a second portion of the image to be recognized by peripheral vision of the user. For example, a bit depth of each of the first bit sequences may be higher (e.g., greater) than a bit depth of each of the second bit sequences. For example, the displaymay display the image, based on the light emission of each of the first light emission elements and the light emission of each of the second light emission elements. Displaying the image based on the first bit sequences and the second bit sequences is described in greater detail below with reference to.
3 FIG.A is a diagram illustrating an example of displaying an image based on first bit sequences and second bit sequences according to various embodiments.
3 FIG.A 120 300 Referring to, a displaymay display an imageusing foveated rendering.
301 300 120 301 300 300 100 301 300 300 301 300 300 300 301 300 301 300 301 300 3 FIG.A For example, a first portionof the imagedisplayed on the displaymay be recognized (or gazed) by foveal vision. For example, the first portionof the imagemay indicate a portion of the imageidentified according to a gaze of a user wearing a wearable device. For example, the first portionof the imagemay indicate a portion of the imagewhere the gaze corresponding to the foveal vision is positioned. For example, the first portionof the imagemay indicate a portion of the imagefocused on by a user gazing the image. For example, the first portionof the imagemay be circular, as the illustration of. For example, the first portionof the imagemay be rectangular or triangular. However, the disclosure is not limited thereto. For example, the first portionof the imagemay have a shape corresponding to a shape of an area recognized by foveal vision.
301 300 120 100 100 301 300 120 110 301 300 110 300 110 300 110 300 110 333 300 120 334 333 For example, the first portionof the imagedisplayed on the displaymay be identified based on a position of a gaze of a user wearing the wearable deviceidentified from images obtained through at least one camera of the wearable devicefacing an eye of the user. For example, the first light emission elements for displaying the first portionof the imagemay be identified by the display, based on address information (or data) received from the processorand indicating a position of the first portionof the imageaccording to the identification. For example, the address information may be received from the processorat another reception timing different from a reception timing of information on the image. For example, the address information may be received from the processorbefore (or immediately before) the information on the imageis received. For example, the address information may be received from the processorin conjunction with the information on the image. For example, the address information may be included in the information on the imagereceived from the processor. For example, the address information may be included outside an areafor the imagedisplayed on the display. For example, the address information may be included in an areapositioned outside the area.
301 300 301 300 301 300 301 300 300 301 300 300 301 300 As a non-limiting example, when the first portionof the imageis circular, the address information may indicate a center point of the first portionof the imageand a width (e.g., a radius or a diameter) of the first portionof the image. As a non-limiting example, when the first portionof the imageis rectangular, the address information may indicate a start address ((e.g., an address of the leftmost and uppermost corner of the image) of the first portionof the imageand an end address (e.g., an address of the rightmost and lowermost corner of the image) of the first portionof the image.
302 300 120 302 300 300 301 300 302 300 300 302 300 301 300 302 300 300 302 300 300 300 For example, a second portionof the imagedisplayed on the displaymay be recognized (or gazed) by peripheral vision outside a zone gazed by a fovea centralis. For example, the second portionof the imagemay indicate a portion of the imagedistinguished from the first portionof the image. For example, the second portionof the imagemay indicate a portion of the imagepositioned outside the gaze corresponding to the foveal vision. For example, the second portionof the imagemay be positioned around the first portionof the image. As a non-limiting example, the second portionof the imagemay indicate a portion of the imagespaced apart by a distance longer than a reference distance from a position of the gaze. For example, the second portionof the imagemay indicate a portion of the imagethat is included in a field of view of a user gazing the imagebut is not focused by the user.
301 300 120 302 300 120 331 301 300 120 332 302 300 120 For example, a resolution of the first portionof the imagedisplayed on the displaymay be higher than a resolution of the second portionof the imagedisplayed on the display. For example, a gradationrepresented in the first portionof the imagedisplayed on the displaymay be richer than a gradationrepresented in the second portionof the imagedisplayed on the display.
120 300 203 301 300 310 203 302 300 320 311 310 321 320 120 301 300 302 300 For example, the displaymay display the image, by emitting each of first light emission elements-L used for displaying of the first portionof the imagein accordance with the PWM scheme using each of first bit sequencesand emitting each of second light emission elements-M used for displaying of the second portionof the imagein accordance with the PWM scheme using each of second bit sequences. For example, since a bit depth(e.g., 10-bit) of each of the first bit sequencesis higher than a bit depth(e.g., 8-bit) of each of the second bit sequences, the displaymay display the first portionof the imagehaving an improved expression compared to an expression of the second portionof the image.
310 312 320 312 310 312 312 310 312 3 FIG.A 3 FIG.A For example, each of the first bit sequencesmay further include one or more bitswith respect to each of the second bit sequences. As a non-limiting example, the one or more bitsmay be positioned from the rightmost of each of the first bit sequences, as the illustration of. For example, the one or more bitsmay include a least significant bit (LSB) and a 9th most significant bit (MSB). As a non-limiting example, the one or more bitsmay be positioned from the leftmost of each of the first bit sequences, unlike the illustration of. For example, the one or more bitsmay include an MSB and a 2nd MSB. However, the disclosure is not limited thereto.
203 310 203 320 203 203 3 FIG.B For example, each of the first light emission elements-L may emit, in accordance with the PWM scheme, light using each of the first bit sequences, and each of the second light emission elements-M may emit, in accordance with the PWM scheme, light using each of the second bit sequences. The emission of each of the first light emission elements-L in accordance with the PWM scheme and the emission of each of the second light emission elements-M in accordance with the PWM scheme may be described in greater detail below with reference to.
3 FIG.B is a timing diagram illustrating an example of each of first light emission elements using each of first bit sequences and second light emission elements using each of second bit sequences according to various embodiments.
3 FIG.B Referring to, one of the first bit sequences may be ‘1101110111’, and one of the second bit sequences may be ‘11011101’. For example, the bit sequence, which is ‘1101110111’, may further include an ‘11’ positioned from the rightmost position with respect to the bit sequence, which is ‘11011101’ (e.g., the LSB and 9th MSB of ‘1101110111’).
202 350 361 381 362 382 364 384 365 385 366 386 368 388 369 389 370 390 For example, circuitry for PWM (e.g., circuitryfor PWM) may generate or obtain pulse signals within a time intervalof a horizontal synchronization signal, based on the bit sequence, which is ‘1101110111’. For example, the circuitry for PWM may generate a pulse signalhaving a widthbased on an MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on a 2nd MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on a 4th MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on a 5th MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on a 6th MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on an 8th MSB of the bit sequence, which is ‘1101110111’, generate a pulse signalhaving a widthbased on a 9th MSB of the bit sequence, which is ‘1101110111’, and generate a pulse signalhaving a widthbased on an LSB of the bit sequence, which is ‘1101110111’.
202 361 381 362 382 364 384 365 385 366 386 368 388 For example, circuitry for PWM (e.g., circuitryfor PWM) may generate or obtain pulse signals based on the bit sequence, which is ‘11011101’. For example, the circuitry for PWM may generate a pulse signalhaving a widthbased on an MSB of the bit sequence, which is ‘11011101’, generate a pulse signalhaving a widthbased on a 2nd MSB of the bit sequence, which is ‘11011101’, generate a pulse signalhaving a widthbased on a 4th MSB of the bit sequence, which is ‘11011101’, generate a pulse signalhaving a widthbased on a 5th MSB of the bit sequence, which is ‘11011101’, generate a pulse signalhaving a widthbased on a 6th MSB of the bit sequence, which is ‘11011101’, and generate a pulse signalhaving a widthbased on an LSB of the bit sequence, which is ‘11011101’.
301 300 203 361 362 364 365 366 368 369 370 391 381 382 350 392 384 385 386 393 368 369 370 For example, a light emission element used for displaying of the first portionof the image(e.g., one light emission element from among the first light emission elements-L) may emit light based on the pulse signal, the pulse signal, the pulse signal, the pulse signal, the pulse signal, the pulse signal, the pulse signal, and the pulse signal. For example, the light emission element may emit light for a timecorresponding to the widthand the widthwithin the time interval, emit light for a timecorresponding to the width, the width, and the width, and emit light for a timecorresponding to the width, the width, and the width.
302 300 203 361 362 364 365 366 368 391 381 382 350 392 384 385 386 394 368 For example, a light emission element used for displaying the second portionof the image(e.g., one light emission element from among the second light emission elements-M) may emit light based on the pulse signal, the pulse signal, the pulse signal, the pulse signal, the pulse signal, and the pulse signal. For example, the light emission element may emit light for a timecorresponding to the widthand the widthwithin the time interval, emit light for a timecorresponding to the width, the width, and the width, and emit light for a timecorresponding to the width.
301 300 302 300 301 300 302 300 395 301 300 302 300 395 301 300 120 302 300 120 301 300 302 300 302 300 302 300 302 300 120 120 For example, since a bit depth of the bit sequence (e.g., ‘1101110111’) provided for the light emission element for displaying of the first portionof the imageis higher than a bit depth of the bit sequence (e.g., ‘11011101’) provided for the light emission element for displaying of the second portionof the image, the light emission element for displaying of the first portionof the imagemay emit light more than the light emission element for displaying of the second portionof the image, for a time. For example, since the light emission element for displaying of the first portionof the imageis emitted more than the light emission element for displaying of the second portionof the imagefor the time, a quality of the first portionof the imagedisplayed on the displaymay be higher than a quality of the second portionof the imagedisplayed on the display. For example, the first portionof the imagemay have a higher color gamut (e.g., sRGB (REC-709), P3, or REC-2020)) than the second portionof the image, a richer gradation level than the second portionof the image, a higher resolution (e.g., FHD or 4K) than the second portionof the image, and/or a higher luminance (e.g., a standard dynamic range (SDR) or a high dynamic range (HDR)) than the second portionof the image. For example, the displaymay provide enhanced visibility at a low grayscale (or low gray-level). For example, the displaymay provide enhanced visibility at a low luminance.
3 FIG.A 300 303 303 301 302 303 301 302 303 301 302 Referring back to, as a non-limiting example, the imagemay further include a third portion. For example, the third portionmay be positioned between the first portionand the second portion. For example, the third portionmay have a resolution between a resolution of the first portionand a resolution of the second portion. For example, grayscale represented in the third portionmay be less rich than grayscale of the first portionand richer than grayscale of the second portion.
120 303 300 303 300 320 310 3 FIG.A 3 FIG.A For example, the displaymay display the third portionof the imageby emitting each of third light emission elements (not illustrated in) for displaying of the third portionof the imagein accordance with the PWM scheme using each of third bit sequences (not illustrated in). For example, a bit depth of each of the third bit sequences may be higher than a bit depth of each of the second bit sequencesand lower than a bit depth of each of the first bit sequences.
1 FIG. 3 FIG.A 3 FIG.B 122 122 120 123 312 123 Referring back to, a maximum storage size (or maximum storage capacity) of each of the plurality of memory cellsmay be larger than a size of each of the first bit sequences. As a non-limiting example, the maximum storage size of each of the plurality of memory cellsmay correspond to or may be identical to the size of each of the second bit sequences. For example, the displaymay further include memoryfor storing one or more bits (e.g., the one or more bitsofand/or the LSB and the 9th MSB of the bit sequence, which is ‘1101110111’, of) further included in each of the first bit sequences with respect to each of the second bit sequences. The memorymay be referred to as side memory.
123 120 A method of using the memorymay be variously implemented in the display.
120 123 122 120 122 123 123 4 FIG.A 4 FIG.B For example, the displaymay obtain each of the first bit sequences by adding the one or more bits obtained from the memoryto each of bit sequences of a first set obtained from a portion of the plurality of memory cells. For example, the displaymay obtain each of the second bit sequences from another portion of the plurality of memory cellswithout using the memory(or by bypassing obtaining the one or more bits from the memory). Obtaining each of the first bit sequences may be described in greater detail below with reference to, and obtaining each of the second bit sequences may be described in greater detail below with reference to.
4 FIG.A is a diagram illustrating an example of obtaining each of first bit sequences by adding one or more bits obtained from memory to each of bit sequences of a first set obtained from a portion of a plurality of memory cells according to various embodiments.
4 FIG.B is a diagram illustrating an example of obtaining each of second bit sequences from another portion of a plurality of memory cells according to various embodiments.
4 FIG.A 120 110 120 122 120 122 120 402 110 402 110 123 411 412 120 310 402 401 122 122 203 402 310 401 421 402 310 401 422 120 203 310 202 Referring to, the displaymay obtain each of a plurality of bit sequences from the information regarding the image received from the processor. For example, the displaymay store each of the plurality of bit sequences in a plurality of memory cells. For example, the displaymay obtain each of the plurality of bit sequences from each of the plurality of memory cellsafter the storing. For example, the displaymay store one or more bitsobtained from the processor(or one or more bitsobtained from the information received from the processor) in the memoryin accordance with the address information. For example, as indicated by arrowsand, the displaymay obtain each of first bit sequences, by adding one or more bitsto each of bit sequencesof a first set obtained from a portion-L of the plurality of memory cellsrespectively connected to a first light emission elements-L. For example, the one or more bitsin the first bit sequencesmay be positioned behind (or to the right of) an LSB of each of the bit sequencesof the first set, as in a state. For example, the one or more bitsin the first bit sequencesmay be positioned in front of (or to the left of) an MSB of each of the bit sequencesof the first set, as in a state. For example, the displaymay emit each of the first light emission elements-L by providing each of the first bit sequencesto circuitry-L for PWM.
4 FIG.B 441 120 320 402 431 122 122 203 320 402 431 320 431 122 122 123 320 402 431 320 431 120 203 320 202 Referring to, as indicated by an arrow, the displaymay obtain each of second bit sequencesby bypassing adding the one or more bits (e.g., the one or more bits) to each of bit sequencesof a second set obtained from another portion-M of the plurality of memory cellsconnected to a second light emission elements-M. For example, obtaining each of the second bit sequencesby bypassing adding the one or more bits (e.g., the one or more bits) to each of the bit sequencesof the second set may indicate obtaining the second bit sequences, which are the bit sequencesof the second set, from the another portion-M of the plurality of memory cellswithout using the memory. However, the disclosure is not limited thereto. For example, obtaining each of the second bit sequencesby bypassing adding the one or more bits (e.g., the one or more bits) to each of the bit sequencesof the second set may also indicate obtaining the second bit sequencesby adding one or more bits, which are null, to each of the bit sequencesof the second set. For example, the displaymay emit each of the second light emission elements-M by providing each of the second bit sequencesto circuitry-M for PWM.
120 300 203 203 For example, the displaymay display the image (e.g., the image) based on the emission of each of the first light emission elements-L and the emission of each of the second light emission elements-M.
1 FIG. 5 FIG.A 5 FIG.B 120 122 401 110 123 122 120 431 122 123 122 122 Referring back to, the displaymay obtain, before executing of storage in a portion of the plurality of memory cells, each of the first bit sequences by adding the one or more bit sequences to each of the bit sequencesof the first set obtained based on the information regarding the image received from the processor, store a portion of each of the first bit sequences in the memory, and store a remaining portion of each of the first bit sequences in the portion of the plurality of memory cellsconnected to the first light emission elements. For example, the displaymay store the second bit sequences, which are the bit sequencesof the second set, in the another portion of the plurality of memory cellsconnected to the second light emission elements. Storing the portion of each of the first bit sequences in the memoryand storing the remaining portion of each of the first bit sequences in the portion of the plurality of memory cellsmay described in greater detail below with reference to, and storing the second bit sequences in the another portion of the plurality of memory cellsmay be described in greater detail below with reference to.
5 FIG.A is a diagram illustrating an example of storing each of first bit sequences obtained using first circuitry, in a memory cell and memory through second circuitry according to various embodiments.
5 FIG.B is a diagram illustrating an example of storing each of second bit sequences in a memory cell through second circuitry according to various embodiments.
5 FIG.A 5 FIG.A 4 FIG.A 120 110 120 551 310 401 122 122 203 552 310 123 310 122 122 120 401 122 122 551 120 310 401 402 401 402 110 120 110 402 120 110 120 310 552 310 123 310 122 122 310 402 310 401 120 203 202 310 310 123 310 122 122 Referring to, the displaymay obtain, from the information regarding the image received from the processor, a plurality of bit sequences. For example, the displaymay include first circuitryfor obtaining each of first bit sequencesby extending or expanding each of bit sequencesof a first set to be at least partially stored in a portion-L of the plurality of memory cellsconnected to a first light emission elements-L from among the plurality of bit sequences, and second circuitryfor storing a portion of the first bit sequencesin the memoryand storing a remaining portion of the first bit sequencesin the portion-L of the plurality of memory cells. For example, the displaymay extend each of the bit sequencesof the first set to be stored in the portion-L of the plurality of memory cells, using the first circuitry. For example, the displaymay obtain each of the first bit sequencesextended from each of the bit sequencesof the first set by adding one or more bitsto each of the bit sequencesof the first set. For example, the one or more bitsmay be generated by the processorand may be provided to the displayfrom the processor. For example, the one or more bitsmay also be generated by the displaybased on the address information (or command) from the processor. For example, the displaymay divide each of the first bit sequencesusing the second circuitry, store the portion of each of the first bit sequencesobtained according to the division in the memory, and store the remaining portion of each of the first bit sequencesobtained according to the division in the portion-L of the plurality of memory cells. As a non-limiting example, the portion of each of the first bit sequencesmay be the one or more bits, and the remaining portion of each of the first bit sequencesmay be the bit sequencesof the first set. Although not illustrated in, the displaymay emit each of the first light emission elements-L by providing, to circuitry-L for PWM, each of the first bit sequencesobtained by adding a portion of each of the first bit sequencesobtained from the memoryto the remaining portion of each of the first bit sequencesobtained from the portion-L of the plurality of memory cells, as illustrated in.
5 FIG.B 5 FIG.B 4 FIG.B 120 320 431 122 122 203 551 551 120 320 122 122 552 552 120 203 320 202 Referring to, the displaymay obtain, as second bit sequences, bit sequencesof a second set to be stored in another portion-M of the plurality of memory cellsrespectively connected to a second light emission elements-M from among the plurality of bit sequences, without using the first circuitry(or by bypassing the first circuitry). For example, the displaymay store each of the second bit sequencesin the another portion-M of the plurality of memory cellsusing the second circuitry(or without using the second circuitry). Although not illustrated in, the displaymay emit each of the second light emission elements-M by providing each of the second bit sequencesto circuitry-M for PWM, as illustrated in.
120 300 203 203 For example, the displaymay display the image (e.g., the image) based on the emission of each of the first light emission elements-L and the emission of each of the second light emission elements-M.
1 FIG. 6 FIG.A 6 FIG.B 120 110 120 123 122 120 122 122 122 123 Referring back to, the displaymay obtain, from the information regarding the image received from processor, a plurality of bit sequences including the first bit sequences and the second bit sequences. For example, the displaymay store a portion of each of the first bit sequences in the memory, and store a remaining portion of each of the first bit sequences in memory cells of a first set, which is a portion of the plurality of memory cellsconnected to the first light emission element. For example, the displaymay store each of the second bit sequences in each of memory cellsof a second set, which are another portion-M of the plurality of memory cellsrespectively connected to the second light emission elements. Storing the portion of each of the first bit sequences in the memoryand storing the remaining portion of each of the first bit sequences in each of the memory cells of the first set may be described in greater detail below with reference to, and storing the second bit sequences in each of the memory cells of the second set may be described in greater detail below with reference to.
6 FIG.A is a diagram illustrating an example of storing each of first bit sequences in a memory cell and memory through second circuitry according to various embodiments.
6 FIG.B is a diagram illustrating an example of storing each of second bit sequences in a memory cell and memory through second circuitry according to various embodiments.
6 FIG.A 6 FIG.A 4 FIG.A 120 310 310 552 310 123 310 122 122 122 310 402 310 401 120 203 202 310 310 123 310 122 Referring to, the displaymay obtain each of first bit sequencesfrom the information regarding the image, divide each of the first bit sequencesusing the second circuitry, store the portion of each of the first bit sequencesobtained according to the division in the memory, and store the remaining portion of each of the first bit sequencesobtained according to the division in each of memory cells-L of a first set (or in a portion-L of a plurality of memory cells). As a non-limiting example, the portion of each of the first bit sequencesmay be one or more bits, and the remaining portion of each of the first bit sequencesmay be bit sequencesof a first set. Although not illustrated in, the displaymay emit each of first light emission elements-L by providing, to circuitry-L for PWM, each of the first bit sequencesobtained by adding a portion of each of the first bit sequencesobtained from the memoryto the remaining portion of each of the first bit sequencesobtained from each of the memory cells-L of the first set, as illustrated in.
6 FIG.B 6 FIG.B 4 FIG.B 120 320 122 122 122 552 552 120 203 320 202 Referring to, the displaymay store each of second bit sequencesin each of memory cells-M of a second set (or in another portion-M of a plurality of memory cells) using the second circuitry(or without using the second circuitry). Although not illustrated in, the displaymay emit each of the second light emission elements-M by providing each of the second bit sequencesto circuitry-M for PWM, as illustrated in.
120 300 203 203 For example, the displaymay display the image (e.g., the image) based on the emission of each of the first light emission elements-L and the emission of each of the second light emission elements-M.
1 FIG. 7 FIG.A 7 FIG.B 120 122 123 120 123 122 120 123 Referring back to, the displaymay include only the plurality of memory cells, without the memory. For example, when the displaydoes not include the memory, a maximum storage size of each of the plurality of memory cellsmay correspond to a size of each of the first bit sequences. Operations for displaying the image using the first bit sequences and the second bit sequences when the displaydoes not include the memorymay be described in greater detail below with reference toand.
7 FIG.A is a diagram illustrating an example of storing each of bit sequences of a first set, as each of first bit sequences, in memory cell through first circuitry according to various embodiments.
7 FIG.B is a diagram illustrating an example of storing each of second bit sequences obtained by removing one or more bits from each of bit sequences of a second set, in memory cell through first circuitry according to various embodiments.
7 FIG.A 7 FIG.B 120 110 120 701 731 120 310 701 122 122 203 703 703 701 310 122 703 310 701 122 703 120 203 310 122 202 Referring to, the displaymay obtain a plurality of bit sequences from the information regarding the image received from the processor. For example, the displaymay identify bit sequencesof a first set and bit sequences of a second set (e.g., bit sequencesof the second set of) from among the plurality of bit sequences. For example, the displaymay store, as first bit sequences, each of the bit sequencesof the first set in each of memory cells-L of a first set, which are a portion of the plurality of memory cellsconnected to the first light emission elements-L, through third circuitry(or by bypassing use of the third circuitry). For example, storing the bit sequencesof the first set, as the first bit sequences, in each of the memory cells-L of the first set by bypassing use of the third circuitrymay indicate storing the first bit sequences, which are the bit sequencesof the first set, in each of the memory cells-L of the first set without using the third circuitry. For example, the displaymay emit each of the first light emission elements-L by providing each of the first bit sequencesobtained from each of the memory cells-L of the first set to circuitry-L for PWM.
7 FIG.B 120 703 732 731 120 320 732 731 703 120 320 122 122 203 120 203 320 122 202 Referring to, the displaymay include third circuitryfor removing one or more bitsfrom bit sequencesof a second set from among the plurality of bit sequences. For example, the displaymay obtain second bit sequencesby removing the one or more bitsfrom the bit sequencesof the second set using the third circuitry. For example, the displaymay store each of the second bit sequencesin each of memory cells-M of a second set, which are another portion of the plurality of memory cellsconnected to the second light emission elements-M. For example, the displaymay emit each of the second light emission elements-M by providing each of the second bit sequencesobtained from each of the memory cells-M of the second set to circuitry-M for PWM.
120 300 203 203 For example, the displaymay display the image (e.g., the image) based on the emission of each of the first light emission elements-L and the emission of each of the second light emission elements-M.
1 FIG. 120 Referring back to, the displaymay adaptively execute displaying the image using the first bit sequences and the second bit sequences based on a condition. For example, the condition may be variously implemented.
120 100 120 303 300 3 FIG.A For example, the displaymay display, while a remaining capacity of a rechargeable battery of the wearable deviceis less than a reference capacity, the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences. For example, the displaymay display, while the remaining capacity is greater than or equal to the reference capacity, the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to a bit depth of each of the first bit sequences. For example, the third bit sequences may be distinguished from third bit sequences described in the description of the third portionof the imageof.
120 100 120 303 300 3 FIG.A For example, the displaymay display, while a brightness level of a portion of an environment around the wearable deviceprovided with the image is lower than a reference brightness level, the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences. For example, the displaymay display, while the brightness level is equal to or higher than the reference brightness level, the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to the bit depth of each of the first bit sequences. For example, the third bit sequences may be distinguished from the third bit sequences described in the description of the third portionof the imageof.
120 303 300 3 FIG.A For example, based on user settings for displaying of the image, settings of a software application for displaying of the image, and/or a state related to execution of the software application, the displaymay display the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences, or display the image by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequences and emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to a bit depth of each of the first bit sequences. For example, the third bit sequences may be distinguished from the third bit sequences described in the description of the third portionof the imageof.
8 9 FIGS.and The examples described above may be implemented in an electronic device illustrated and described in greater detail below with reference to.
8 FIG. 8 FIG. 801 800 801 800 802 898 804 808 899 801 804 808 801 820 830 850 855 860 870 876 877 878 879 880 888 889 890 896 897 878 801 801 876 880 897 860 is a block diagram illustrating an example electronic devicein a network environmentaccording to various embodiments. Referring to, the electronic devicein the network environmentmay communicate with an electronic devicevia a first network(e.g., a short-range wireless communication network), or at least one of an electronic deviceor a servervia a second network(e.g., a long-range wireless communication network). According to an embodiment, the electronic devicemay communicate with the electronic devicevia the server. According to an embodiment, the electronic devicemay include a processor, memory, an input module, a sound output module, a display module, an audio module, a sensor module, an interface, a connecting terminal, a haptic module, a camera module, a power management module, a battery, a communication module, a subscriber identification module (SIM), and/or an antenna module. In various embodiments, at least one of the components (e.g., the connecting terminal) may be omitted from the electronic device, or one or more other components may be added in the electronic device. In various embodiments, some of the components (e.g., the sensor module, the camera module, or the antenna module) may be implemented as a single component (e.g., the display module).
820 840 801 820 820 876 890 832 832 834 820 821 823 821 801 821 823 823 821 823 821 820 110 1 FIG. The processormay execute, for example, software (e.g., a program) to control at least one other component (e.g., a hardware or software component) of the electronic devicecoupled with the processor, and may perform various data processing or computation. According to an embodiment, as at least part of the data processing or computation, the processormay store a command or data received from another component (e.g., the sensor moduleor the communication module) in volatile memory, process the command or the data stored in the volatile memory, and store resulting data in non-volatile memory. According to an embodiment, the processormay include a main processor(e.g., a central processing unit (CPU) or an application processor (AP)), or an auxiliary processor(e.g., a graphics processing unit (GPU), a neural processing unit (NPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that is operable independently from, or in conjunction with, the main processor. For example, when the electronic deviceincludes the main processorand the auxiliary processor, the auxiliary processormay be adapted to consume less power than the main processor, or to be specific to a specified function. The auxiliary processormay be implemented as separate from, or as part of the main processor. Thus, the processormay include various processing circuitry and/or multiple processors. For example, as used herein, including the claims, the term “processor” may include various processing circuitry, including at least one processor, wherein one or more of at least one processor, individually and/or collectively in a distributed manner, may be configured to perform various functions described herein. As used herein, when “a processor”, “at least one processor”, and “one or more processors” are described as being configured to perform numerous functions, these terms cover situations, for example and without limitation, in which one processor performs some of recited functions and another processor(s) performs other of recited functions, and also situations in which a single processor may perform all recited functions. Additionally, the at least one processor may include a combination of processors performing various of the recited/disclosed functions, e.g., in a distributed manner. At least one processor may execute program instructions to achieve or perform various functions. As noted above, this description applies equally to the processordescribed above with reference to.
823 860 876 890 801 821 821 821 821 823 880 890 823 823 801 808 The auxiliary processormay control at least some of functions or states related to at least one component (e.g., the display module, the sensor module, or the communication module) among the components of the electronic device, instead of the main processorwhile the main processoris in an inactive (e.g., sleep) state, or together with the main processorwhile the main processoris in an active state (e.g., executing an application). According to an embodiment, the auxiliary processor(e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., the camera moduleor the communication module) functionally related to the auxiliary processor. According to an embodiment, the auxiliary processor(e.g., the neural processing unit) may include a hardware structure specified for artificial intelligence model processing. An artificial intelligence model may be generated by machine learning. Such learning may be performed, e.g., by the electronic devicewhere the artificial intelligence is performed or via a separate server (e.g., the server). Learning algorithms may include, but are not limited to, e.g., supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include a plurality of artificial neural network layers. The artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), deep Q-network or a combination of two or more thereof but is not limited thereto. The artificial intelligence model may, additionally or alternatively, include a software structure other than the hardware structure.
830 820 876 801 840 830 832 834 The memorymay store various data used by at least one component (e.g., the processoror the sensor module) of the electronic device. The various data may include, for example, software (e.g., the program) and input data or output data for a command related thereto. The memorymay include the volatile memoryor the non-volatile memory.
840 830 842 844 846 The programmay be stored in the memoryas software, and may include, for example, an operating system (OS), middleware, or an application.
850 820 801 801 850 The input modulemay receive a command or data to be used by another component (e.g., the processor) of the electronic device, from the outside (e.g., a user) of the electronic device. The input modulemay include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).
855 801 855 The sound output modulemay output sound signals to the outside of the electronic device. The sound output modulemay include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as playing multimedia or playing record. The receiver may be used for receiving incoming calls. According to an embodiment, the receiver may be implemented as separate from, or as part of the speaker.
860 801 860 860 The display modulemay visually provide information to the outside (e.g., a user) of the electronic device. The display modulemay include, for example, a display, a hologram device, or a projector and control circuitry to control a corresponding one of the display, hologram device, and projector. According to an embodiment, the display modulemay include a touch sensor adapted to detect a touch, or a pressure sensor adapted to measure the intensity of force incurred by the touch.
870 870 850 855 802 801 The audio modulemay convert a sound into an electrical signal and vice versa. According to an embodiment, the audio modulemay obtain the sound via the input module, or output the sound via the sound output moduleor a headphone of an external electronic device (e.g., an electronic device) directly (e.g., wiredly) or wirelessly coupled with the electronic device.
876 801 801 876 The sensor modulemay detect an operational state (e.g., power or temperature) of the electronic deviceor an environmental state (e.g., a state of a user) external to the electronic device, and then generate an electrical signal or data value corresponding to the detected state. According to an embodiment, the sensor modulemay include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.
877 801 802 877 The interfacemay support one or more specified protocols to be used for the electronic deviceto be coupled with the external electronic device (e.g., the electronic device) directly (e.g., wiredly) or wirelessly. According to an embodiment, the interfacemay include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.
878 801 802 878 A connecting terminalmay include a connector via which the electronic devicemay be physically connected with the external electronic device (e.g., the electronic device). According to an embodiment, the connecting terminalmay include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).
879 879 The haptic modulemay convert an electrical signal into a mechanical stimulus (e.g., a vibration or a movement) or electrical stimulus which may be recognized by a user via his tactile sensation or kinesthetic sensation. According to an embodiment, the haptic modulemay include, for example, a motor, a piezoelectric element, or an electric stimulator.
880 880 The camera modulemay capture a still image or moving images. According to an embodiment, the camera modulemay include one or more lenses, image sensors, image signal processors, or flashes.
888 801 888 The power management modulemay manage power supplied to the electronic device. According to an embodiment, the power management modulemay be implemented as at least part of, for example, a power management integrated circuit (PMIC).
889 801 889 The batterymay supply power to at least one component of the electronic device. According to an embodiment, the batterymay include, for example, a primary cell which is not rechargeable, a secondary cell which is rechargeable, or a fuel cell.
890 801 802 804 808 890 820 890 892 894 898 899 892 801 898 899 896 The communication modulemay support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic deviceand the external electronic device (e.g., the electronic device, the electronic device, or the server) and performing communication via the established communication channel. The communication modulemay include one or more communication processors that are operable independently from the processor(e.g., the application processor (AP)) and supports a direct (e.g., wired) communication or a wireless communication. According to an embodiment, the communication modulemay include a wireless communication module(e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module(e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules may communicate with the external electronic device via the first network(e.g., a short-range communication network, such as Bluetooth™, wireless-fidelity (Wi-Fi) direct, or infrared data association (IrDA)) or the second network(e.g., a long-range communication network, such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., LAN or wide area network (WAN)). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multi components (e.g., multi chips) separate from each other. The wireless communication modulemay identify and authenticate the electronic devicein a communication network, such as the first networkor the second network, using subscriber information (e.g., international mobile subscriber identity (IMSI)) stored in the subscriber identification module.
892 892 892 892 801 804 899 892 The wireless communication modulemay support a 5G network, after a 4G network, and next-generation communication technology, e.g., new radio (NR) access technology. The NR access technology may support enhanced mobile broadband (eMBB), massive machine type communications (mMTC), or ultra-reliable and low-latency communications (URLLC). The wireless communication modulemay support a high-frequency band (e.g., the mm Wave band) to achieve, e.g., a high data transmission rate. The wireless communication modulemay support various technologies for securing performance on a high-frequency band, such as, e.g., beamforming, massive multiple-input and multiple-output (massive MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication modulemay support various requirements specified in the electronic device, an external electronic device (e.g., the electronic device), or a network system (e.g., the second network). According to an embodiment, the wireless communication modulemay support a peak data rate (e.g., 20 Gbps or more) for implementing eMBB, loss coverage (e.g., 864 dB or less) for implementing mMTC, or U-plane latency (e.g., 0.5 ms or less for each of downlink (DL) and uplink (UL), or a round trip of 8 ms or less) for implementing URLLC.
897 801 897 897 898 899 890 892 890 897 The antenna modulemay transmit or receive a signal or power to or from the outside (e.g., the external electronic device) of the electronic device. According to an embodiment, the antenna modulemay include an antenna including a radiating element including a conductive material or a conductive pattern formed in or on a substrate (e.g., a printed circuit board (PCB)). According to an embodiment, the antenna modulemay include a plurality of antennas (e.g., array antennas). In such a case, at least one antenna appropriate for a communication scheme used in the communication network, such as the first networkor the second network, may be selected, for example, by the communication module(e.g., the wireless communication module) from the plurality of antennas. The signal or the power may then be transmitted or received between the communication moduleand the external electronic device via the selected at least one antenna. According to an embodiment, another component (e.g., a radio frequency integrated circuit (RFIC)) other than the radiating element may be additionally formed as part of the antenna module.
897 According to various embodiments, the antenna modulemay form a mmWave antenna module. According to an embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on a first surface (e.g., the bottom surface) of the printed circuit board, or adjacent to the first surface and capable of supporting a designated high-frequency band (e.g., the mmWave band), and a plurality of antennas (e.g., array antennas) disposed on a second surface (e.g., the top or a side surface) of the printed circuit board, or adjacent to the second surface and capable of transmitting or receiving signals of the designated high-frequency band.
At least some of the above-described components may be coupled mutually and communicate signals (e.g., commands or data) therebetween via an inter-peripheral communication scheme (e.g., a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)).
801 804 808 899 802 804 801 801 802 804 808 801 801 801 801 801 804 808 804 808 899 801 According to an embodiment, commands or data may be transmitted or received between the electronic deviceand the external electronic devicevia the servercoupled with the second network. Each of the electronic devicesormay be a device of a same type as, or a different type, from the electronic device. According to an embodiment, all or some of operations to be executed at the electronic devicemay be executed at one or more of the external electronic devices,, or. For example, if the electronic deviceshould perform a function or a service automatically, or in response to a request from a user or another device, the electronic device, instead of, or in addition to, executing the function or the service, may request the one or more external electronic devices to perform at least part of the function or the service. The one or more external electronic devices receiving the request may perform the at least part of the function or the service requested, or an additional function or an additional service related to the request, and transfer an outcome of the performing to the electronic device. The electronic devicemay provide the outcome, with or without further processing of the outcome, as at least part of a reply to the request. To that end, a cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic devicemay provide ultra low-latency services using, e.g., distributed computing or mobile edge computing. In an embodiment, the external electronic devicemay include an internet-of-things (IoT) device. The servermay be an intelligent server using machine learning and/or a neural network. According to an embodiment, the external electronic deviceor the servermay be included in the second network. The electronic devicemay be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology or IoT-related technology.
9 FIG. 9 FIG. 900 860 860 910 930 910 930 931 933 935 937 930 801 931 820 821 823 821 930 950 876 931 930 933 935 910 937 935 910 910 is a block diagramillustrating an example configuration of the display moduleaccording to various embodiments. Referring to, the display modulemay include a displayand a display driver integrated circuit (DDI)to control the display. The DDImay include an interface module (e.g., including circuitry), memory(e.g., buffer memory), an image processing module (e.g., including circuitry and/or executable program instructions), and/or a mapping module (e.g., including various circuitry and/or executable program instructions). The DDImay receive image information that contains image data or an image control signal corresponding to a command to control the image data from another component of the electronic devicevia the interface module. For example, according to an embodiment, the image information may be received from the processor(e.g., the main processor(e.g., an application processor)) or the auxiliary processor(e.g., a graphics processing unit) operated independently from the function of the main processor. The DDImay communicate, for example, with touch circuitryor the sensor modulevia the interface module. The DDImay also store at least part of the received image information in the memory, for example, on a frame by frame basis. The image processing modulemay perform pre-processing or post-processing (e.g., adjustment of resolution, brightness, or size) with respect to at least part of the image data. According to an embodiment, the pre-processing or post-processing may be performed, for example, based at least in part on one or more characteristics of the image data or one or more characteristics of the display. The mapping modulemay generate a voltage value or a current value corresponding to the image data pre-processed or post-processed by the image processing module. According to an embodiment, the generating of the voltage value or current value may be performed, for example, based at least in part on one or more attributes of the pixels (e.g., an array, such as an RGB stripe or a pentile structure, of the pixels, or the size of each subpixel). At least some pixels of the displaymay be driven, for example, based at least in part on the voltage value or the current value such that visual information (e.g., a text, an image, or an icon) corresponding to the image data may be displayed via the display.
860 950 950 951 953 951 953 951 910 951 910 950 951 820 953 950 910 930 823 860 According to an embodiment, the display modulemay further include the touch circuitry. The touch circuitrymay include a touch sensorand a touch sensor ICto control the touch sensor. The touch sensor ICmay control the touch sensorto sense a touch input or a hovering input with respect to a certain position on the display. To achieve this, for example, the touch sensormay detect (e.g., measure) a change in a signal (e.g., a voltage, a quantity of light, a resistance, or a quantity of one or more electric charges) corresponding to the certain position on the display. The touch circuitrymay provide input information (e.g., a position, an area, a pressure, or a time) indicative of the touch input or the hovering input detected via the touch sensorto the processor. According to an embodiment, at least part (e.g., the touch sensor IC) of the touch circuitrymay be formed as part of the displayor the DDI, or as part of another component (e.g., the auxiliary processor) disposed outside the display module.
860 876 910 930 950 860 876 860 910 876 860 910 951 876 910 According to an embodiment, the display modulemay further include at least one sensor (e.g., a fingerprint sensor, an iris sensor, a pressure sensor, or an illuminance sensor) of the sensor moduleor a control circuit for the at least one sensor. In such a case, the at least one sensor or the control circuit for the at least one sensor may be embedded in one portion of a component (e.g., the display, the DDI, or the touch circuitry)) of the display module. For example, when the sensor moduleembedded in the display moduleincludes a biometric sensor (e.g., a fingerprint sensor), the biometric sensor may obtain biometric information (e.g., a fingerprint image) corresponding to a touch input received via a portion of the display. As another example, when the sensor moduleembedded in the display moduleincludes a pressure sensor, the pressure sensor may obtain pressure information corresponding to a touch input received via a partial or whole area of the display. According to an embodiment, the touch sensoror the sensor modulemay be disposed between pixels in a pixel layer of the display, or over or under the pixel layer.
100 120 110 120 110 300 120 310 301 300 100 120 320 302 300 301 300 120 300 310 320 As described above, a wearable devicemay comprise a displayincluding a driving layer formed at a silicon substrate, and an emission layer on the driving layer, and a processor. According to an embodiment, the displaymay be configured to receive, from the processor, via the driving layer, information regarding an image. According to an embodiment, the displaymay be configured to, using each of first bit sequences, emit, in accordance with a pulse width modulation (PWM) scheme, each of first light emission elements in the emission layer for displaying of a first portionof the imageidentified in accordance with a gaze of a user wearing the wearable device. According to an embodiment, the displaymay be configured to, using each of second bit sequences, emit, in accordance with the PWM scheme, each of second light emission elements in the emission layer for displaying of a second portionof the imagearound the first portionof the image. According to an embodiment, the displaymay be configured to, based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, display the image. According to an embodiment, a bit depth of each of the first bit sequencesmay be higher than a bit depth of each of the second bit sequences.
120 120 110 120 120 310 120 320 120 310 120 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first and second light emission elements, and a plurality of memory cells respectively connected to the plurality of light emission elements. According to an embodiment, the displaymay be configured to store, in each of the plurality of memory cells, each of a plurality of bit sequences obtained from the information received from the processor. According to an embodiment, the displaymay be configured to obtain each of the plurality of bit sequences from each of the plurality of memory cells. According to an embodiment, the displaymay be configured to obtain each of the first bit sequencesby adding one or more bits to each of bit sequences of a first set obtained from a portion of the plurality of memory cells respectively connected to the first light emission elements. According to an embodiment, the displaymay be configured to obtain each of the second bit sequencesby bypassing adding the one or more bits to each of bit sequences of a second set obtained from another portion of the plurality of memory cells respectively connected to the second light emission elements. According to an embodiment, the displaymay be configured to, using each of the first bit sequences, emit each of the first light emission elements. According to an embodiment, the displaymay be configured to, using each of the second bit sequences, emit each of the second light emission elements.
310 According to an embodiment, the one or more bits in each of the first bit sequencesmay be positioned behind the least significant bit (LSB) of each of the bit sequences of the first set.
310 According to an embodiment, the one or more bits in each of the first bit sequencesmay be positioned in front of the most significant bit (MSB) of each of the bit sequences of the first set.
120 310 120 320 According to an embodiment, each of the plurality of light emission elements may be respectively connected to each of the plurality of memory cells through circuitry for pulse width modulation. According to an embodiment, the displaymay be configured to, by providing each of the first bit sequencesto the circuitry connected to each of the first light emission elements, emit each of the first light emission elements. According to an embodiment, the displaymay be configured to, by providing each of the second bit sequencesto the circuitry connected to each of the second light emission elements, emit each of the second light emission elements.
120 According to an embodiment, the displaymay include memory different from the plurality of memory cells. According to an embodiment, the one or more bits may be obtained from the memory.
310 According to an embodiment, a size of each of the first bit sequencesmay be larger than a maximum storage size of each of the plurality of memory cells.
120 310 320 310 310 320 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first and second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells. According to an embodiment, memory cells of a first set respectively connected to the first light emission elements from among the plurality of memory cells may be used for obtaining each of the first bit sequencesin conjunction with the memory. According to an embodiment, memory cells of a second set respectively connected to the second light emission elements from among the plurality of memory cells may be used for obtaining each of the second bit sequences. According to an embodiment, the memory may be used for obtaining the first bit sequencesfrom among the first bit sequencesand the second bit sequences. According to an embodiment, the memory may not be used for obtaining the second bit sequences.
120 120 310 310 120 320 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells. According to an embodiment, the plurality of memory cells may include memory cells of a first set respectively connected to the first light emission elements, and memory cells of a second set respectively connected to the second light emission elements. According to an embodiment, the displaymay be configured to obtain the first bit sequencesby adding one or more bits obtained from the memory to each of bit sequences of a first set respectively obtained from the memory cells of the first set, and emit each of the first light emission elements using each of the first bit sequences. According to an embodiment, the displaymay be configured to obtain, as the second bit sequences, bit sequences of a second set respectively obtained from the memory cells of the second set, and emit each of the second light emission elements using each of the second bit sequences.
120 120 110 120 310 120 320 120 310 120 310 120 320 120 310 120 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells. According to an embodiment, the displaymay be configured to obtain a plurality of bit sequences from the information received from the processor. According to an embodiment, the displaymay be configured to, by adding one or more bits to each of bit sequences of a first set to be stored in a portion of the plurality of memory cells respectively connected to the first light emission elements from among the plurality of bit sequences, obtain each of first bit sequences. According to an embodiment, the displaymay be configured to obtain, as the second bit sequences, bit sequences of a second set to be stored in another portion of the plurality of memory cells respectively connected to the second light emission elements from among the plurality of bit sequences. According to an embodiment, the displaymay be configured to store, in the memory, the one or more bits which are a portion of each of the first bit sequences. According to an embodiment, the displaymay be configured to store, in each of memory cells of a first set which is the portion of the plurality of memory cells, each of the bit sequences of the first set which is a remaining portion of each of the first bit sequences. According to an embodiment, the displaymay be configured to store, in each of memory cells of a second set which is the another portion of the plurality of memory cells, each of the second bit sequences. According to an embodiment, the displaymay be configured to emit each of the first light emission elements, using each of the first bit sequencesobtained by adding the one or more bits obtained from the memory to each of the bit sequences of the first set obtained from each of the memory cells of the first set. According to an embodiment, the displaymay be configured to emit each of the second light emission elements, using each of the second bit sequencesobtained from each of the memory cells of the second set.
120 120 110 310 320 120 310 120 310 120 320 120 310 310 310 120 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first light emission elements and the second light emission elements, a plurality of memory cells respectively connected to the plurality of light emission elements, and memory different from the plurality of memory cells. According to an embodiment, the displaymay be configured to obtain, from the information received from the processor, a plurality of bit sequences including the first bit sequencesand the second bit sequences. According to an embodiment, the displaymay be configured to store, in the memory, a portion of each of the first bit sequences. According to an embodiment, the displaymay be configured to store, in each of memory cells of a first set which is a portion of the plurality of memory cells respectively connected to the first light emission elements, a remaining portion of each of the first bit sequences. According to an embodiment, the displaymay be configured to store, in each of memory cells of a second set which is another portion of the plurality of memory cells respectively connected to the second light emission elements, each of the second bit sequences. According to an embodiment, the displaymay be configured to emit each of the first light emission elements, using each of the first bit sequencesobtained by adding the portion of each of the first bit sequencesobtained from the memory to the remaining portion of each of the first bit sequencesobtained from each of the memory cells of the first set. According to an embodiment, the displaymay be configured to emit each of the second light emission elements, using each of the second bit sequencesobtained from each of the memory cells of the second set.
120 120 110 120 120 310 120 320 120 310 120 320 According to an embodiment, the displaymay include a plurality of light emission elements including the first light emission elements and the second light emission elements, and a plurality of memory cells respectively connected to the plurality of light emission elements. According to an embodiment, the displaymay be configured to obtain, from the information received from the processor, a plurality of bit sequences. According to an embodiment, the displaymay be configured to identify bit sequences of a first set and bit sequences of a second set from among the plurality of bit sequences. According to an embodiment, the displaymay be configured to, in memory cells of a first set which are a portion of the plurality of memory cells respectively connected to the first light emission elements, respectively store, as the first bit sequences, the bit sequences of the first set. According to an embodiment, the displaymay be configured to, in memory cells of a second set which are another portion of the plurality of memory cells respectively connected to the second light emission elements, respectively store the second bit sequencesobtained by removing one or more bits from each of the bit sequences of the second set. According to an embodiment, the displaymay be configured to emit each of the first light emission elements, using each of the first bit sequencesobtained from each of the memory cells of the first set. According to an embodiment, the displaymay be configured to emit each of the second light emission elements, using each of the second bit sequencesobtained from each of the memory cells of the second set.
100 301 According to an embodiment, the wearable devicemay comprise at least one camera facing an eye of the user. According to an embodiment, the first portionmay be identified based on a position of a gaze of the user identified from images obtained through the at least one camera.
100 120 300 310 320 120 300 310 310 According to an embodiment, the wearable devicemay comprise a battery that is rechargeable. According to an embodiment, the displaymay be configured to, while a remaining capacity of the battery is less than a reference capacity, display the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences. According to an embodiment, the displaymay be configured to, while the remaining capacity is greater than or equal to the reference capacity, display the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to the bit depth of each of the first bit sequences.
120 301 According to an embodiment, the displaymay be configured to identify the first portionfrom the information.
301 300 120 According to an embodiment, the information may include data for identifying the first portionoutside an area for the imagedisplayed on the display.
120 300 310 320 100 300 120 300 310 310 According to an embodiment, the displaymay be configured to display the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences, while a brightness level of a portion of an environment around the wearable deviceprovided together with the imageis lower than a reference brightness level. According to an embodiment, the displaymay be configured to display the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to the bit depth of each of the first bit sequences, while the brightness level is greater than or equal to than the reference brightness level.
120 100 110 110 300 310 120 100 301 300 100 320 302 300 301 300 300 310 320 As described above, a method executed for a displayof a wearable deviceincluding a processormay comprise receiving, from the processor, information regarding an image. According to an embodiment, the method may comprise, using each of first bit sequences, emitting, in accordance with a pulse width modulation (PWM) scheme, each of first light emission elements in an emission layer of the displayof the wearable deviceused for displaying of a first portionof the imageidentified in accordance with a gaze of a user wearing the wearable device. According to an embodiment, the method may comprise, using each of second bit sequences, emitting, in accordance with the PWM scheme, each of second light emission elements in the emission layer for displaying of a second portionof the imagearound the first portionof the image. According to an embodiment, the method may comprise, based on the emission of each of the first light emission elements and the emission of each of the second light emission elements, displaying the image. According to an embodiment, a bit depth of each of the first bit sequencesmay be higher than a bit depth of each of the second bit sequences.
301 100 According to an embodiment, the first portionmay be identified based on a position of a gaze of the user identified from images obtained through at least one camera of the wearable devicefacing an eye of the user.
100 300 310 320 300 310 310 According to an embodiment, the method may comprise, while a remaining capacity of a rechargeable battery of the wearable deviceis less than a reference capacity, displaying the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences. According to an embodiment, the method may comprise, while the remaining capacity is greater than or equal to the reference capacity, display the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having third bit sequences have a bit depth identical to the bit depth of each of the first bit sequences.
301 According to an embodiment, the method may comprise identifying the first portionfrom the information.
300 310 320 100 300 300 310 310 According to an embodiment, the method may comprise displaying the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of the second bit sequences, while a brightness level of a portion of an environment around the wearable deviceprovided together with the imageis lower than a reference brightness level. According to an embodiment, the method may comprise displaying the image, by emitting each of the first light emission elements in accordance with the PWM scheme using each of the first bit sequencesand emitting each of the second light emission elements in accordance with the PWM scheme using each of third bit sequences having a bit depth identical to the bit depth of each of the first bit sequences, while the brightness level is greater than or equal to than the reference brightness level.
The electronic device according to various embodiments may be one of various types of electronic devices. The electronic devices may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, a home appliance, or the like. According to an embodiment of the disclosure, the electronic devices are not limited to those described above.
It should be appreciated that various embodiments of the present disclosure and the terms used therein are not intended to limit the technological features set forth herein to particular embodiments and include various changes, equivalents, or replacements for a corresponding embodiment. With regard to the description of the drawings, similar reference numerals may be used to refer to similar or related elements. It is to be understood that a singular form of a noun corresponding to an item may include one or more of the things unless the relevant context clearly indicates otherwise. As used herein, each of such phrases as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C,” may include any one of or all possible combinations of the items enumerated together in a corresponding one of the phrases. As used herein, such terms as “1st” and “2nd,” or “first” and “second” may be used to simply distinguish a corresponding component from another, and does not limit the components in other aspect (e.g., importance or order). It is to be understood that if an element (e.g., a first element) is referred to, with or without the term “operatively” or “communicatively”, as “coupled with,” or “connected with” another element (e.g., a second element), the element may be coupled with the other element directly (e.g., wiredly), wirelessly, or via a third element.
As used in connection with various embodiments of the disclosure, the term “module” may include a unit implemented in hardware, software, or firmware, or any combination thereof, and may interchangeably be used with other terms, for example, “logic,” “logic block,” “part,” or “circuitry”. A module may be a single integral component, or a minimum unit or part thereof, adapted to perform one or more functions. For example, according to an embodiment, the module may be implemented in a form of an application-specific integrated circuit (ASIC).
840 836 838 801 820 801 Various embodiments as set forth herein may be implemented as software (e.g., the program) including one or more instructions that are stored in a storage medium (e.g., internal memoryor external memory) that is readable by a machine (e.g., the electronic device). For example, a processor (e.g., the processor) of the machine (e.g., the electronic device) may invoke at least one of the one or more instructions stored in the storage medium, and execute it, with or without using one or more other components under the control of the processor. This allows the machine to be operated to perform at least one function according to the at least one instruction invoked. The one or more instructions may include a code generated by a compiler or a code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Wherein, the “non-transitory” storage medium is a tangible device, and may not include a signal (e.g., an electromagnetic wave), but this term does not differentiate between a case in which data is semi-permanently stored in the storage medium and a case in which the data is temporarily stored in the storage medium.
According to an embodiment, a method according to various embodiments of the disclosure may be included and provided in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or be distributed (e.g., downloaded or uploaded) online via an application store (e.g., PlayStore™), or between two user devices (e.g., smart phones) directly. If distributed online, at least part of the computer program product may be temporarily generated or at least temporarily stored in the machine-readable storage medium, such as memory of the manufacturer's server, a server of the application store, or a relay server.
According to various embodiments, each component (e.g., a module or a program) of the above-described components may include a single entity or multiple entities, and some of the multiple entities may be separately disposed in different components. According to various embodiments, one or more of the above-described components may be omitted, or one or more other components may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, according to various embodiments, the integrated component may still perform one or more functions of each of the plurality of components in the same or similar manner as they are performed by a corresponding one of the plurality of components before the integration. According to various embodiments, operations performed by the module, the program, or another component may be carried out sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be executed in a different order or omitted, or one or more other operations may be added.
While the disclosure has been illustrated and described with reference to various example embodiments, it will be understood that the various example embodiments are intended to be illustrative, not limiting. It will be further understood by those skilled in the art that various modifications, alternatives and/or variations of the various example embodiments may be made without departing from the true technical spirit and full technical scope of the disclosure, including the appended claims and their equivalents. It will also be understood that any of the embodiment(s) described herein may be used in conjunction with any other embodiment(s) described herein.
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October 24, 2025
February 19, 2026
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