Selective Material Removal with Angular Beam

Embodiments of the disclosure generally relate to apparatus and methods for selective etching of materials. In particular, embodiments of the disclosure relate to apparatus and methods for selectively etching materials using an angularly oriented beam of ions and/or radicals.

Reliably producing submicron and smaller features is one of the key requirements of very large scale integration (VLSI) and ultra large scale integration (ULSI) of semiconductor devices. However, with the continued miniaturization of circuit technology, the dimensions of the size and pitch of circuit features, such as interconnects, have placed additional demands on processing capabilities. The various semiconductor components (e.g., interconnects, vias, capacitors, transistors) require precise placement of high aspect ratio features. Reliable formation of these components is critical to further increases in device and density.

Additionally, the electronic device industry and the semiconductor industry continue to strive for larger production yields while increasing the uniformity of layers deposited on substrates having increasingly larger surface areas. These same factors in combination with new materials also provide higher integration of circuits per unit area on the substrate.

Selective deposition, or selective film formation, is often a useful process in the formation of electronic devices. Selective deposition refers to a process in which a film is formed selectively, or preferentially, on one surface material relative to another surface material. Similarly, selective etching refers to a process where a film is etched from one surface material preferentially relative to a different surface material. For example, in a gapfill process, it is often helpful to have bottom-up growth of the gapfill material by selectively deposition the material on the bottom surface of the gap relative to the sidewalls or field of the substrate surface.

Conventional selective deposition processes can be time consuming and expensive. For example, in some current processes, a substrate is soaked with a precursor, followed by a selective etching process. This is expensive, requiring the use of two process chambers, and is time consuming.

There is an ongoing need in the art for apparatus and methods to selectively form materials on substrate surfaces or within surface structures.

In some aspects, the techniques described herein relate to a method of filling a gap in a semiconductor substrate, the method including: forming a first material on the semiconductor substrate having the gap, the gap having sidewalls and a bottom, the first material formed on the field of the semiconductor substrate outside of the gap, on the sidewalls and bottom of the gap; and exposing the semiconductor substrate to an angular etching process to remove a first material from a field of the semiconductor substrate and a top portion of the sidewalls of the gap, leaving the first material on the bottom of the gap.

In some aspects, the techniques described herein relate to a method of filling a gap in a semiconductor substrate, the method including: forming a first material on a substrate surface having a gap formed therein, the gap having a bottom and at least one sidewall and a depth measured from a field of the substrate surface to the bottom of the gap, the bottom of the gap including a conductive material, the at least one sidewall of the gap including a dielectric material, the first material forming on the field of the substrate surface, the at least one sidewall and the bottom of the gap, the first material having a greater thickness on the field of the substrate surface and the bottom of the gap than the at least one sidewall of the gap; exposing the first material to an angular etch to reduce a thickness of the first material on the field of the substrate surface; plasma etching the first material from the substrate surface and the at least one sidewall leaving a first material seed layer on the bottom of the gap; and filling the structure in a bottom-up manner with first material to fill the gap.

Before describing several exemplary embodiments of the disclosure, it is to be understood that the disclosure is not limited to the details of construction or process steps set forth in the following description. The disclosure is capable of other embodiments and of being practiced or being carried out in various ways.

As used in this specification and the appended claims, the term “substrate” refers to a surface, or portion of a surface, upon which a process acts. It will also be understood by those skilled in the art that reference to a substrate can also refer to only a portion of the substrate, unless the context clearly indicates otherwise. Additionally, reference to depositing on a substrate can mean both a bare substrate and a substrate with one or more films or features deposited or formed thereon A “substrate” as used herein, refers to any substrate or material surface formed on a substrate upon which film processing is performed during a fabrication process. For example, a substrate surface on which processing can be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon doped silicon oxides, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, without limitation, semiconductor wafers. Substrates may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, e-beam cure and/or bake the substrate surface. In addition to film processing directly on the surface of the substrate itself, in the present disclosure, any of the film processing steps disclosed may also be performed on an underlayer formed on the substrate as disclosed in more detail below, and the term “substrate surface” is intended to include such underlayer as the context indicates. Thus, for example, where a film/layer or partial film/layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film/layer becomes the substrate surface.

“Atomic layer deposition” or “cyclical deposition” as used herein refers to a process comprising the sequential exposure of two or more reactive compounds to deposit a layer of material on a substrate surface. The substrate, or portion of the substrate, is exposed separately to the two or more reactive compounds which are introduced into a reaction zone of a processing chamber. In a time-domain ALD process, exposure to each reactive compound is separated by a time delay to allow each compound to adhere and/or react on the substrate surface and then be purged from the processing chamber. These reactive compounds are said to be exposed to the substrate sequentially. In a spatial ALD process, different portions of the substrate surface, or material on the substrate surface, are exposed simultaneously to the two or more reactive compounds so that any given point on the substrate is substantially not exposed to more than one reactive compound simultaneously. As used in this specification and the appended claims, the term “substantially” used in this respect means, as will be understood by those skilled in the art, that there is the possibility that a small portion of the substrate may be exposed to multiple reactive gases simultaneously due to diffusion, and that the simultaneous exposure is unintended.

In one aspect of a time-domain ALD process, a first reactive gas (i.e., a first precursor or compound A) is pulsed into the reaction zone followed by a first time delay. Next, a second precursor or compound B is pulsed into the reaction zone followed by a second delay. During each time delay, a purge gas, such as argon, is introduced into the processing chamber to purge the reaction zone or otherwise remove any residual reactive compound or reaction by-products from the reaction zone. Alternatively, the purge gas may flow continuously throughout the deposition process so that only the purge gas flows during the time delay between pulses of reactive compounds. The reactive compounds are alternatively pulsed until a desired film or film thickness is formed on the substrate surface. In either scenario, the ALD process of pulsing compound A, purge gas, compound B and purge gas is a cycle. A cycle can start with either compound A or compound B and continue the respective order of the cycle until achieving a film with the predetermined thickness.

In an embodiment of a spatial ALD process, a first reactive gas and second reactive gas (e.g., nitrogen gas) are delivered simultaneously to the reaction zone but are separated by an inert gas curtain and/or a vacuum curtain. The substrate is moved relative to the gas delivery apparatus so that any given point on the substrate is exposed to the first reactive gas and the second reactive gas. The gas curtain can be any suitable gas separation arrangement known to the skilled artisan. For example, in some embodiments of the a spatial ALD process chamber, a gas curtain is formed by a combination of purge gas ports and vacuum ports to maintain separation between the reactive gases to prevent gas-phase reactions.

As used in this specification and the appended claims, the terms “reactive compound”, “reactive gas”, “reactive species”, “precursor”, “process gas” and the like are used interchangeably to mean a substance with a species capable of reacting with the substrate surface or material on the substrate surface in a surface reaction (e.g., chemisorption, oxidation, reduction, cycloaddition). The substrate, or portion of the substrate, is exposed sequentially to the two or more reactive compounds which are introduced into a reaction zone of a processing chamber.

One or more embodiments of the disclosure advantageously provide approaches to selectively etch materials from a top of a surface structure without affecting the bottom of the structure. Some embodiments advantageously provide a seed layer at the bottom of a trench or via. Some embodiments allow for the removal of material from the field of the substrate surface without damaging the sidewall and/or bottom of the structure. Some embodiments allow for the removal of overhanging material caused by PVD deposition which can result in the pinching-off of gaps resulting in seams or voids in the gapfill material. Some embodiments advantageously are performed in a single processing chamber.

2 2 4 In one or more embodiments of the disclosure, a process for forming a film allows for the selective etching of materials (e.g., tungsten) from the top of a trench or via structure but not the bottom. In some embodiments, pure oxygen (O) or a combination of oxygen (O) and carbon tetrafluoride (CF), with an angular beam selectively etches tungsten from the top of the structure only.

1 FIG. 100 120 100 102 104 104 150 104 150 104 shows a schematic representation of a semiconductor manufacturing processing chamberwith an angular beam sourcein accordance with one or more embodiments of the disclosure. The semiconductor manufacturing processing chambercomprises a chamber bodyand a substrate support. The substrate supportis configured to support a semiconductor substrateduring processing. The substrate supportof some embodiments can move the semiconductor substratevertically and/or rotationally around an axis of the substrate support.

100 120 125 120 100 110 120 100 125 104 120 The semiconductor manufacturing processing chamberincludes an angular beam sourceconfigured to perform an angular etching process. The angular beam sourceof some embodiment is configured to move within the interior of the semiconductor manufacturing processing chamberin a path parallel to the surface of the substrate support. Stated differently, the angular beam sourceof some embodiments is configured to translate across the interior of the semiconductor manufacturing processing chamberto ensure that the angular etching processpasses across the entire substrate surface. The skilled artisan will be familiar with the mechanical components used to move or rotate the substrate supportand/or angular beam source. Suitable components include but are not limited to, motors and actuators.

120 150 150 125 150 In some embodiments, the angular beam source, also referred to as a ribbon source, has a width greater than or equal to a width of the semiconductor substrate. Having a ribbon source that is wider than the semiconductor substratehelps to ensure that the angular etching processcovers the entire surface of the semiconductor substrate.

110 150 110 150 In some embodiments, the substrate supportcomprises one or more of an electrostatic chuck or a heater. The skilled artisan will understand the construction and operation of both electrostatic chucks and heaters. In some embodiments, the temperature of the semiconductor substrateis controlled on the substrate supportusing the heater. In some embodiments, the semiconductor substrateis maintained at a temperature in the range of room temperature (25° C.) to 250° C., or in the range of 50° C. to 225° C., or in the range of 75° C. to 200° C., or in the range of 100° C. to 175° C.

100 130 102 130 100 100 100 120 120 The semiconductor manufacturing processing chamberhas an inlet/outletin a wall of the chamber body. The outletcan be used to flow a gas into the interior of the semiconductor manufacturing processing chamberor to evacuate gases from the interior of the semiconductor manufacturing processing chamber. The skilled artisan will be familiar with the operation of a semiconductor manufacturing processing chamberincluding the components used to provide gas flows into and/or out of the chamber interior. In some embodiments, there is a gas inlet in fluid communication with the angular beam sourceso that the angular beam generates ions and/or radicals from the gas flowing through the angular beam sourceinto the chamber interior.

2 FIG. 150 180 150 152 180 152 150 150 160 170 180 150 152 180 160 172 170 152 162 160 184 180 160 172 170 182 180 shows an expanded view of a semiconductor substratewith a gapin accordance with one or more embodiments of the disclosure. The semiconductor substratehas a substrate surfaceand the gapis formed in the substrate surfaceand extends a depth into the semiconductor substrate. In the illustrated embodiment, the semiconductor substratecomprises a dielectric materialand a conductive material. The gapextends into the semiconductor substratefrom the substrate surfaceto form the gapthrough the dielectric materialand exposing the top surfaceof the conductive material. The substrate surfaceis formed as the top surface or fieldof the dielectric material. The at least one sidewallof the gapare formed in the dielectric material. The top surfaceof the conductive materialis the bottomof the gap.

3 3 FIGS.A throughD 3 FIG.A 180 150 150 180 152 180 152 180 182 184 180 184 180 160 182 180 170 illustrate a method of filling a gapin a semiconductor substratein accordance with one or more embodiments of the disclosure.illustrates a semiconductor substratewith a gapformed in the substrate surface. The gapcan be any suitable opening in the substrate surface; for example, a trench or a via. The gaphas a bottomand sidewalls. While the illustrated embodiment shows a single gap, the skilled artisan will recognize that there can be any number of gaps, trenches or vias. The sidewallsof the gapare formed by the dielectric material, while the bottomof the gapcomprises a conductive material.

210 150 210 162 152 180 184 182 180 180 184 A first materialis formed on the semiconductor substrate. The first materialof some embodiments is formed on the fieldof the substrate surfaceoutside of the gap, on the sidewallsand the bottomof the gap. The gapmay be described as having sidewalls; however, the skilled artisan will recognize that a via is typically a cylindrical component which may be considered to have a single circular sidewall. Vias with a single circular sidewall, when shown in cross-section like the Figures, has two sides. The skilled artisan will understand that the term “sidewalls” refers to the walls of both trench and via surface structures.

210 210 The first materialcan be any suitable material known to the skilled artisan. In some embodiments, the first materialcomprises one or more of titanium silicide, tungsten, titanium, molybdenum, titanium nitride, tungsten carbide, ruthenium, ruthenium oxide, zirconium or tantalum nitride.

3 FIG.B 150 125 125 120 152 152 152 120 125 152 180 In, the semiconductor substrateis exposed to an angular etching process. The angular etching processof some embodiments comprises a angular beam source, also referred to as a ribbon source, that directs a stream of radicals and/or ions toward the substrate surface. The ribbon source creates a directional flow of ions and/or radicals at an angle to the substrate surface. As used herein, an angle of 0° is considered to be normal to (perpendicular to) the plane of the substrate surface. In some embodiments, the angular beam sourceis configured so that the angular etching processdirects ions and/or radicals at the substrate surfaceat an angle in the range of 50° to 85°, or in the range of 50° to 80°, or in the range of 55° to 75°, or in the range of 60° to 70°, where 0° is normal to the field of the semiconductor substrate. In some embodiments, the angle is sufficient to prevent ions or radicals from being directed to the bottom of the gap.

125 210 150 3 6 3 3 4 2 2 4 4 2 2 2 2 4 The angular etching processof some embodiment comprises comprises oxidizing or nitridating the first materialand directing ions toward the semiconductor substrateat an angle from a ribbon source. In some embodiments, the angular etch comprises radicals generated from one or more of Ar, CHF, SF, NF, CHF, CH, O, Clor CF. In some embodiments, the angular etch further comprises adding one or more of CFor Clto accelerate the etch rate. In some embodiments, nitrogen or oxygen do not damage the dielectric. In some embodiments, fluorine and chlorine may cause damage to the dielectric but have an accelerated material etch rate relative to the nitrogen and oxygen etch. In some embodiments, the angular etch comprises ions generated from one or more of N, O, Clor CF.

3 FIG.C 125 210 162 150 186 184 180 125 210 182 180 As shown in, the angular etching processremoves the first materialfrom a fieldof the semiconductor substrateand a top portionof the sidewallsof the gap. In some embodiments, the angular etching processleaves the first materialon the bottomof the gap.

210 186 184 180 180 220 220 3 FIG.D After the first materialhas been removed from the top portionof the at least one sidewallof the gap, as shown in, the gapis filled with a gapfill material. The gapfill materialcan be deposited by any suitable technique known to the skilled artisan including, but not limited to, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD) and plasma-enhanced atomic layer deposition (PEALD).

220 220 210 220 210 The gapfill materialcan be any suitable material. In some embodiments, the gapfill materialcomprises the same material as the first material. In some embodiments, the gapfill materialis a different material than the first material.

205 170 210 205 170 210 220 210 220 210 220 In some embodiments, as shown in the Figures, a linermaterial is deposited on the conductive materialprior to the deposition of the first material. The linercan be any suitable material known to the skilled artisan depending on, for example, the composition of the conductive material, the first materialand the gapfill material. In some embodiments, the first materialacts as the seed layer for the gapfill materialwhen both the first materialand gapfill materialcomprise the same material.

160 170 205 210 220 In some embodiments, the dielectric materialcomprises silicon nitride and the conductive materialcomprises silicon. In one or more embodiments, the linercomprises titanium silicon nitride. In some embodiments, the first materialcomprises titanium silicide. In some embodiments, the gapfill materialcomprises tungsten (W), deposited by chemical vapor deposition.

4 4 FIGS.A throughD 4 FIG.A 180 210 152 210 210 162 152 182 180 184 180 210 180 170 182 180 205 230 162 184 182 180 230 illustrate another embodiment of the method which the angular etch is used to prepare a seed layer at the bottom of the gap. As shown in, a first materialis formed on the substrate surfaceusing a suitable deposition technique. In some embodiments, the first materialis deposited by physical vapor deposition (PVD), resulting in a first materialwith a greater thickness on the fieldof the substrate surfaceand the bottomof the gaprelative to the at least one sidewallof the gap. The deposition process for forming the first materialis a directional process using a biased substrate resulting in the overhang material forming at the top portion of the gap. In the illustrated embodiment, the conductive materialat the bottomof the gaphas a liner. A second materialis formed on the field, the sidewallsand the bottomof the gap. In some embodiments, the second materialis a material deposited conformally by an suitable technique including, but not limited to, atomic layer deposition.

210 125 210 162 152 125 210 182 180 4 FIG.A 4 FIG.B After exposing the first materialto the angular etching processin, the thickness of the first materialis reduced on the fieldof the substrate surface, as shown in. The angular etching processof some embodiments results in first materialwith a gradient thickness, with the thickest portion at the bottomof the gap.

4 FIG.C 4 FIG.B 150 210 152 186 184 180 215 180 230 210 160 shows the embodiment ofafter exposing the semiconductor substrateto a plasma etching process to remove the first materialfrom the substrate surfaceand the top portionof the sidewallsof the gap. This leaves a first material seed layerat the bottom of the gap. In some embodiments, as shown in the Figures, the plasma etching process also removes the second materialwith the first materialleaving the surfaces of the dielectric materialexposed.

5 5 In some embodiments, the plasma etching process to remove the first material comprises an inductively coupled plasma (ICP) oxidation and exposure to tungsten pentachloride (WCl). ICP plasma and WClgas can damage the underneath layer (TiSi) and Epi.

4 FIG.D 4 FIG.C 180 210 220 220 shows the embodiment ofafter filling the gapin a bottom-up manner with additional first materialto create a gapfill material. In some embodiments, the gapfill materialis formed by chemical vapor deposition.

4 2 2 2 2 4 In a prophetic example, a structure having tungsten (W) or titanium (Ti) material would be prepared and loaded into a suitable processing chamber. An ion beam using O and CFradicals can be used to create fluorine ions with angular direction of about 60° and will etch away only the W from the top of the structure not from the bottom. During the process, the wafer can be rotated and the pedestal temperature held at room temperature. Twenty scans of the beam across the substate surface can consume all fluorine chemistries on the field (in a starving mode) so the fluorine ions do not reach the bottom of the structure. An amount of argon (Ar) and nitrogen (N) can be added to increase beam stability. Pressure can be maintained at about 3E-5Torr, power for the Osource is about 1500 W and power for Ar is about 750 W. The ratio of the flows of Ar, N, Oand CFis about 2:2:10:50 sccm.

Reference throughout this specification to “one embodiment,” “certain embodiments,” “one or more embodiments” or “an embodiment” means that a particular feature, structure, material, or characteristic described in connection with the embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of the phrases such as “in one or more embodiments,” “in certain embodiments,” “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily referring to the same embodiment of the disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

Although the disclosure herein has been described with reference to particular embodiments, those skilled in the art will understand that the embodiments described are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the method and apparatus of the present disclosure without departing from the spirit and scope of the disclosure. Thus, the present disclosure can include modifications and variations that are within the scope of the appended claims and their equivalents.