Multi-Phase Current Control Based on Temperature

One type of conventional power converter is a buck converter. In general, to maintain an output voltage within a desired range, a controller associated with the buck converter compares the magnitude of a generated output voltage to a setpoint reference voltage. Based on a respective error voltage, the controller modifies a respective switching frequency and/or pulse width modulation associated with activating high side switch circuitry and low side switch circuitry in the buck converter to maintain a magnitude of the output voltage.

In certain instances, the controller controls operation of the buck converter and generation of the output voltage based on an amount of output current supplied by a generated output voltage to a load. For example, conventional techniques include receiving a so-called VID (Voltage Identification) from a load such as a processor being powered by the output voltage. The VID indicates a setpoint voltage in which to produce the output voltage to power the load. The magnitude of the VID setting (such as setpoint reference voltage) may vary depending on a magnitude of the output current. In a manner as previously discussed, the controller of the power supply can be configured to regulate a magnitude of the output voltage supplied to the load based on a target setpoint voltage derived from the received VID value.

Conventional power supply systems may include implementation of multiple buck converters in parallel to produce a respective output voltage that powers a load. Typically the power supply system includes a single controller operative to generate control signals for each of the multiple power converter phases. If there are many phases controlled by the single controller, many circuit paths are needed to support conveyance of control signals to each of the multiple power converter phases. Additionally, each of the power converter phases provides individual feedback to the single controller. Thus, additional circuit paths are needed to convey the feedback from the multiple power converter phases to the single controller.

Implementation of clean energy (or green technology) is very important to reduce our impact as humans on the environment. In general, clean energy includes any evolving methods and materials to reduce an overall toxicity to the environment as caused by energy consumption.

This disclosure includes the observation that raw energy, such as received from green energy sources or non-green energy sources, typically needs to be converted into an appropriate form (such as desired AC voltage, DC voltage, etc.) before it can be used to power end devices such as servers, computers, mobile communication devices, etc. Regardless of whether energy is received from green energy sources or non-green energy sources, it is desirable to make most efficient use of raw energy provided by such systems to reduce our impact on the environment. This disclosure contributes to reducing our carbon footprint (and green energy) via more efficient energy conversion.

Additionally, this disclosure includes the observation that it is desirable to reduce the number of circuit paths needed to support conveyance signals between a controller and multiple power converter phases controlled by the controller. Reducing a number of circuit paths beneficially reduces the complexly of implementing a respective power supply including corresponding multiple power converter phases.

More specifically, an apparatus as discussed herein comprises: a first power converter operative to: receive a first temperature value indicating a temperature of the first power converter, the first power converter supplying first current to a load; receive a second temperature value indicating a temperature of a second power converter, the second power converter supplying second current to the load; and adjust a magnitude of the first current based on a comparison of the first temperature value and the second temperature value.

The comparison of the first temperature value and the second temperature value may indicate that the first power converter is lower in temperature than the second power converter. The first power converter can be configured to: receive a first pulse width modulation control signal, the first pulse width modulation control signal supplied to both the first power converter and the second power converter to control the first current and the second current; and in response to the first temperature value being less than the second temperature value, adjust timing of an edge of the received first pulse width modulation control signal to produce a second pulse width modulation control signal, the second pulse width modulation control signal operative to control a magnitude of the first current.

In one example, the edge is a trailing edge of the received first pulse width modulation control signal.

In another example, a duty cycle of the first pulse width modulation signal received by the first power converter is adjusted by a controller in response to the first power converter adjusting a magnitude of the first current.

Yet further, the first power converter can be configured to discontinue increasing the magnitude of the first current in response to detecting that the first temperature value is within a threshold level of the second temperature value.

Still further, the first power converter can be configured to adjust a magnitude of the first current via selection of a delay signal from a tapped delay line to control a respective timing of an edge of a first control signal controlling the magnitude of the first current.

As further discussed herein, the first power converter may be operative to adjust the magnitude of the first current via implementation of a first current starved inverter circuit, the current starved inverter circuit operative to adjust timing of a trailing edge of a first control signal to produce a second control signal, the second control signal operative to control the magnitude of the first current.

In accordance with another example, the first power converter can be configured to: i) receive a first control signal to control a magnitude of the first current, and ii) via a continuous delay element circuit, convert the first control signal into a second control signal, the current continuous delay element circuit operative to control timing of a trailing edge of the second control signal.

Another apparatus as discussed herein can be configured to include a first power converter operative to: receive a control signal supplied to each of multiple power converters including the first power converter and a second power converter; receive temperature information associated with the first power converter and the second power converter; and adjust the control signal based on the received temperature information, the adjusted control signal operative to control first current outputted from the first power converter to a load.

The temperature information may include a first temperature value and a second temperature value, where the first temperature value indicates a temperature of the first power converter and where the second temperature value indicates a temperature of the second power converter.

In one example, the control signal is a pulse width modulation control signal supplied to both the first power converter and the second power converter. Adjustment of the control signal based on the temperature information may include the first power converter or other suitable entity adjusting a duty cycle of the pulse width modulation control signal implemented by the first power converter to produce the first current in response to a condition in which the second temperature value is greater than the first temperature value. The adjusted duty cycle of the pulse width modulation control signal may be implemented by the first power converter is operative to reduce: i) a magnitude of second current supplied by the second power converter to the load, and ii) a magnitude of the temperature of the second power converter.

Additional examples as discussed herein include methods. One method includes operations of: receiving a first temperature value indicating a temperature of a first power converter, the first power converter supplying first current to a load; receiving a second temperature value indicating a temperature of a second power converter, the second power converter supplying second current to the load; and adjusting a magnitude of the first current based on a comparison of the first temperature value and the second temperature value.

Techniques as discussed herein are useful over conventional techniques. For example, the temperature-based adjustments to a common pulse width modulation control signal as discussed herein is a novel distributed control function supporting better balance of temperature. This, in turn, supports efficient power conversion via less complex power converter circuitry.

These and other more specific examples are disclosed in more detail below.

Note that although examples as discussed herein are applicable to power converters, the concepts disclosed herein may be advantageously applied to any other suitable topologies as well as general power supply control applications.

Note that any of the resources as discussed herein can include one or more computerized devices, controller, mobile communication devices, servers, base stations, wireless communication equipment, communication management systems, workstations, user equipment, handheld or laptop computers, or the like to carry out and/or support any or all of the method operations disclosed herein. In other words, one or more computerized devices or processors can be programmed and/or configured to operate as explained herein to carry out the different examples as described herein.

Yet other examples herein include software programs to perform the steps and operations summarized above and disclosed in detail below. One such example comprises a computer program product including a non-transitory computer-readable storage medium (i.e., any computer readable hardware storage medium) on which software instructions are encoded for subsequent execution. The instructions, when executed in a computerized device (hardware) having a processor, program and/or cause the processor (hardware) to perform the operations disclosed herein. Such arrangements are typically provided as software, code, instructions, and/or other data (e.g., data structures) arranged or encoded on a non-transitory computer readable storage medium such as an optical medium (e.g., CD-ROM), floppy disk, hard disk, memory stick, memory device, etc., or other a medium such as firmware in one or more ROM, RAM, PROM, etc., or as an Application Specific Integrated Circuit (ASIC), etc. The software or firmware or other such configurations can be installed onto a computerized device to cause the computerized device to perform the techniques explained herein.

Accordingly, examples herein are directed to methods, systems, computer program products, etc., that support operations as discussed herein.

1 1 1 1 2 2 2 1 1 2 One example herein includes a computer readable storage medium and/or system having instructions stored thereon. The instructions, when executed by computer processor hardware, cause the computer processor hardware (such as one or more co-located or disparately located processor devices) to: receive a first temperature value (TPHASE) indicating a temperature of a first power converter PC, the first power converter PCsupplying first current Ito a load; receive a second temperature value (TPHASE) indicating a temperature of a second power converter PC, the second power converter supplying second current Ito the load; and adjust a magnitude of the first current Ibased on a comparison of the first temperature value TPHASEand the second temperature value TPHASE.

The ordering of the steps above has been added for clarity sake. Note that any of the processing operations as discussed herein can be performed in any suitable order.

Other examples of the present disclosure include software programs and/or respective hardware to perform any of the method example steps and operations summarized above and disclosed in detail below.

It is to be understood that the system, method, apparatus, instructions on computer readable storage media, etc., as discussed herein also can be implemented strictly as a software program, firmware, as a hybrid of software, hardware and/or firmware, or as hardware alone such as within a processor (hardware or software), or within an operating system or a within a software application.

As discussed herein, techniques herein are well suited for use in the field of implementing one or more power converters to deliver current to a load. However, it should be noted that examples herein are not limited to use in such applications and that the techniques discussed herein are well suited for other applications as well.

Additionally, note that although each of the different features, techniques, configurations, etc., herein may be discussed in different places of this disclosure, it is intended, where suitable, that each of the concepts can optionally be executed independently of each other or in combination with each other. Accordingly, the one or more present inventions as described herein can be implemented and viewed in many different ways.

Also, note that this preliminary discussion of examples herein (BRIEF DESCRIPTION OF EXAMPLES) purposefully does not specify every example and/or incrementally novel aspect of the present disclosure or claimed invention(s). Instead, this brief description only presents general examples and corresponding points of novelty over conventional techniques. For additional details and/or possible perspectives (permutations) of the invention(s), the reader is directed to the Detailed Description section (which is a summary of examples) and corresponding figures of the present disclosure as further discussed below.

1 FIG. is an example diagram illustrating implementation of a power converter including multiple power converter phases controlled by a multiphase controller as discussed herein.

2 FIG. is an example diagram illustrating a power converter and corresponding circuitry as discussed herein.

3 FIG. is an example diagram illustrating implementation of the power converter including multiple power converter phases controlled by a multiphase controller as discussed herein.

4 FIG. is an example diagram illustrating a power converter and corresponding circuitry as discussed herein.

5 FIG. is an example timing diagram illustrating adjustment of a trailing edge of a pulse width modulation control signal to produce an outputted control signal as discussed herein.

6 FIG. is an example diagram illustrating a pulse width modulation signal generator operable to adjust leading and/or trailing edges of a respective received control signal as discussed herein.

7 FIG. is an example diagram illustrating a pulse width modulation signal generator operable to adjust leading and/or trailing edges of a respective received control signal as discussed herein.

8 FIG. is an example diagram illustrating a variable delay circuit operative to delay a clock signal as discussed herein.

9 FIG. is an example diagram illustrating delay versus input voltage associated with the variable delay circuit as discussed herein.

10 FIG. is an example diagram illustrating a hybrid pulse width modulation signal generator providing edge delay as discussed herein.

11 FIG. is an example flow chart diagram illustrating operations of controlling output of current from each of multiple different power converters as discussed herein.

12 FIG. is an example diagram illustrating computer processor hardware and related software instructions operative to execute methods as discussed herein.

13 FIG. is an example diagram illustrating a method and corresponding functionality associated with a circuit as discussed herein.

The foregoing and other objects, features, and advantages of the invention will be apparent from the following more particular description of preferred examples herein, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, with emphasis instead being placed upon illustrating the examples, principles, concepts, etc.

A power supply includes multiple power converter phases. As discussed herein, a power converter controller associated with a first power converter receives a first temperature value indicating a temperature of the first power converter. The first power converter supplies first current to a load. The power converter controller associated with the first power converter also receives a second temperature value indicating a temperature of a second power converter. The second power converter supplies second current to the load. The first power converter adjusts a magnitude of the first current based on a comparison of the first temperature value and the second temperature value.

Adjustment of the magnitude of the first current supplied by the first power converter to the load may include increasing a magnitude of the first current, which results in a decrease of the second current supplied by the second power converter to the load. The increase in the magnitude of the first current may increase the temperature of the first power converter while the decrease in the magnitude of the second current may decrease the temperature of the second power converter, resulting in a better balance of temperature between the first power converter and the second power converter even though they supply different magnitudes of current to the load.

As discussed herein, temperature sensing may be performed on a per loop basis, where each of multiple power converter TMON pins are tied together and fed to a TSEN pin of a central controller. In one example, the TMON signal communicated to the central controller may be an ORing of the highest voltage (corresponding to a highest temperature power converter). The highest voltage is encoded to indicate the temperature of the highest temperature power converter. In such an instance, the central controller of each power converter phases is aware of the highest temperature power converter amongst the multiple power converters collectively producing an output voltage and corresponding output current to power a load.

It is further noted that the temperature magnitude of each of the different power converters may vary depending upon a respective amount of current supplied to the load. As previously discussed, one function of the power converters and corresponding distributed controllers as discussed herein is to achieve better thermal balance amongst the multiple power converters, without an excessive current imbalance amongst the multiple power converters. In other words, monitoring of temperatures associated with the power converter phases and the thermal balance of the multiple power converters as discussed herein may result in current imbalance. However, the amount of thermal balancing amongst the power converter phases as discussed herein may be limited so that there is not excessive current imbalance amongst the different power converters providing respective current to the load.

As a more specific example as discussed herein, to achieve thermal balance, cooler phases (phases with temperature lower than the TMON signal of the hottest power converter) increase their respective duty cycle (such as by increasing edge delay of a received pulse width modulation control signal) to increase current provided by that power converter phase to the load. The increase in the current provided by the one or more cooler power converters reduces the amount of current provided by the hottest power converter. Reduction in the current provided by the hottest power converter results in cooling of the hottest power converter.

Note further that the power converter phases determined as being cooler than the hottest power converter phase may adjust any edge such as a trailing edge of a respective received pulse width modulation to increase the duty cycle of the received common pulse width modulation signal and provide a higher amount of current to the respective load. If desired, the leading edge of the received pulse width modulation control signal may be adjusted to achieve fine resolution.

As previously discussed, the increases in the current supplied by the cooler power converter phases results in reduction in the amount of current supplied by the hottest power converter phase. Thus, via a voltage regulation control loop implemented via a central controller as discussed herein, hotter phases will end up supplying less current to a load based on the cooler power converter phases increasing their current. The lowering of current supplied by the hottest power converter phase results in a lowering of the temperature of the hottest power converter phase such that the magnitude of temperatures associated with all of the power converter phases are more balanced with respect to each other within a certain limit.

1 FIG. is an example diagram illustrating implementation of a respective power supply including multiple distributed power converter phases controlled by a (central) multiphase controller as discussed herein.

100 140 11 21 111 112 121 122 110 118 1 FIG. As shown, power supplyinincludes controller(such as a multiphase controller, current controller, controller hardware, etc.), resistor R, resistor R, power converter phase, power converter phase, power converter phase, power converter phase, output capacitor C, and dynamic load.

118 Each of the power converters (such as power converter phases) as discussed herein can be configured to include a respective distributed temperature balancer function DTBxx (a.k. a., distributed temperature balancer, controller, hardware, circuitry, etc., such as being digital-circuit-based, analog-circuit-based, or a combination of analog-circuit-based and digital-circuit-based). Via the distributed temperature balance functions DTBxx, the hotter power converter phases will end up supplying less current (reducing their temperature) based on the cooler power converter phases increasing their output current supplied to the dynamic load.

111 11 11 112 12 12 121 21 21 122 22 22 For example, the power converter phaseincludes temperature balance function DTB(such as a Distributed Temperature Balancer DTB), the power converter phaseincludes temperature balance function DTB(such as a Distributed Temperature Balancer DTB), the power converter phaseincludes temperature balance function DTB(such as a Distributed Temperature Balancer DTB), the power converter phaseincludes the temperature balance function DTB(such as a Distributed Temperature Balancer DTB).

123 122 118 The power converter phases are operated in parallel to produce the output voltageand corresponding output currentsupplied to the dynamic load.

Accordingly, each temperature balance function as discussed herein can be considered a controller, signal generator, etc.

100 118 Each of the power converter phases in the power supplycan be configured to produce a respective feedback signal indicating a magnitude of corresponding current supplied by that power converter phase to the load.

111 11 111 11 118 11 122 123 1 11 111 11 11 11 11 11 111 11 11 11 For example, the power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to generation of output currentand maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The temperature balance function DTBor other suitable entity associated with the power converter phaseproduces the respective output signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N(circuit path), where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

112 12 112 12 118 12 123 1 12 112 12 12 12 12 12 112 11 12 11 The power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The temperature balance function DTBor other suitable entity associated with the power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis an outputted current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N, where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

1 11 140 11 12 111 112 118 1 140 111 112 118 In such an instance, the voltage IAVGat node Nsupplied to the multiphase controllerindicates a magnitude of total current (such as magnitude of total current as being summation of current iand current i) provided by a combination of the power converter phaseand power converter phaseto the load. Accordingly, communication of the signal IAVGto the controllerindicates a total current provided by a combination of the power converter phaseand the power converter phaseto the load.

121 21 121 21 118 21 122 123 1 21 121 21 21 21 21 21 121 21 21 21 As further shown, the power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to generation of the output currentand maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The temperature balance function DTBor other suitable entity associated with the power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N(such as circuit path), where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

122 22 112 22 118 22 123 1 22 122 22 22 22 22 22 122 21 22 21 The power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The temperature balance function DTBor other suitable entity associated with the power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N, where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

2 12 21 22 121 122 118 2 140 121 122 118 In such an instance, the voltage IAVGat node Nindicates a magnitude of total current (such as magnitude of total current as being summation of current iand current i) provided by the power converter phaseand power converter phaseto the load. Accordingly, communication of the signal IAVGto the controllerindicates a total current provided by a combination of the power converter phaseand the power converter phaseto the load.

111 11 112 12 121 21 122 22 It is further noted that each of the power converter phases as discussed herein includes a respective terminal to receive or transmit temperature information. For example, the power converter phaseincludes the terminal T(such as node, pin, port, etc.); the power converter phaseincludes the terminal T(such as node, pin, port, etc.); the power converter phaseincludes the terminal T(such as node, pin, port, etc.); the power converter phaseincludes the terminal T(such as node, pin, port, etc.).

11 12 21 22 99 140 99 140 Each of the terminals T, T, T, Tare connected to a common node N, which supplies signal TPHMAX to the multiphase controller. The power converter being of the highest temperature outputs the signal TPHMAX to the other power converters. In one example, each of the power converter phases attempts to output a respective signal to the node N, where the output signal is encoded to indicate a temperature of the respective power converter phase transmitting the signal. However, the combination of the outputted temperature signals operates in an ORing fashion such that the signal TPHMAX represents the temperature signal transmitted by the hottest power converter phase. Thus, the multiphase controllermay not know which one is the hottest power converter phase, but is notified of the hottest power converter phase. Via the signal TPHMAX, each of the power converter phases is also aware of the hottest power converter phase, which may or may not be itself. Each power converter phase also is aware of its own temperature.

1 FIG. 140 131 123 140 1 123 As further shown in, the multiphase controllercan be configured to receive feedback signalindicating a magnitude of the output voltage. Note further that the controlleralso receives the setpoint reference voltage VREF, indicating a desired magnitude in which to control the magnitude of the output voltage.

131 123 1 140 1 111 112 118 2 121 122 118 Based on the received feedback(magnitude of the output voltage) and corresponding reference voltage VREF, the controller: i) generates the pulse width modulation control signal PWMto control a magnitude of respective output current supplied by each of the power converter phaseand power converter phaseto the load, and ii) generates the pulse width modulation control signal PWMto control a magnitude of the respective output current supplied by each of the power converter phaseand power converter phaseto the load.

140 As further discussed herein, each of the power converter phases provides adjustment to the respective pulse width modulation signal received from the multiphase controllersuch that the power converter phases themselves also provide temperature regulation of the power converter phases.

123 140 1 2 140 111 112 121 122 118 More specifically, in furtherance of controlling (regulating) the magnitude of the output voltage, the controllerproduces the respective pulse width modulation control signals PWMand PWM. Each of the respective groups of power converter phases receives a respective pulse width modulation control signal indicating the target magnitude of controlling a respective output current to the load. Rather than simply use the received pulse width modulation control signal received from the controllerto drive the corresponding high-side and low-side switches in the respective power converter phase, each of the power converter phases further implements a respective temperature balance function that supports equalizing or providing better balance of the magnitude of the power converter temperatures by that group (such as a first group including the power converter phase, power converter phase, etc., or a second group including the power converter phase, power converter phase, etc.) to the load.

140 1 12 111 112 More specifically, the controllerproduces the respective pulse width modulation control signal PWMand supplies it over node N(i.e., circuit path) to the power converter phaseand the power converter phase.

140 2 22 121 122 The controllerproduces the respective pulse width modulation control signal PWMand supplies it over node N(i.e., circuit path) to the power converter phaseand the power converter phase.

111 112 1 111 112 11 12 118 140 As discussed herein, in general, the respective temperature balance function associated with each of the power convertersandadjusts the received pulse width modulation control signal PWMto control its respective output current such that each of the power converter phasesandadjusts its respective current (for example, iand i) to the loadsuch that the temperature of the power converter phases are closer in magnitude to each other. Thus, the function of providing temperature balance amongst the multiple power converter phases as discussed herein is distributed to the power converter phases themselves as opposed to the controllerhaving the burden of producing and transmitting individual control signals to each of the power converter phases to balance power converter phase temperature.

140 2 22 121 122 2 121 122 21 22 118 140 As further shown, the controllerproduces the respective pulse width modulation control signal PWMand supplies it over node N(i.e., circuit path) to the power converter phaseand the power converter phase. As discussed herein, the respective temperature balance function associated with each of the power converters adjusts the received pulse width modulation control signal PWMsuch that each of the power converter phasesandadjusts its respective output current (for example, iand i) to the loadsuch that the temperature of the power converter phases are closer in magnitude to each other, providing better temperature balance amongst the power converter phases. Thus, the function of providing temperature balance amongst the multiple power converter phases is distributed to the power converter phases themselves as opposed to the controllerhaving the burden of producing and transmitting individual control signals to each of the power converter phases to balance power converter phase temperature.

140 118 140 1 11 12 111 112 140 2 21 22 121 122 118 It is further noted that the controllercan be configured to control the groupings of power converter phases to provide different magnitudes of current to the respective load. For example, the controllercan be configured to generate the control signal PWMto supply a first magnitude of current (sum of current iand isuch as 20 amps or other suitable amount) from a combination of the power converter phaseand the power converter phaseto the load. The controllercan be configured to generate the control signal PWMto supply a second magnitude of current (sum of current iand isuch as 40 amps or other suitable amount) from a combination of the power converter phaseand the power converter phaseto the load.

The additional function of providing temperature balance amongst the power converter phases as discussed herein reduces stress associated with the power converter phases that supply respective current to the load. For example, if the total current required by a load is 40 amps and each of the first power converter phase and the second power converter phase is controlled to supply 20 amperes to the load without adjustments by the individual power converter phases, this may stress the first power converter phase (such as being a temperature of 100 degrees Celsius) and not stress the second power converter phase (such as being a temperature of 70 degrees Celsius). Based on the temperature balancing as discussed herein, the second power converter phase may increase its magnitude of supplying current to the load from 20 amps to 25 amps. This increase in output current hide by the second power converter phase may result in the second power converter phase increasing in temperature, however, this reduces the amount of current required to be delivered by the first power converter to the load, which reduces a temperature of the first power converter. Distributed balancing of each of the power converters to a temperature around 85 degrees based on each implementing output current adjustments may result in the first power converter supplying 15 amperes while the second power converter supplies 25 amperes to the load, resulting in both of the first power converter phase of the second power converter phase being nearer in temperature to each other such as 85 degrees Celsius each.

2 FIG. is an example diagram illustrating a power converter and corresponding circuitry as discussed herein.

1 FIG. This example illustrates the circuitry associated with each of the power converter phases as shown in. As discussed below, the value of X may be 1 or 2, corresponding to the different power converter phases, each of which operate in a similar manner.

111 112 1 150 1 1 1 22 21 For example, each of the respective power converter phases (power converter phase,, etc.) includes a temperature balance function DTBX, driver circuitry-X, high-side switch circuitry SX-H, low side switch circuitry SX-L, inductor LX, temperature monitorX, and current monitorX.

111 11 150 1 11 11 11 221 211 112 12 150 2 12 12 12 222 212 In such an instance, the power converter phase(11) includes a temperature balance function DTB, driver circuitry-, high-side switch circuitry S-H, low side switch circuitry S-L, inductor L, temperature monitor, and current monitor; the power converter phase(12) includes a temperature balance function DTB, driver circuitry-, high-side switch circuitry S-H, low side switch circuitry S-L, inductor L, temperature monitor, and current monitor, and so on.

1 1 140 1 1 1 123 1 1 As previously discussed, the temperature balance function DTBX receives the pulse width modulation control signal PWMgenerated by the controller. The temperature balance function DTBX also receives the local temperature TPHASEX (temperature of itself) of the power converter phaseX and the temperature value (TPHMAX) indicating a highest temperature of a remote power converter phase producing the respective output voltage. If the respective power converter phaseX is the highest temperature, then the temperature TPHASEX equals TPHMAX and the corresponding power converter phase outputs this value to the other power converter phases.

1 1 1 1 1 1 1 118 As discussed herein, if the given power converter phase is the highest temperature amongst all the phases, then that power converter phase does not adjust the duty cycle of the received pulse width modulation signal PWMto produce the pulse width modulation control signal PWMXC. However, if the given power converter phase is not the highest temperature amongst all the phases as determined from the local temperature value with respect to the received highest temperature TPHMAX from the hottest power converter phase through the terminal TX, then that power converter phase can be configured to adjust the duty cycle of the received pulse width modulation signal PWMto produce the pulse width modulation control signal PWMXC. In this latter instance, because the power converter phase is not the highest temperature, the temperature balance function DTBX increases the duty cycle of the received pulse width modulation signal PWMto control switch circuitry SX-H to produce the pulse width modulation control signal PWMXC. The increased duty cycle increases a magnitude of the amount of current iX supplied by that power converter phase to the load.

299 299 191 191 1 1 1 1 277 1 1 1 1 1 118 As further shown, the respective power converter phase can be configured to include summer function-X to receive the signal TPHMAX and signal TDEAD. Signal TDEAD is a temperature margin value. The summer function-X produces the signal TPHMAX minus TDEAD (TPHMAX-TDEAD) and supplies it to the comparator function-X. In one example, the comparator function-X compares the signal (TPHMAX-TDEAD) to the local temperature TPHASEX of the power converter phaseX. If the local temperature TPHASEX of the power converter phaseX as indicated by signal-X is less than the signal (TPHMAX-TDEAD), the temperature balance function DTBX adjusts (increases) the duty cycle of the received pulse width modulation signal PWMto produce the pulse width modulation control signal PWMXC used to control the respective switches SX-H and SX-L. The increased duty cycle associated with the pulse width modulation signal PWMXC increases a magnitude of the current iX supplied by that power converter phase to the corresponding load.

118 118 Thus, if the first power converter phase determines that it is not the hottest power converter phase, it can be configured to increase the magnitude of its output current supplied to the load, resulting in an increase in a temperature of the first power converter phase. The increase in magnitude of the output current supplied by the first power converter phase to the loadresults in a reduced temperature of the second power converter phase.

1 118 As discussed herein, the duty cycle or pulse width ON-time associated with the adjusted pulse width modulation control signal PWMXC can be increased or decreased by adjusting one or more of a leading edge or trailing edge of the corresponding control signal PWMXC. Thus, the leading edge or trailing edge of the control signal PWMand/or control signal PWMXC can be adjusted such that the lower temperature power converter phases supply more current to the dynamic load.

1 FIG. 11 1 111 111 111 11 118 112 2 111 99 2 112 112 112 12 118 111 11 1 2 111 112 111 1 1 11 111 118 11 1 2 111 1 1 111 11 118 118 123 140 131 123 1 1 Accordingly, with reference to, the temperature balance function DTBcan be configured to receive a first temperature value (local temperature TPHASEof the power converter) indicating a temperature of the first power converter, the first power convertersupplying first current ito the dynamic load. The power convertermay operate at a second temperature (hottest temperature) resulting in transmission of a second temperature value (TPHASEor TPHMAX) to the power converter phasevia node N. The second temperature value TPHASEor TPHMAX received from the power converter phaseindicates the temperature of the second power converter. The second power converter phasesupplies second current ito the load. The power converter phaseand corresponding temperature balance function DTBcan be configured to compare the first temperature value TPHASEor TPHMAX or adjusted value (TPHMAX-TDEAD) to the second temperature value TPHASEto learn that the power converter phaseis at a substantially lower temperature than the power converter phase. In such an instance, the power converter phaseadjusts the duty cycle associated with the received pulse width modulation control signal PWMto produce the adjusted pulse width modulated control signal PWMC controlling the magnitude of the current isupplied by the power converter phaseto the load. In one example, adjustment of the magnitude of the first current ibased on a comparison of the first temperature value TPHASEand the second temperature value TPHASEor TPHMAX or (TPHMAX-TDEAD) includes power converter phaseincreasing the duty cycle associated with the pulse width modulation control signal PWMC (relative to the received pulse width modulation control signal PWM) such that the power convertersupplies an increase amount of current ito the load. The increased magnitude of current supplied to the loadmay result in the magnitude of the output voltagetemporarily increasing. Via a first feedback loop, the multiphase controllerreceives the feedbacksuch as the magnitude of the output voltageand then adjusts the duty cycle of the pulse width modulation control signal PWMsuch that the magnitude of the voltage is regulated with respect to a desired setpoint reference voltage VREF. The second control loop implemented by the power converter phases uses temperature as a basis in which to locally and individually (in a distributed manner at each of the different power converter phases) adjust output current from each phase such that the temperature associated with each of the different power converters is more balanced (more similar magnitude, although not necessarily exactly equal but at least within a temperature margin value such as TDEAD).

3 FIG. is an example diagram illustrating implementation of the power converter including multiple power converter phases controlled by a multiphase controller as discussed herein.

100 2 140 4 101 102 103 104 110 118 3 FIG. As shown, power supply-inincludes controller(such as a multiphase controller, current controller, controller hardware, etc.), resistor R, power converter phase, power converter phase, power converter phase, power converter phase, output capacitor C, and dynamic load.

101 1 1 102 2 2 103 3 3 104 4 4 Each of the power converters as discussed herein can be configured to include a respective temperature balancer function (a.k. a., temperature balancer, controller, hardware, circuitry, etc., such as being digital-circuit-based, analog-circuit-based, or a combination of analog-circuit-based and digital-circuit-based). For example, the power converter phaseincludes temperature balance function DTB(such as Distributed Temperature Balancer DTB), the power converter phaseincludes temperature balance function DTB(such as Distributed Temperature Balancer DTB), the power converter phaseincludes temperature balance function DTB(such as Distributed Temperature Balancer DTB), the power converter phaseincludes the temperature balance function DTB(such as Distributed Temperature Balancer DTB).

Accordingly, each temperature balance function as discussed herein can be considered a controller, signal generator, etc.

100 2 118 Each of the power converter phases in the power supply-produces a respective feedback signal indicating a magnitude of corresponding current supplied by that power converter phase to the load.

101 1 101 1 118 1 123 1 101 1 1 1 1 1 101 31 1 4 For example, the power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The power converter phaseor other suitable entity produces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N(circuit path), where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

102 2 102 2 118 2 123 1 102 2 2 2 2 2 102 31 2 4 The power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N, where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

103 3 103 3 118 3 123 1 103 3 3 3 3 3 103 31 3 4 The power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N, where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

104 4 104 4 118 4 123 1 104 4 4 4 4 4 104 31 4 4 The power converter phaseincludes a corresponding current monitor operative to measure a magnitude of the current isupplied by the power converter phasethrough the inductor Lto the corresponding load. The current icontributes to maintaining a magnitude of the output voltageat a desired setpoint reference voltage VREF. The power converter phaseproduces the respective signal ISENindicating a magnitude of the current i. In one example, the signal ISENis a current proportional to the magnitude of the current i. The signal ISENis outputted from the power converter phaseto the node N, where the corresponding current from the signal ISENflows through the resistor Rto the ground reference voltage.

31 1 2 3 4 101 102 103 104 118 In such an instance, the voltage IAVG at node Nindicates a magnitude of total current (such as magnitude of total current being summation of currents i, i, i, and i) provided by the power converter phases,,, and, to the load.

140 118 Accordingly, communication of the signal IAVG to the controllerindicates a total current provided by a combination of the power converter phases to the load.

3 FIG. 140 131 123 140 1 123 As further shown in, the controllercan be configured to receive feedback signalindicating a magnitude of the output voltage. Note further that the controlleralso receives the setpoint reference voltage VREF, indicating desired magnitude in which to control the magnitude of the output voltage.

140 1 1 101 123 The controllergenerates the pulse width modulation control signals PWMto control a magnitude of respective output current isupplied by the power converter phaseto the load.

140 2 2 102 123 The controllergenerates the pulse width modulation control signals PWMto control a magnitude of respective output current isupplied by the power converter phaseto the load.

140 3 3 103 123 The controllergenerates the pulse width modulation control signals PWMto control a magnitude of respective output current isupplied by the power converter phaseto the load.

140 4 4 104 123 The controllergenerates the pulse width modulation control signals PWMto control a magnitude of respective output current isupplied by the power converter phaseto the load.

123 140 1 2 3 4 In furtherance of controlling the magnitude of the output voltage, the controllerproduces the respective pulse width modulation control signals PWM, PWM, PWM, and PWM.

140 101 102 103 104 Rather than simply use the received pulse width modulation control signal received from the controller, each of the power converter phases implements a respective temperature balance function that supports better equalizing of the magnitude of temperature associated with each of the power converter phases,,, and.

140 1 101 1 101 1 1 2 102 2 2 3 103 3 3 4 104 4 4 More specifically, the controllerproduces the respective pulse width modulation control signal PWMand supplies it to the power converter. As discussed herein, the respective temperature balance function DTBof the power converteradjusts the pulse width modulation control signal PWMto produce the pulse width modulation control signal PWMC; the respective temperature balance function DTBof the power converteradjusts the pulse width modulation control signal PWMto produce the pulse width modulation control signal PWMC; the respective temperature balance function DTBof the power converteradjusts the pulse width modulation control signal PWMto produce the pulse width modulation control signal PWMC; the respective temperature balance function DTBof the power converteradjusts the pulse width modulation control signal PWMto produce the pulse width modulation control signal PWMC; and so on.

1 1 101 101 101 1 118 102 2 101 29 2 102 112 112 2 118 111 1 1 2 101 102 101 1 1 1 101 118 In a similar manner as previously discussed, the temperature balance function DTBcan be configured to receive a first temperature value (local temperature TPHASEof the power converter) indicating a temperature of the first power converter, the first power convertersupplying first current ito the dynamic load. Assume that the power converteroperate at a second temperature (hottest temperature) resulting in transmission of a second temperature value (TPHASEor TPHMAX) to the power converter phasevia node N. The second temperature value TPHASEor TPHMAX received from the power converter phaseindicates the temperature of the second power converter. The second power converter phasesupplies second current ito the load. The power converter phaseand corresponding temperature balance function DTBcan be configured to compare the first temperature value TPHASEor TPHMAX or adjusted value (TPHMAX-TDEAD) to the second temperature value TPHASEto learn that the power converter phaseis a substantially lower temperature than the power converter phase. In such an instance, the power converter phaseadjusts the duty cycle associated with the received pulse width modulation control signal PWMto produce the adjusted pulse width modulated control signal PWMC to increase the magnitude of the current isupplied by the power converter phaseto the load.

140 131 123 1 2 3 1 Thus, via a first feedback loop, the multiphase controllerreceives the feedbacksuch as the magnitude of the output voltageand then adjusts the duty cycle of the pulse width modulation control signals PWM, PWM, PWM, etc., such that the magnitude of the voltage is regulated with respect to a desired setpoint reference voltage VREF. The second control loop implemented by each of the power converter phases uses temperature as a basis in which to locally (in a distributed manner at each of the different power converter phases) further adjust output current from each phase that is greater than the max temperature phase adjusted by a threshold amount such that the temperature associated with each of the different power converters is more balanced (more similar in magnitude, although not necessarily exactly equal but at least within a temperature margin such as TDEAD).

140 Thus, the function of providing temperature balance amongst the multiple power converter phases is distributed to the power converter phases themselves as opposed to the controllerhaving the burden of producing and transmitting individual control signals to balance temperature associated with each of the power converter phases.

4 FIG. is an example diagram illustrating a power converter and corresponding circuitry as discussed herein.

10 101 102 103 104 4 FIG. This example illustrates the circuitry associated with each of the power converter phasesY as shown in. As discussed below, the value of Y may be 1 (for power converter phase), 2 (for power converter phase), 3 (for power converter phase), or 4 (for power converter phase). If desired, this can be extended to include any number of PWM signals.

10 150 21 For example, each respective power converter phaseY includes a temperature balance function DTBY, driver circuitry-Y, high-side switch circuitry SY-H, low side switch circuitry SY-L, inductor LY, and current monitorY.

140 10 As previously discussed, the temperature balance function DTBY receives the pulse width modulation control signal PWMY generated by the controller. The temperature balance function DTBY also receives a temperature signal TPHMAX indicating a maximum temperature of a remote power converter phase other than the power converter phaseY.

191 410 118 Comparator-Y produces the signal-Y indicating whether TPHASEY<[TPHMAX-TDEAD]. If the magnitude of the TPHASEY is less than [TPHMAX-TDEAD], the temperature balance function DTBY adjusts the duty cycle associated with the received pulse width modulation signal PWMY to increase a magnitude of the duty cycle time that the high-side switch circuitry SY-H is active during each cycle such that the magnitude of the current iY supplied to the loadincreases.

10 10 If the local temperature TPHASEY of the current power converter phaseY is the maximum temperature of all the phases, then the power converter phaseY outputs the respective signal TPHASEY as signal TPHMAX from the terminal TY to the other power converter phases.

In one example, as previously discussed, the highest temperature power converter phase does not adjust the duty cycle associated with the received pulse width modulation signal PWMY to produce the pulse width modulation signal PWMYc. In other words, in this latter instance, the control signal PWMYC is a slightly delayed version of the received pulse width modulation signal PWMY with the same duty cycle.

5 FIG. is an example timing diagram illustrating adjustment of a trailing edge of a pulse width modulation control signal as discussed herein.

1 2 3 4 As previously discussed, examples herein may include modifying any edges (leading or trailing) of a respective pulse width modulation control signal (such as PWM, PWM, PWM, PWM, etc.) to provide temperature balance amongst multiple power converter phases as discussed herein.

1 FIG. 5 FIG. 5 FIG. 1 1 1 11 1 1 13 14 392 1 1 118 1 1 1 2 1 1 1 In this example of implementing trailing edge timing adjustments, based on the power converter phases in, the temperature balance function DTBX (where X equals 1 or 2) receives the control signal PWMas previously discussed and converts it into the respective control signal PWMXC. In the case where the magnitude of the temperature of the corresponding power converter phaseX is less than the temperature of the hottest power converter phase, the corresponding temperature balance function DTBX delays the respective trailing edge of the received control signal PWMXC, resulting in an increased time in which the high-side switch circuitry SX-H is activated in a respective control cycle. In other words, the delay of the trailing edge (from time Tto time Tor other suitable time such as is indicated by the trailing edge delay) associated with the control signal PWMXC resulting in a longer ON-time of the respective high-side switch circuitry SX-H in a respective control cycle increases a magnitude of the respective output current iX supplied to the loadas shown inby output current iX-. The signal iX-inindicates a lower magnitude of the output current iX using the original signal PWMX (if otherwise used) without lengthening an ON-time duration of the high-side switch circuitry SX-H via the delay of the trailing edge.

1 11 13 1 12 14 11 13 Thus the pulse width on time of the control signal PWMX is between time Tand time T. The adjusted pulse width (longer pulse width) associated with the signal PWMXC is between time Tand time T, which is longer in duration than the time between time Tand time T.

3 FIG. 5 FIG. 10 10 1 1 13 14 118 1 The temperature balance functions inoperate in a similar manner. More specifically, in this example of implementing trailing edge timing adjustments, the temperature balance function DTBY (where Y equals 1 to 4) receives the control signal PWMY and converts it into the control signal PWMYC in a manner as previously discussed. In the case where the magnitude of the temperature of the power converter phaseY is less than the temperature TPHMAX of the hottest power converter phase or the temperature of the power converter phaseY is less than the value TPHMAX-TDEAD, the corresponding temperature balance function DTBY delays the respective trailing edge of the control signal PWMYC, resulting in an increased time in which the high-side switch circuitry SY-H is activated in a respective control cycle. The delay of the trailing edge (from time Tto time Tor other suitable time) associated with the control signal PWMYC results in a longer ON-time of the respective high-side switch circuitry SY-H in a respective control cycle increases a magnitude of the respective output current iY supplied to the loadas shown inby output current iY-.

1 1 140 5 FIG. It is noted that adjustment of the trailing edge of the respective control signal such as via the delay delta TON as discussed herein changes the pulse width ON duration associated with the originally received pulse width modulation signal PWMX or PWMY to produce the corresponding pulse width modulation control signal PWMXC or PWMYC without a change in a corresponding switching frequency. In other words, the switching frequency of the trailing edge adjusted pulse width modulation control signal produced and outputted by the temperature balance function is the same as the pulse width modulation control signal received by the temperature balance function from the controller. As further shown in, the period associated with cycle #1 is equal to the period associated with cycle #2.

6 FIG. is an example diagram illustrating a pulse width modulation signal generator operable to adjust leading and trailing edges of a respective received control signal as discussed herein.

11 12 21 22 1 2 3 4 11 551 511 541 599 6 FIG. In this example, the current balance function DTBz (such as any of the current balance functions DTB, DTB, DTB, DTB, DTB, DTB, DTB, DTB, etc., as previously discussed) includes a respective instance of the circuitry shown insuch as amplifier A, integrator circuit, a trailing edge clock generator, circuitryproviding discrete trailing edge duty correction, and circuitryproviding edge duty control/correction.

551 51 51 552 52 52 As further shown, the integrator circuitincludes a resistor Rand capacitor C. The integrator circuitincludes a resistor Rand a capacitor C.

511 521 512 531 The trailing edge clock generatorincludes the D flip-flop element. The leading edge clock generatorincludes the D flip-flop element.

1 2 3 4 1 511 521 11 12 13 14 In this example, the signal PWMIN represents the corresponding signal PWM, PWM, PWM, PWM, PWMX, PWMY, etc., as previously discussed. The trailing edge clock generatorincludes the D flip-flopthat forwards the received PWMIN clock signal to the tapped delay line including series connected tapped delay line element TL, tapped delay line element TL, tapped delay line element TL, tapped delay line element TL. As their names suggest, each of the tapped delay line elements delays the respective input pulse width modulation PWMIN signal by a same or different amount of time.

551 11 51 51 11 5 11 12 21 22 1 2 3 4 51 51 51 561 561 562 562 563 522 523 524 525 528 591 1 The integrator circuitincludes the amplifier A, resistor R, and capacitor C. The amplifier Aproduces a respective signal VCTRL_TRL at node Nindicating or based on a difference between the local power converter phase temperature TPHASE signal (such as any of TPHASE, TPHASE, TPHASE, TPHASE, TPHASE, TPHASE, TPHASE, TPHASE) and the signal TPHMAX-TDEAD (or simply TPHMAX) depending on the instantiation of the temperature balance function. The node Nconnecting the resistor Rand the capacitor Cstores a respective signal VCTRL_TRL supplied to the analog-to-digital converter. The analog-to-digital converterconverts the received signal VCTRL_TRL into signals D1 and D0supplied to the multiplexer. The multiplexeruses the received signals D1 and D0 as address lines to select which delayed version of the PWM signal to output as signalto the D flip-flop. Subsequent circuitry such as D flip-flop, D flip-flop, logic, D flip-flop, use the signalas a basis in which to control adjustment of the trailing edge of the signal PWMC (such as signal PWMXC or PWMYC) as indicated in the prior timing diagrams.

6 FIG. 562 Via the temperature balance function (i.e., circuit) shown in, as previously discussed, when the magnitude of the signal TPHASE (temperature of local phase) is less than the signal TPHMAX-TDEAD or TPHMAX, the trailing edge of the respective signal PWMC is delayed by varying amounts as selected by the multiplexerto increase output current supplied by the local power converter phase.

561 0 1 562 For example, if a magnitude of the temperature of the local phase is greater than or equal to the value TPHMAX-TDEAD or TPHMAX, the analog-to-digital converterproduces selection signals in which C=0 and C=0 (inputs to the multiplexer) resulting in a minimal or no change in the duty cycle associated with the pulse width modulation signal PWMc with respect to the pulse width modulation signal PWMIN.

561 1 0 108 However, depending upon the magnitude of the temperature of the local power converter phase being less than the maximum temperature TPHMAX, the analog-to-digital converterproduces different settings for Cand Cto delay the trailing edge of the pulses modulation control signal PWMC with respect to the pulse width modulation control signal PWMIN, resulting in the pulse width modulation control signal PWMc having a greater on-time of activating high-side switching me to increase the respective amount of current supplied by that power converter phase to the loadteam.

7 FIG. is an example diagram illustrating a pulse width modulation signal generator operable to adjust leading and trailing edges of a respective received control signal as discussed herein.

641 625 1 621 522 651 642 625 2 622 532 652 The continuous trailing edge duty correction circuitincludes a variable delay circuit-, D flip-flop, D flip-flop, and amplifier circuitry. The continuous leading-edge duty correction circuitincludes a variable delay circuit-, D flip-flop, D flip-flop, and amplifier circuitry.

788 552 In this example, the leading-edge correction is implemented to maintain high-resolution duty cycle adjustment. Trailing edge correction allows current increase as discussed herein. The current limiterprevents excessive duty cycle excursion to limit current imbalance. The voltage_vmin_delay provided by the voltage sourceensures minimum delay for the leading-edge generator functionality, which results in fine resolution relative pulse width modulation.

551 11 51 51 11 1 51 51 51 51 651 51 625 1 625 1 392 625 1 7 FIG. The integrator circuitincludes the amplifier A, resistor R, and capacitor C. The amplifier Aproduces a respective output signal based on a comparison of the temperature of the respective phase (such as indicated by TPHASEX or TPHASEY) at node N. The node Nconnecting the resistor Rand the capacitor Cstores a respective signal supplied to the amplifier circuitry, which converts the voltage at node Ninto a respective signal VCTRL_TRL supplied to the variable delay circuit-. The variable delay circuit-receives the original signal PWMIN and, as its name suggests, varies an amount of delay () applied to the trailing edge of the received control signal PWMIN to produce the control signal PWMc depending upon a magnitude of the signal VCTL_TRL. Details of the variable delay circuit for-are shown in.

6 FIG. 625 625 1 392 Via the temperature balance function (i.e., circuit) shown in, as previously discussed, when the magnitude of the temperature associated with the local power converter phase is less than the hottest power converter phase within margin TDEAD, the trailing edge of the respective signal PWMC is delayed by varying amounts as selected by the variable delay circuit-X (-). For example, as the difference between the corresponding power converter phase and the hottest power converter phase increases, the magnitude of the delay (VCTRL) controlling adjustments to the trailing edge delayof the final control signal PWMc also increases, resulting in the corresponding lower temperature power converter phase supplying additional current to the respective load as previously discussed.

8 FIG. is an example diagram illustrating a variable delay circuit operative to delay a clock signal as discussed herein.

625 1 9 715 625 625 5 6 800 7 FIG. 9 FIG. In this example, the variable delay circuit-X (from, where X=1 or X=2) includes multiple field effect transistors Q-Q. Power sourceapplies the input voltage Vcc to power the corresponding variable delay circuit-X. The variable delay circuit-X receives the clock signal CLK at node NX and outputs the delayed clock signal CLKd at node NX. Graphin the followingillustrates the amount of delay between the clock CLK and output clock CLKd as a function of the inputted control signal VCTRL (for the leading edge VCTRL_TRL or the trailing edge VCTRL_LED).

625 625 1 1 1 In one example, the variable delay circuit-X may be a current starved inverter. In such an instance, the first power converter controller (such as current balance function DCB) associated with the power converter phase is configured to implement a first current starved inverter circuit (such as variable delay circuit-) to convert the first control signal PWM IN (PWMX) into the control signal PWMXC, where the first current starved inverter circuit is operative to control timing of a trailing edge of the control signal PWMC on an as needed basis.

625 625 2 1 1 As previously discussed, the variable delay circuit-X may be a current starved inverter. In such an instance, the first power converter controller (such as current balance function DCB) associated with the power converter phase is configured to implement a second current starved inverter circuit (such as variable delay circuit-) to convert the first control signal PWM IN (PWMX) into the control signal PWMXC, where the second current starved inverter circuit is operative to control timing of a leading edge of the control signal PWMC on an as needed basis.

9 FIG. is an example diagram illustrating delay versus input voltage associated with the variable delay circuit as discussed herein.

800 810 810 In this example, the graphincludes functionindicating an amount of time delay (to delay the leading edge or to delay the trailing edge) provided by the variable delay circuit as previously discussed. Note that the functionmay vary depending upon one or more parameter such as temperature, etc., associated with the corresponding variable delay circuit.

7 FIG. 552 52 52 652 52 625 2 Referring again to, the voltage sourceproduces a respective voltage signal V_min_delay at node N. The signal V_min_delay at node Nis conveyed to the amplifier circuitry, which converts the voltage at node Ninto a respective signal VCTRL_LED supplied to the variable delay circuit-to implement a minimal delay of the leading-edge associated with the pulse width modulation control signal PWMC with respect to the pulse width modulation control signal PWMIN.

10 FIG. is an example diagram illustrating a hybrid pulse width modulation signal generator as discussed herein.

1041 1042 In this example, the power converter phase DTBz includes the hybrid trailing edge duty correction circuit. Additionally, the power converter phase DTBz includes the hybrid leading-edge duty correction circuit.

10 FIG. 1041 625 1 581 551 51 51 625 1 581 As shown in, the hybrid trailing edge duty correction circuitincludes variable delay circuit-as well as the discrete delay circuit. As previously discussed, the integrator circuitproduces a respective voltage at node Nindicating a magnitude of error between the hottest power converter phase and the current power converter phase (respective cooler power converter phase). The signal at node Nis conveyed to the VCTR input of the variable delay circuit-and the VCTR input of the circuit.

625 1 581 1011 625 1 581 522 The variable delay circuit-and the circuitreceive the original signal PWMIN and, as its name suggests, vary an amount of delay applied to the trailing edge of the received control signal PWMIN to produce the control signal PWMc depending upon a magnitude of the signal VCTL_TRL. In this example, the multiplexerselects between the continuous delay generator-or the discrete delay generatorin which to output a respective signal to the D flip-flop.

51 651 0 625 1 522 625 1 If the magnitude of the power converter temperature difference as indicated by the voltage at node Nis above a threshold, the circuitcauses the multiplexer to select channel Susing the output of the variable delay circuit-to convey to D flip-flop, in which case the trailing edge associated with the signal PWMc is generated based on the output of the variable delay circuit-.

651 1 581 522 581 Conversely, if the magnitude of the error is above a threshold, the circuitcauses the multiplexer to select channel Susing the output of the circuitconveyed to D flip-flop, in which case the trailing edge associated with the signal PWMc is generated based on the output of the circuit.

10 FIG. 1042 625 2 532 625 2 625 2 592 As further shown in, the hybrid leading edge duty correction circuitincludes variable delay circuit-as well as D flip-flop. Voltage V_min_delay is inputted to the VCTR pin of variable delay circuit-. The output of the variable delay circuit-is outputted to the D flip-flop 532 to control the signaland provide a minimum delay associated with leading-edge of the signal PWMC.

11 FIG. is an example flow chart diagram illustrating operations of controlling output of current from each of multiple different power converters as discussed herein.

1100 1110 118 11 12 21 22 11 FIG. 1 FIG. 3 FIG. Flowchartinillustrates temperature balancing as discussed herein. In initial state, assume that each of the power converters inorsupplies a substantially equal amount of current to the load. In other words, assume that the current i, i, i, and iare substantially equal.

112 112 12 99 111 121 122 140 11 21 22 112 However, further assume that power converter phaseis the hottest power converter phase in the group. In such an instance, the power converter phasetransmits the corresponding signal TPHMAX out of the corresponding terminal Tto node N. Each of the components such as power converter phase, power converter phase, power converter phase, and multiphase controllerreceives the signal TPHMAX at respective terminals T, T, and T. As previously discussed, the signal TPHMAX indicates a corresponding magnitude of the temperature of the power converter phase.

The following operations are executed by the power converter phases to substantially equalize or better balance the temperature of each of the power converter phases.

1120 1120 111 121 122 More specifically, in processing operation, each of the power converter phases having a temperature less than the temperature of the hottest power converter phase as indicated by the signal TPHMAX determines whether or not to implement current adjustments to increase its respective temperature with respect to the hottest power converter phase. For example, in processing operation, each of the power converter phase, power converter phase, power converter phase, compares a magnitude of their respective detected temperature (TPHASEX) to the magnitude of the hottest temperature as indicated by TPHMAX. That is, in one example, each respective power converter determines whether the temperature is less than TPHMAX-TDEAD.

111 121 122 1120 111 121 122 1130 On the first pass, assume that each of the power converter phases,, anddetermines (YES) that their temperature is less than TPHMAX-TDEAD. As previously discussed, the value TDEAD is a temperature margin value. Based on the determination in operation, processing for each of the power converter phases,,therefore continues at processing operation.

112 2 1120 1180 112 1130 111 121 122 1 2 1180 1140 Note that the power converter phase(such as Phase) in processing operationdetermines that its corresponding temperature TPHMAX is not less than TPHMAX-TDEAD and therefore executes processing operationwhere the power converter phasedoes not adjust its pulse width modulation signal to increase its output current. At processing operation, each of the power converter phases,,, determines whether any duty cycle adjustments associated with the respective received pulse width modulation signals PWMor PWMhas reached an adjustment saturation level. If so, for those power converter phases in saturation, processing continues at processing operation. If not, processing continues at processing operationfor those power converter phases.

1140 111 121 122 1 2 111 121 122 118 1150 118 111 121 122 1140 1160 140 1 2 123 1 140 123 At processing operation, as previously discussed, each of the respective power converter phases,,, increases a respective duty cycle associated with the corresponding received signal PWMand PWMsuch that each of the power converter phases,,, now output a higher amount of current to the load. As indicated in processing operation, the average current supplied to the loadincreases as a result of each of the power converter phases,,, increasing their respective output current in processing operation. In response to the increased current, in subsequent processing operation, the multiphase controllerreduces the duty cycle (on-time of high-side switch circuitry of the power converter phases) associated with one or more of the pulse width modulation signals PWMand PWMso that the magnitude of the output voltageis substantially equal to the reference VREF. In other words, if the multiphase controllerdoes not reduce the duty cycle, the output voltagewill go out of regulation.

1170 111 121 122 111 121 122 1100 1130 In processing operation, each of the power converter phases,, and, further compares their respective temperature to the TPHMAX or TPHMAX-TDEAD (i.e., a threshold level) again. For example, each of the power converter phases,,, detects that their respective temperature is less than TPHMAX-TDEAD resulting in loopback and continued execution of the flowchartat processing operationagain.

1130 1140 1140 1150 1160 1170 1180 112 111 121 122 Each of the power converter phases repeats this loop of processing operations (,,,,,) until the respective power converters detect that their temperature is equal to or greater than TPHMAX-TDEAD in which case the power converter phases X execute processing operationwhere no more duty cycle adjustments are made to change the current. In other words, when the current adjustment to each of the power converter phases results in the temperature of the power converter phase being within the marginal temperature limit TDEAD of the maximum temperature power converter phase (TPHMAX of the power converter phase) or saturation, the power converter phases,, anddiscontinue increasing their output current to the load.

111 121 122 112 112 The increase in the output current of the power converter phases,,reduces the current supplied by the power converter phaseto the load as well as a magnitude of the temperature of the power converter phase.

12 FIG. is an example block diagram of a computer device for implementing any of the operations as discussed herein according to examples herein.

1250 140 1212 1213 1214 1217 As shown, computer system(such as implemented by any of one or more resources such as controller, current balance functions DTB, etc.) of the present example includes an interconnect 1211 that couples computer readable storage mediasuch as a non-transitory type of media (or hardware storage media) in which digital information can be stored and retrieved, a processor(e.g., computer processor hardware such as one or more processor devices), I/O interface(e.g., to output control signals to the power converter phases, monitor current, etc.), and a communications interface.

1214 I/O interfaceprovides connectivity to any suitable circuitry such as power converter phases.

1212 1212 140 1 140 Computer readable storage mediumcan be any hardware storage resource or device such as memory, optical storage, hard drive, floppy disk, etc. In one example, the computer readable storage mediumstores instructions and/or data used by the controller application-(such as implemented by any of controller, DCBs, etc., to support leading-edge and/or trailing edge signal adjustments) to perform any of the operations as described herein.

1217 1200 1213 190 Further in this example, communications interfaceenables the computer systemand processorto communicate over a resource such as networkto retrieve information from remote sources and communicate with other computers.

1212 140 1 1213 140 1 As shown, computer readable storage mediais encoded with controller application-(e.g., software, firmware, etc.) executed by processor. Controller application-can be configured to include instructions to implement any of the operations as discussed herein.

1213 1212 1211 140 1 1212 During operation of one example, processoraccesses computer readable storage mediavia the use of interconnectin order to launch, run, execute, interpret or otherwise perform the instructions in controller application-stored on computer readable storage medium.

140 1 140 1 1213 140 1213 140 1213 1200 Execution of the controller application-produces processing functionality such as controller process-in processor. In other words, the controller process-B associated with processorrepresents one or more aspects of executing controller application-A within or upon the processorin the computer system.

1200 In accordance with different examples, note that computer systemcan be a micro-controller device, logic, hardware processor, hybrid analog/digital circuitry, etc., configured to control a power supply and perform any of the operations as described herein.

13 FIG. Functionality supported by the different resources will now be discussed via flowchart in. Note that the steps in the flowcharts below can be executed in any suitable order.

13 FIG. is an example diagram illustrating a flowchart and implementation of a corresponding method as discussed herein.

1310 111 101 In processing operation, a first power converter receives a first temperature value indicating a temperature of the first power converter such as power converter phaseor power converter phase. The first power converter supplies first current to a load.

1320 112 102 In processing operation, the first power converter receives a second temperature value indicating a temperature (such as hottest power converter phase) of a second power converter such as power converter phaseor power converter phase. The second power converter supplies second current to the load.

1330 In processing operation, the first power converter adjusts a magnitude of the first current based on a comparison of the first temperature value and the second temperature value.

Note again that techniques herein are well suited for use in circuit applications such as those implementing power conversion and power converter temperature balancing adjustment based at least in part on temperature. However, it should be noted that examples herein are not limited to use in such applications and that the techniques discussed herein are well suited for other applications as well.

Based on the description set forth herein, numerous specific details have been set forth to provide a thorough understanding of claimed subject matter. However, it will be understood by those skilled in the art that claimed subject matter may be practiced without these specific details. In other instances, methods, apparatuses, systems, etc., that would be known by one of ordinary skill have not been described in detail so as not to obscure claimed subject matter. Some portions of the detailed description have been presented in terms of algorithms or symbolic representations of operations on data bits or binary digital signals stored within a computing system memory, such as a computer memory. These algorithmic descriptions or representations are examples of techniques used by those of ordinary skill in the data processing arts to convey the substance of their work to others skilled in the art. An algorithm as described herein, and generally, is considered to be a self-consistent sequence of operations or similar processing leading to a desired result. In this context, operations or processing involve physical manipulation of physical quantities. Typically, although not necessarily, such quantities may take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared or otherwise manipulated. It has been convenient at times, principally for reasons of common usage, to refer to such signals as bits, data, values, elements, symbols, characters, terms, numbers, numerals or the like. It should be understood, however, that all of these and similar terms are to be associated with appropriate physical quantities and are merely convenient labels. Unless specifically stated otherwise, as apparent from the following discussion, it is appreciated that throughout this specification discussions utilizing terms such as “processing,” “computing,” “calculating,” “determining” or the like refer to actions or processes of a computing platform, such as a computer or a similar electronic computing device, that manipulates or transforms data represented as physical electronic or magnetic quantities within memories, registers, or other information storage devices, transmission devices, or display devices of the computing platform.

While this invention has been particularly shown and described with references to preferred examples thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present application as defined by the appended claims. Such variations are intended to be covered by the scope of this present application. As such, the foregoing description of examples of the present application is not intended to be limiting. Rather, any limitations to the invention are presented in the following claims.