In various examples, a computing system with a printed circuit assembly including a socket coupled to an interposer to allow the testing of various components of the printed circuit assembly is provided. For example, the interposer includes a connector that is coupled with the adapter board and allows communication between the adapter board and the printed circuit assembly. In one example, the adapter board is connected to an emulation system that emulates an integrated circuit component such as a System on a Chip (SoC). In other examples, the adapter board includes components that test hardware and software of the printed circuit assembly.
Legal claims defining the scope of protection, as filed with the USPTO.
an integrated circuit socket configured for coupling to a printed circuit assembly and to accept an integrated circuit component, the integrated circuit socket including a socket back plate for coupling to the printed circuit assembly and a socket lid coupled to the top of the integrated circuit socket; at least one electronic component configured for coupling to the printed circuit assembly; an adapter board configured for coupling to a computing system operating an emulation application; and an interposer coupled to the integrated circuit socket so that, when the integrated circuit socket is coupled to the printed circuit assembly, the interposer is positioned between the printed circuit assembly and the socket lid, the interposer including a connector to accept the adapter board. . An emulation system, comprising:
claim 1 . The emulation system of, wherein the at least one electronic component is a voltage regulator.
claim 1 a shim plate between the interposer and the socket lid, the shim plate provides additional thickness to the interposer to allow the socket lid to apply an amount of compressive force to engage pins of the integrated circuit socket; and wherein the socket lid further comprises a plurality of springs and a lever that compresses the plurality of springs to apply a force to the shim plate to secure the interposer within the integrated circuit socket. . The emulation system of, further comprising:
claim 1 . The emulation system of, wherein the adapter board further comprises ribbon cables connected to the connected to enable communication between the computing system and the printed circuit assembly.
claim 4 . The emulation system of, wherein the ribbon cable is connected to the computing system, and wherein the computing system includes a plurality of field-programmable gate arrays (FPGAs).
claim 5 . The emulation system of, wherein the plurality of FPGAs of the computing system emulate a System on Chip (SoC).
claim 6 . The emulation system of, wherein the emulated SoC corresponds to a physical SoC, and wherein the integrated circuit socket is configured to accept the physical SoC as the integrated circuit component.
claim 1 . The emulation system of, wherein the adapter board further comprises a second electronic component for testing the at least one electronic component configured for coupling to the printed circuit assembly.
claim 8 . The emulation system of, wherein the at least one electronic component includes at least one of a voltage regulator, a chipset, an interface, a port, memory, a power connector, a socket, and firmware.
claim 1 . The emulation system of, wherein the integrated circuit socket includes an array of pins and wherein the interposer includes a set of contact elements that align and mate the interposer with the array of pins of the integrated circuit socket.
claim 1 . The emulation system of, further comprising a component for capturing data associated with operation of the emulation application so that optimizations can be made to the integrated circuit component.
a processor; emulating an integrated circuit component; and transmitting, during a testing operation of a first electronic component, data to a printed circuit assembly via an adapter board connected to the printed circuit assembly by an interposer; and memory storing executable instructions that, as a result of being executed by the processor, cause the processor to perform operation comprising: the printed circuit assembly having a socket to accept the interposer, the first electronic component coupled to the printed circuit assembly, wherein the interposer includes a connector to accept the adapter board that communicates with the integrated circuit component. . A computing system, comprising:
claim 12 . The computing system of, wherein the socket further comprises a socket back plate coupled to a back of the printed circuit assembly and a socket lid coupled to a top of the printed circuit assembly.
claim 12 . The computing system of, wherein emulating the integrated circuit component further comprises emulating a SoC.
claim 12 . The computing system of, further comprising a vertical mount coupled to the printed circuit assembly to affix the printed circuit assembly to a server rack containing the computing system.
claim 12 . The computing system of, wherein the adapter board further comprises an I/O port connected to the processor.
claim 16 . The computing system of, wherein transmitting the data to the printed circuit assembly further comprises transmitting the data via the I/O port to the adapter board.
claim 12 . The computing system of, the connector includes a straddle mount connector.
a socket configured for coupling, to a printed circuit assembly, an integrated circuit component, the socket including a socket back plate for coupling to the printed circuit assembly and a socket lid coupled to the top of the socket; an adapter board configured for coupling to a computing system operating an emulation application including a plurality of field-programmable gate arrays (FPGAs) to emulate the integrated circuit component, the adapter board including a first electronic component for testing a second electronic component configured for coupling to the printed circuit assembly; and an interposer coupled to the socket such that the interposer is positioned between the printed circuit assembly and the socket lid, the interposer including a connector to accept the adapter board. . A system for emulating a computer system on a chip (SOC) comprising:
claim 19 wherein the socket is configured to accept the physical SoC as the integrated circuit component. . The system of, wherein the plurality of FPGAs of the computing system emulate a System on Chip (SoC) corresponding to a physical SoC; and
Complete technical specification and implementation details from the patent document.
Computing devices typically have a printed circuit assembly, such as a motherboard, with an integrated circuit component or processor, such as a central processing unit, or a System on a Chip (SoC) and other electronic components, such as a voltage regulator. Development of these types of computing hardware is challenging, as they are typically developed in parallel and require validation and testing individually and together. For example, in order to avoid delays, development of a new generation of printed circuit assemblies and SoCs requires validation and testing of the new generation of printed circuit assemblies prior to completion of development of the SoC.
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used in isolation as an aid in determining the scope of the claimed subject matter.
Embodiments described in the present disclosure are directed towards technologies for improving development cycles and testing of printed circuit assemblies (e.g., a motherboard including a socket for accepting a processor such as a System on a Chip [SoC]), thereby reducing development costs and time required to develop and release new computing systems (such as server computer systems, consumer electronics, artificial intelligence systems, or various other types of computing systems). In particular, embodiments provide an interposer that can be inserted into a socket of the printed circuit assembly, the interposer including a connector to attach one or more adapter boards that can be used to perform various testing functions. In one example, the interposer is connected to an emulation adapter board that is connected to a server computer system that emulates a processor, such as an SoC.
The subject matter of aspects of the present disclosure is described with specificity herein to meet statutory requirements. However, the description itself is not intended to limit the scope of this patent. Rather, the inventors have contemplated that the claimed subject matter might also be embodied in other ways, in conjunction with other present or future technologies.
Embodiments described herein generally relate to aspects of a computing system that includes a printed circuit assembly with an interposer coupled to a socket of the printed circuit assembly, where the interposer is connected to an adapter board that allows for testing on various components of the printed circuit assembly (e.g., voltage regulator, memory, firmware, various interfaces, etc.). In accordance with some aspects, the systems and methods described are directed to an adapter board that is connected to an emulation system that emulates a processor such as a System on a Chip (SoC). For example, during development and testing of a new printed circuit assembly and new SoC (e.g., development a new processor prior to production of the physical processor), the new printed circuit assembly is connected via the interposer and adapter board to the emulation system that emulates the new SoC in order to test the components of the printed circuit assembly. In other words, during development of computing systems including printed circuit assemblies and processors, it is advantageous to test interactions between the printed circuit assemblies, the components thereof, and processors coupled to the printed circuit assembly prior to production of the processors.
Other solutions require the development a production of interposers that can connect previous iterations, versions, or types of processors. For example, the current or previous generation of the new processor that is in development (e.g., prior to production on the physical processor). However, this increases development cost and time, and previous processors are not equivalent to the new processor in development and are not intended to be used with the printed circuit assembly. Aspects of the technology described herein provide a number of improvements over existing technologies. For instance, the technology allows for emulation of the processor intended to be coupled to the printed circuit assembly, thereby reducing costs and development time incurred by waiting for the production and testing of other dependencies.
Traditionally, hardware manufactures utilize a previous or current generation integrated circuit components (e.g., SoC) to validate and test the new generation of printed circuit assembly, as the new generation of integrated circuit components are not available yet. This requires the development of an interface to attach the previous or current generation integrated circuit components to the new generation of printed circuit assembly.
However, the previous or current generation integrated circuit components are not equivalent to the new integrated circuits components being developed. Furthermore, development of the interface to attach the previous or current generation integrated circuit components to the new generation of printed circuit assembly cost additional time and resources. Additionally, this traditional method is not an option for novel components such as SoCs or other novel processors. Finally, these traditional methods of testing are dependent on development timelines for the firmware, operating system, socket, and integrated circuits.
Furthermore, various embodiments of the present disclosure relate to an integrated circuit socket configured for coupling to a printed circuit assembly and to accept an integrated circuit component, the socket including a socket back plate for coupling to the printed circuit assembly and a socket lid coupled to the top of the integrated circuit socket; at least one electronic component configured for coupling to the printed circuit assembly; an adapter board configured for coupling to a computing system operating an emulation application; and an interposer coupled to the socket so that, when the socket is coupled to the printed circuit assembly, the interposer is positioned between the printed circuit assembly and the socket lid, the interposer including a connector to accept the adapter board. As described in the present disclosure, the adapter boards described, including the emulation adapter board, in various embodiments, include printed circuit assemblies.
1 FIG. 1 FIG. 8 FIG. 100 Turning to,is a diagram of an environmentin which one or more embodiments of the present disclosure can be practiced. It should be understood that this and other arrangements described herein are set forth only as examples. Other arrangements and elements (e.g., machines, interfaces, functions, orders, and groupings of functions, etc.) can be used in addition to or instead of those shown, and some elements can be omitted altogether for the sake of clarity. Further, many of the elements described herein are functional entities that can be implemented as discrete or distributed components or in conjunction with other components, and in any suitable combination and location. Various functions described herein as being performed by one or more entities can be carried out by hardware, firmware, and/or software. For instance, some functions can be carried out by a processor executing instructions stored in memory, as further described with reference to.
100 100 102 110 124 800 1 FIG. 1 FIG. 8 FIG. It should be understood that environmentshown inis an example of one suitable environment. Among other components not shown, operating environmentincludes a computing system including a printed circuit assembly, adapter board, and an emulation system. Each of the components shown incan be implemented via any type of computing device, such as one or more computing devicesdescribed in connection with, for example. In some embodiments, these components can communicate with each other via an interface, which can be wired (e.g., a physical connection), wireless (e.g., a network), or both.
100 124 124 102 124 110 It should be understood that any number of devices, servers, and other components can be employed within operating environmentwithin the scope of the present disclosure. Each can comprise a single device or multiple devices cooperating in a distributed environment. For example, the emulation systemincludes multiple server computer systems cooperating in a distributed environment to perform the operations described in the present disclosure. In various embodiments, the emulation systemincludes one or more processors, and one or more computer-readable media that include computer-readable instructions executable by the one or more processors. In an embodiment, the instructions are embodied by an emulation application that emulates the operations and/or instruction architecture of a processor such as an SoC. In one example, the emulation application is referred to as a single application for simplicity, but its functionality can be embodied by one or more applications in practice. In various embodiments, the emulation application includes any application capable of emulating a processor and facilitating the exchange of information between the computing system, including the printed circuit assemblyand the emulation system(e.g., via the adapter board).
102 104 106 108 102 102 104 102 102 104 102 104 104 102 104 As described in greater detail below, in various embodiments, the printed circuit assemblyincludes a socket, an interposer, and a connector. In one example, the printed circuit assemblyincludes a motherboard. In various embodiments, the printed circuit assemblyincludes a top and a bottom, where the socketis integrated into the top of the printed circuit assemblyand can be used to couple an integrated circuit component to the printed circuit assembly. In an embodiment, the socket(e.g., an integrated circuit socket and/or a central processing unit [CPU] socket) includes a physical interface that connects the integrated circuit component (e.g., an SoC, CPU, artificial intelligence device, or other processor) to the printed circuit assembly. In one example, the socketincludes an array of pins and a securing mechanism that holds the processor in place. Continuing this example, the socketenables communication between the printed circuit assemblyand the integrated circuit component coupled to the socket.
106 104 106 108 110 124 106 104 106 106 102 420 106 102 4 5 FIGS.and 3 FIG. In various embodiments, the interposeris coupled to the socket. For example, the interposerprovides an interface (e.g., the connector) that enables communication via the adapter boardto other components (e.g., the emulation system). In various embodiments, the interposerincludes a set of contact elements that align and mate with the array of pins in the socket. Furthermore, in some embodiments, the interposerhas a different thickness and, as a result, uses a different compression system for affixing the interposerto the printed circuit assembly. In one example, a socket lid, such as the socket lid, as described below in connection with, is used to provide the appropriate compression force (e.g., forty grams per contact). Furthermore, as illustrated in, in various embodiments, the interposerincludes a component, such as a backplate, integrated with the back of the printed circuit assembly.
106 108 110 108 110 108 102 Furthermore, in various embodiments, the interposerincludes the connectorthat includes an interface and a set of pins to accept the adapter board. In one example, the connectorincludes a 168-pin straddle-mount connector. In various embodiments, the adapter boardis coupled to the connectorand enables testing of various components of the printed circuit assembly(e.g., hardware, software, interfaces, connections, dependencies, etc.).
100 110 112 112 112 112 102 124 124 110 112 112 110 510 1 FIG. 1 FIG. 5 5 FIGS.A andB In the environmentillustrated in, the adapter boardincludes a plurality of input/output (I/O) portsA-C that are connected (e.g., via a cable) to the emulation system. For example, the I/O portsA-C allow communication between the printed circuit assemblyand the emulation system. For example, a cable is used to connect the adapter board to the emulation system. Although the adapter boardillustrated inincludes the I/O portsA-C, other configurations and components of the adapter boardcan be used in connection with the present disclosure (e.g., the adapter boardillustrated in).
110 106 102 110 124 In various embodiments, the adapter boardprovides an interface to communicate via the interposerto the printed circuit assembly. For example, the adapter boardis used to test components of the computer system and/or the processor (e.g., SoC) emulated by the emulation system.
2 2 FIGS.A andB 2 2 FIGS.A andB 1 FIG. 2 2 FIGS.A andB 3 FIG. 200 100 200 200 200 200 202 202 Turning now to,shows a perspective view of a computing system, such as a computing system illustrated in environmentdescribed above in connection with, in which some embodiments of the present disclosure may be employed. It should be understood that this and other arrangements described herein are set forth only as examples. Other arrangements and elements (e.g., components, interfaces, connections, etc.) can be used in addition to or instead of those shown, and some elements may be omitted altogether for the sake of clarity. In an embodiment, the computing systemhas components held within a chassis. Various components of the computing systemsuch as the chassis, voltage regulators, memory, or other components are not shown infor simplicity. In addition, certain components of computing systemare shown, but are well-known and so will not be discussed in detail. However, the computing system, in various embodiments, includes a printed circuit assembly(e.g., a motherboard). In one example, the printed circuit assemblyhas a top and a bottom (as best seen in).
202 204 206 210 204 104 204 202 202 206 204 202 1 FIG. 2 FIG.B In an embodiment, the printed circuit assemblyhas a number of components coupled to it such as a socket, an interposer, and an adapter board. The socket, in an embodiment, includes the socket, as described above in connection to. However, other types of sockets can be used in connection with the present disclosure. For example, the socketis designed to accept an integrated circuit component that is coupled to the top of the printed circuit assembly. In some aspects, the integrated circuit component is a CPU coupled to the printed circuit assemblyvia a land grid array (LGA) connection. In other aspects, the integrated circuit component is an SoC coupled to the printed circuit assembly via a ball grid array (BGA) connection. As illustrated in, the integrated circuit component is replaced with the interposerwhich includes the same configuration of pins (e.g., BGA) as the integrated circuit component that can be coupled to the socket. The various components shown in the figures, and discussed herein, are not shown to scale, and may have other shapes, sizes, and configurations, depending on the design of the printed circuit assembly.
2 2 3 FIGS.A,B, and 2 3 FIGS.and 206 204 206 208 206 334 314 206 204 204 334 314 336 206 204 As seen in, the interposeris disposed above the socket, and connected to the interposeris a connector. In an embodiment, the interposerincludes a socket lidand a backplate. In one example, the interposerincludes additional components not shown infor simplicity, such as mounting plates, spacers, or other components to align and mate the interposer with the socket(e.g., the pins within the socket). In an embodiment, the socket lidand the backplateprovide compression in the direction of the arrowto couple the interposerto the socket(e.g., create a connection between the pins).
2 2 FIGS.A andB 1 FIG. 210 202 202 212 212 212 212 124 206 208 208 210 206 202 204 Returning to, the adapter board, in an embodiment, includes a plurality of components to enable testing of the printed circuit assembly. For example, the printed circuit assemblyincludes a plurality of I/O portsA-C. In an embodiment, the I/O portsA-C are connected to a testing device such as the emulation systemdescribed above in connection with. Furthermore, in various embodiments, the adapter board is connected to the interposervia a connector. The connector, for example, allows communication between the adapter boardand the interposerwhich is connected to the printed circuit assemblyvia the socket.
4 4 FIGS.A andB 4 FIG.A 4 FIG.A 4 FIG.B 4 FIG.A 202 204 206 416 206 416 420 416 206 204 420 206 202 416 206 416 Turning now to,shows a perspective view of the printed circuit assembly, including the socketand the interposer. Furthermore, as illustrated in, a shim plateis disposed above the interposer, and disposed above the shim plate(as seen in) is a socket lid. In one example, the shim plateadds thickness to the interposerto allow the appropriate amount of pressure to establish a connection with the socketwhen the socket lidis connected to the interposerand/or printed circuit assembly. Although the shim plate, as illustrated in, covers the entire top of the interposer, other assemblies and/or configurations of the shim platecan be used in connection with the present disclosure.
4 FIG.B 3 FIG. 4 FIG.B 420 206 422 422 416 206 204 420 314 420 As illustrated in, the socket lid, in an embodiment, is disposed above the interposerand includes a leverin order to engage a compression mechanism. For example, as a result of depressing the lever, a compressive force is applied to the shim platein order to establish a connection between the interposerand the socket. In an embodiment, the socket lidis affixed to the backplate, as shown above in. Although not shown in, the socket lidcan include a fan or other cooling mechanism.
5 FIG.A 5 FIG.A 5 FIG.B 510 206 420 206 510 202 420 208 510 510 124 202 shows a perspective view of an adapter boardconnected to the interposerwith the socket liddisposed over the interposer. In an embodiment, the adapter boardincludes various components to test interfaces or other components of the printed circuit assembly. As illustrated in, the socket lid, in some embodiments, obfuscates the connector, as shown connected to the adapter boardin. For example, the adapter boardis connected to an external protocol tester to provide additional and/or alternative test coverage relative to the emulation systemconnected to the printed circuit assembly
6 FIG. 8 FIG. 6 FIG. 600 202 204 206 208 510 612 614 618 612 614 618 622 622 800 510 612 614 618 622 202 612 614 618 622 510 612 614 618 202 622 510 202 As illustrated in, the environmentincludes the printed circuit assembly, the socket, the interposer, and the connector. Furthermore, in an embodiment, the adapter boardincludes a protocol analyzer and debugger, a set of debuggersA-C, and an analyzer debugger. In some embodiments, the protocol analyzer and debugger, the set of debuggersA-C, and the analyzer debuggerare connected to a host computer system. The host computer systemcan be any type of computing device, such as the one or more computing devicesdescribed in connection with. In some aspects, the adapter boardincludes various combinations of connectors for communicating with external testing devices in addition to or as an alternative to the protocol analyzer and debugger, the set of debuggersA-C, and the analyzer debuggerillustrated in. Furthermore, in various embodiments, the host computer systemcan be connected to the printed circuit assemblyvia the protocol analyzer and debugger, the set of debuggersA-C, and/or the analyzer debuggerin serial or in parallel. For example, the host computer systemcan be connected to a single connector of the adapter board(e.g., the protocol analyzer and debugger, the set of debuggersA-C, or the analyzer debugger) to test various components of the printed circuit assembly. In other examples, the host computer systemis simultaneously connected to a plurality of connectors of the adapter boardin order to test various components of the printed circuit assembly.
612 614 618 622 612 614 618 202 622 6 FIG. In various embodiments, the protocol analyzer and debugger, the set of debuggersA-C, and the analyzer debuggercan be connected to the host computer systemto perform various test using different protocols such as Adaptive Voltage Scaling (AVS), Inter-Integrated Circuit (I2C), Improved Inter-Integrated Circuit (I3C), Universal Asynchronous Receiver/Transmitter (UART), and/or Joint Test Action Group (JTAG). For example, the connectors illustrated in(e.g., the protocol analyzer and debugger, the set of debuggersA-C, and the analyzer debugger) are used to connect the printed circuit assemblyto one or more tools (e.g., executed by the host computer system) to enable testing, debugging, and/or programming embedded systems which do not have any other debug-capable communications channel.
7 8 FIGS.A-C 7 7 FIGS.A-C 1 FIG. 7 7 FIGS.A-C 736 202 200 736 202 730 730 124 736 732 734 732 736 730 734 736 736 730 Turning now to,show several perspective views of a vertical mount, which is used to mount the printed circuit assemblyof the computing system. In various embodiments, the vertical mountis used to enable the printed circuit assemblyto be coupled with a server rack. In one example, the server rackincludes the emulation systemdescribed above in connection with. Furthermore, in various embodiments, the vertical mountincludes a support beamand a leg. In one example, the support beamconnects the vertical mountto the server rack. Similarly, in an example, the legextends from the vertical mountand supports the vertical mount(e.g., on a floor). Although not shown infor simplicity, one or more cables are used to connect the adapter board to other computing hardware within the server rack.
200 202 202 204 210 510 206 124 202 202 202 202 This configuration provides a computing system, such as computing system, that allows for the testing of components of the printed circuit assemblyprior to the completion of development of an integrated circuit component (e.g., SoC) that the printed circuit assembly(e.g., via the socket) is designed to operate with. Furthermore, in such embodiments, by allowing different adapter boards (e.g., adapter boardand) to be connected to the interposer, different types of testing can be performed during development. In one example, an SoC is emulated (e.g., using the emulation system) and connected to the printed circuit assemblyvia adapter board, allowing for accurate testing of the printed circuit assemblyand various components thereof, including software (e.g., executable instructions) stored in memory of the printed circuit assembly, such as firmware.
510 202 622 202 200 In another example, adapter boardis used to connect the printed circuit assemblyto the computer systemto additional testing and debugging of various components of the printed circuit assembly. Typically, development of computing systems, such as computing systems, include a plurality of hardware and software components that have interdependencies, the configurations described above, enable for testing of these interdependencies prior to completing development of certain components, thereby increasing efficiency and reducing development costs and time.
Many different arrangements of the various components depicted, as well as components not shown, are possible without departing from the scope of the claims below. Embodiments of the disclosure have been described with the intent to be illustrative rather than restrictive. Alternative embodiments will become apparent to readers of this disclosure after and because of reading it. Alternative means of implementing the aforementioned can be completed without departing from the scope of the claims below. Certain features and subcombinations are of utility and may be employed without reference to other features and subcombinations and are contemplated within the scope of the claims.
8 FIG. 8 FIG. 8 FIG. 8 FIG. 800 810 812 814 816 818 820 822 810 Having described embodiments of the present disclosure,provides an example of a computing device in which embodiments of the present disclosure may be employed. Computing deviceincludes busthat directly or indirectly couples the following devices: memory, one or more processors, one or more presentation components, input/output (I/O) ports, input/output components, and illustrative power supply. Busrepresents what may be one or more buses (such as an address bus, data bus, or combination thereof). Although the various blocks ofare shown with lines for the sake of clarity, in reality, delineating various components is not so clear, and metaphorically, the lines would more accurately be gray and fuzzy. For example, one may consider a presentation component such as a display device to be an I/O component. Also, processors have memory. The inventors recognize that such is the nature of the art and reiterate that the diagram ofis merely illustrative of an exemplary computing device that can be used in connection with one or more embodiments of the present technology. Distinction is not made between such categories as “workstation,” “server,” “laptop,” “handheld device,” etc., as all are contemplated within the scope ofand with reference to “computing device.”
800 800 800 Computing devicetypically includes a variety of computer-readable media. Computer-readable media can be any available media that can be accessed by computing deviceand includes both volatile and non-volatile media, removable and non-removable media. By way of example, and not limitation, computer-readable media may comprise computer storage media and communication media. Computer storage media includes both volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer-readable instructions, data structures, program modules, or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVDs) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and which can be accessed by computing device. Computer storage media does not comprise signals per se. Communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media. The term “modulated data signal” means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, communication media includes wired media, such as a wired network or direct-wired connection, and wireless media, such as acoustic, RF, infrared, and other wireless media. Combinations of any of the above should also be included within the scope of computer-readable media.
812 812 824 824 814 800 812 820 816 Memoryincludes computer storage media in the form of volatile and/or non-volatile memory. As depicted, memoryincludes instructions. Instructions, when executed by processor(s), are configured to cause the computing device to perform any of the operations described herein, in reference to the above discussed figures, or to implement any program modules described herein. The memory may be removable, non-removable, or a combination thereof. Exemplary hardware devices include solid-state memory, hard drives, optical-disc drives, etc. Computing deviceincludes one or more processors that read data from various entities such as memoryor I/O components. Presentation component(s)present data indications to a user or other device. Exemplary presentation components include a display device, speaker, printing component, vibrating component, etc.
818 800 820 820 800 800 800 800 I/O portsallow computing deviceto be logically coupled to other devices including I/O components, some of which may be built-in. Illustrative components include a microphone, joystick, game pad, satellite dish, scanner, printer, wireless device, etc. I/O componentsmay provide a natural user interface (NUI) that processes air gestures, voice, or other physiological inputs generated by a user. In some instances, inputs may be transmitted to an appropriate network element for further processing. An NUI may implement any combination of speech recognition, touch and stylus recognition, facial recognition, biometric recognition, gesture recognition both on screen and adjacent to the screen, air gestures, head and eye tracking, and touch recognition associated with displays on computing device. Computing devicemay be equipped with depth cameras, such as stereoscopic camera systems, infrared camera systems, RGB camera systems, and combinations of these, for gesture detection and recognition. Additionally, computing devicemay be equipped with accelerometers or gyroscopes that enable detection of motion. The output of the accelerometers or gyroscopes may be provided to the display of computing deviceto render immersive augmented reality or virtual reality.
Embodiments presented herein have been described in relation to particular embodiments, which are intended in all respects to be illustrative rather than restrictive. Alternative embodiments will become apparent to those of ordinary skill in the art to which the present disclosure pertains without departing from its scope.
Various aspects of the illustrative embodiments have been described using terms commonly employed by those skilled in the art to convey the substance of their work to others skilled in the art. However, it will be apparent to those skilled in the art that alternate embodiments may be practiced with only some of the described aspects. For purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it will be apparent to one skilled in the art that alternate embodiments may be practiced without the specific details. In other instances, well-known features have been omitted or simplified in order not to obscure the illustrative embodiments.
Various operations have been described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the illustrative embodiments; however, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. Further, descriptions of operations as separate operations should not be construed as requiring that the operations be necessarily performed independently and/or by separate entities. Descriptions of entities and/or modules as separate modules should likewise not be construed as requiring that the modules be separate and/or perform separate operations. In various embodiments, illustrated and/or described operations, entities, data, and/or modules may be merged, broken into further sub-parts, and/or omitted.
The phrase “in one embodiment” or “in an embodiment” is used repeatedly. The phrase generally does not refer to the same embodiment; however, it may. The terms “comprising,” “having,” and “including” are synonymous, unless the context dictates otherwise. The phrase “A/B” means “A or B.” The phrase “A and/or B” means “(A), (B), or (A and B).” The phrase “at least one of A, B, and C” means “(A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).”
The following embodiments represent example literal support clauses and embodiments of concepts contemplated herein. Any one of the following embodiments may be combined in a multiple dependent manner to depend from one or more other embodiments. Further, any combination of dependent embodiments (e.g., clauses that explicitly depend from a previous embodiment) may be combined while staying within the scope of aspects contemplated herein. The following embodiments are exemplary in nature and are not limiting.
In some embodiments, an emulation system comprises an integrated circuit socket configured for coupling to a printed circuit assembly and to accept an integrated circuit component, the integrated circuit socket including a socket back plate for coupling to the printed circuit assembly and a socket lid coupled to the top of the integrated circuit socket; at least one electronic component configured for coupling to the printed circuit assembly; an adapter board configured for coupling to a computing system operating an emulation application; and an interposer coupled to the integrated circuit socket so that, when the integrated circuit socket is coupled to the printed circuit assembly, the interposer is positioned between the printed circuit assembly and the socket lid, the interposer including a connector to accept the adapter board.
In any combination of the above embodiments of the emulation system, wherein the at least one electronic component is a voltage regulator.
In any combination of the above embodiments of the emulation system, further comprising: a shim plate between the interposer and the socket lid, the shim plate provides additional thickness to the interposer to allow the socket lid to apply an amount of compressive force to engage pins of the integrated circuit socket; and wherein the socket lid further comprises a plurality of springs and a lever that compresses the plurality of springs to apply a force to the shim plate to secure the interposer within the integrated circuit socket.
In any combination of the above embodiments of the emulation system, wherein the adapter board further comprises ribbon cables connected to the connected to enable communication between the computing system and the printed circuit assembly.
In any combination of the above embodiments of the, wherein the ribbon cable is connected to the computing system, and wherein the computing system includes a plurality of field-programmable gate arrays (FPGAs).
In any combination of the above embodiments of the emulation system, wherein the plurality of FPGAs of the computing system emulate a System on Chip (SoC).
In any combination of the above embodiments of the emulation system, wherein the emulated SoC corresponds to a physical SoC, and wherein the integrated circuit socket is configured to accept the physical SoC as the integrated circuit component.
In any combination of the above embodiments of the emulation system, wherein the adapter board further comprises a second electronic component for testing the at least one electronic component configured for coupling to the printed circuit assembly.
In any combination of the above embodiments of the emulation system, wherein the at least one electronic component includes at least one of a voltage regulator, a chipset, an interface, a port, memory, a power connector, a socket, and firmware.
In any combination of the above embodiments of the emulation system, wherein the integrated circuit socket includes an array of pins and wherein the interposer includes a set of contact elements that align and mate the interposer with the array of pins of the integrated circuit socket.
In any combination of the above embodiments of the emulation system, further comprising a component for capturing data associated with operation of the emulation application so that optimizations can be made to the integrated circuit component.
In some embodiments, a computing system, comprises a processor; memory storing executable instructions that, as a result of being executed by the processor, cause the processor to perform operation comprising: emulating an integrated circuit component; and transmitting, during a testing operation of a first electronic component, data to a printed circuit assembly via an adapter board connected to the printed circuit assembly by an interposer; and the printed circuit assembly having a socket to accept the interposer, the first electronic component coupled to the printed circuit assembly, wherein the interposer includes a connector to accept the adapter board that communicates with the integrated circuit component.
In any combination of the above embodiments of the computing system, wherein the socket further comprises a socket back plate coupled to a back of the printed circuit assembly and a socket lid coupled to a top of the printed circuit assembly.
In any combination of the above embodiments of the computing system, wherein emulating the integrated circuit component further comprises emulating a SoC.
In any combination of the above embodiments of the computing system, further comprising a vertical mount coupled to the printed circuit assembly to affix the printed circuit assembly to a server rack containing the computing system.
In any combination of the above embodiments of the computing system, wherein the adapter board further comprises an I/O port connected to the processor.
In any combination of the above embodiments of the computing system, wherein transmitting the data to the printed circuit assembly further comprises transmitting the data via the I/O port to the adapter board.
In any combination of the above embodiments of the computing system, the connector includes a straddle mount connector.
In some embodiments, a system for emulating a computer system on a chip (SOC) comprises a socket configured for coupling, to a printed circuit assembly, an integrated circuit component, the socket including a socket back plate for coupling to the printed circuit assembly and a socket lid coupled to the top of the socket; an adapter board configured for coupling to a computing system operating an emulation application including a plurality of field-programmable gate arrays (FPGAs) to emulate the integrated circuit component, the adapter board including a first electronic component for testing a second electronic component configured for coupling to the printed circuit assembly; and an interposer coupled to the socket such that the interposer is positioned between the printed circuit assembly and the socket lid, the interposer including a connector to accept the adapter board.
In any combination of the above embodiments of the system, wherein the plurality of FPGAs of the computing system emulate a System on Chip (SoC) corresponding to a physical SoC; and wherein the socket is configured to accept the physical SoC as the integrated circuit component.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
September 13, 2024
March 19, 2026
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.