Coupler Circuit and Wireless Communication Device Including Same

This present application claims priority to and the benefit under 35 U.S.C. § 119 (a)-(d) of Korean Patent Application No. 10-2024-0136317, filed on Oct. 8, 2024, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference.

Embodiments of the present disclosure described herein relate to a coupler circuit and a wireless communication device including the same.

As mobile communication technologies develop, there is widely supplied a wireless communication device, which is equipped with an antenna, such as a smartphone or a wearable device.

The wireless communication device may transmit and/or receive various kinds of data (e.g., a message, a photo, a video, a music file, and/or a game) through the antenna. To this end, the wireless communication device may include various circuit configurations that perform functions such as modulation/demodulation, amplification, and noise removal for radio frequency (RF) signals transmitted and received through an antenna.

The wireless communication device may include a coupler circuit that generates an orthogonal I/Q signal from a single-phase input signal. Here, to minimize the increase in area due to a transmission line included in the coupler circuit, a method of replacing the transmission line with a pi-shaped model consisting of a capacitor and an inductor is utilized.

Moreover, the wireless communication device may include a transformer that performs impedance matching between an input terminal and an output terminal to improve the gain of wireless communication.

Embodiments of the present disclosure provide a coupler circuit configured to output complex signals, having a target impedance, from an input signal having an input impedance.

According to an embodiment, a coupler circuit includes a first input terminal configured to receive an input signal having an input impedance, a first output terminal configured to output a first output signal having a target impedance, a first transformer connected between the first input terminal and the first output terminal, the first transformer comprising a first coil and a second coil, each of the first coil and the second coil comprising opposite ends, a first node between the first input terminal and the first transformer, a first inductor connected to the first node, a first resistor connected to the first inductor, a first capacitor connected in parallel to the opposite ends of the first coil of the first transformer, a second capacitor connected in parallel to the opposite ends of the second coil of the first transformer, a second output terminal configured to output a second output signal having the target impedance; a second node between the first inductor and the first resistor; a second transformer connected between the second output terminal and the second node, the second transformer comprising a third foil and a fourth coil, each of the third coil and the fourth coil comprising opposite ends, a third capacitor connected in parallel to the opposite ends of the third coil of the second transformer, a fourth capacitor connected in parallel to the opposite ends of the fourth coil of the second transformer, and a second inductor connected between the first output terminal and the second output terminal.

According to an embodiment, a wireless communication device includes an antenna configured to transmit and receive an RF signal having a predetermined frequency, a radio frequency front end (RFFE) including a coupler circuit connected to the antenna and including at least two or more transformers, and a radio frequency integrated circuit (RFIC) connected to the RFFE and configured to control a frequency of the RF signal. The coupler circuit is configured to receive a first input signal, having an input impedance, from the RFIC and output a first output signal and a second output signal, each having a target impedance and being orthogonal to each other, from the first input signal.

According to an embodiment, a coupler circuit includes a first input terminal configured to receive an input signal having an input impedance, a first output terminal configured to output a first output signal having a target impedance, a first reference node, wherein the input signal is defined with respect to the first reference node, a second reference node, wherein the first output signal is defined with respect to the second reference node, a first transformer connected between the first input terminal and the first output terminal, the first transformer comprising a first coil connected between the first input terminal and the first reference node and a second coil inductively coupled to the first coil and connected between the first output terminal and the second reference node, a first node between the first input terminal and the first coil of the first transformer, a first inductor connected to the first node, a first resistor connected to the first inductor, a second output terminal configured to output a second output signal having the target impedance, a second node between the first inductor and the first resistor, a third reference node, a fourth reference node, wherein the second output signal is defined with respect to the fourth reference node, a second transformer connected between the second output terminal and the second node, the second transformer comprising a third coil connected between the second node and the third reference node and a fourth coil connected between the second output terminal and the fourth reference node, and a second inductor connected between the first output terminal and the second output terminal.

According to an embodiment, a method of manufacturing a coupler circuit includes forming a first input terminal, forming a first output terminal, connecting a first transformer between the first input terminal and the first output terminal, the first transformer comprising a first coil and a second coil, each of the first coil and the second coil comprising opposite ends, forming a first node between the first input terminal and the first transformer, connecting a first inductor to the first node, connecting a first resistor to the first inductor, connecting a first capacitor in parallel to the opposite ends of the first coil of the first transformer, connecting a second capacitor in parallel to the opposite ends of the second coil of the first transformer, forming a second output terminal; forming a second node between the first inductor and the first resistor; connecting a second transformer between the second output terminal and the second node, the second transformer comprising a third foil and a fourth coil, each of the third coil and the fourth coil comprising opposite ends, connecting a third capacitor in parallel to the opposite ends of the third coil of the second transformer, connecting a fourth capacitor in parallel to the opposite ends of the fourth coil of the second transformer, and connecting a second inductor between the first output terminal and the second output terminal.

Hereinafter, embodiments of the present disclosure will be described in detail and clearly to such an extent that an ordinary one in the art easily implements the present disclosure.

In the present disclosure, expressions such as “first,” “second,” and the like may refer to various components regardless of order and/or importance, and are only used to distinguish one component from another and do not limit the order or importance of the components.

1 FIG.A 1 FIG.B 2 FIG. is a block diagram illustrating a wireless communication device, according to an embodiment of the present disclosure.is a block diagram illustrating a wireless communication device, according to another embodiment.is a block diagram showing a coupler circuit and input/output terminals of a coupler circuit, according to an embodiment.

1 FIG.A 10 110 120 130 Referring to, a wireless communication deviceaccording to an embodiment may include a radio frequency front end (RFFE), a radio frequency integrated circuit (RFIC), and an antenna.

10 10 10 The wireless communication deviceaccording to various embodiments of the present disclosure may be referred to as various types of devices. The wireless communication devicemay include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a mobile medical appliance, a camera, or a wearable device. However, the wireless communication devicemay not be limited to the above-described devices.

10 130 10 130 The wireless communication devicemay include the antennaconfigured to transmit and receive a radio frequency (RF) signal having a predetermined frequency. Accordingly, the wireless communication deviceaccording to an embodiment of the present disclosure may also be referred to as a “wireless transceiver” or an “antenna device” including the antenna.

10 120 130 The wireless communication devicemay include the RFICconfigured to transmit an RF signal to the antenna.

120 120 According to an embodiment, the RFICmay be configured to control the frequency of the RF signal. In more detail, the RFICmay convert a baseband signal into an RF signal, or may convert an RF signal into a baseband signal.

120 130 For example, during reception, the RFICmay convert an RF signal received through the antennainto a baseband signal.

120 Furthermore, for example, during transmission, the RFICmay convert a baseband signal to an RF signal of about 700 MHz to about 3 GHz used in a first network (e.g., a legacy network).

120 For another example, during transmission, the RFICmay convert a baseband signal into an RF signal in a Sub-6 band (about 6 GHz or less) used in a second network (e.g., a 5G network).

120 For still another example, during transmission, the RFICmay convert a baseband signal into an RF signal of a 5G Above-5 band (e.g., about 6 GHz to about 60 GHz) used for a third network (e.g., 5G network).

10 110 120 130 Besides, the wireless communication devicemay include the RFFEconnected between the RFICand the antenna.

110 100 110 According to an embodiment, the RFFEmay include a coupler circuit. Moreover, the RFFEaccording to an embodiment may further include at least some of a phase shifter, a band pass filter, an amplifier, and a mixer.

110 100 130 In more detail, the RFFEmay include the coupler circuitconnected to the antenna.

1 FIG.B 1 FIG.B 1 FIG.A 120 1 100 10 1 10 Referring toaccording to another embodiment, an RFIC-may include the coupler circuit. Here, a wireless communication device-and a configuration thereof illustrated inmay be understood as an example of the wireless communication deviceand a configuration thereof illustrated in.

10 1 120 1 110 1 120 1 100 In more detail, the wireless communication device-may include the RFIC-connected to a RFFE-. Furthermore, the RFIC-may include the coupler circuitthat outputs complex signals.

100 110 120 1 100 110 That is, referring to the above-described configurations, the coupler circuitmay be included in the RFFEor the RFIC-. However, for convenience of description, it is assumed that the coupler circuitis included in the RFFE.

100 100 According to an embodiment, the coupler circuitmay be configured to output a plurality of complex signals (e.g., I signal and Q signal) having different phases from an input signal. Here, for example, the complex signals output from the coupler circuitmay be applied to a phase shifter for operation of the phase shifter.

100 The coupler circuitaccording to an embodiment may be configured to output an I signal and a Q signal, which are orthogonal to each other, from a single-phase input signal.

100 The coupler circuitaccording to another embodiment may be configured to output quadrature-phase signals (e.g., I+ signal, I− signal, Q+ signal, and Q− signal), whose phases are sequentially shifted by 90 degrees, from differential input signals that are differential with each other.

2 FIG. 100 1 1 2 1 1 0 Referring to, the coupler circuitmay be configured to output a first output signal O(Z) and a second output signal O(Z) from a first input signal I(Z).

100 1 0 0 1 In more detail, the coupler circuitmay be configured to receive the first input signal I(Z) having the input impedance Zthrough a first input terminal IT.

100 1 1 2 1 Also, the coupler circuitmay be configured to output the first output signal O(Z) and the second output signal O(Z) which are orthogonal to each other.

100 1 1 1 100 2 1 2 In more detail, the coupler circuitmay be configured to output the first output signal O(Z) through a first output terminal OT. Moreover, the coupler circuitmay be configured to output the second output signal O(Z) through a second output terminal OT.

1 1 2 1 1 1 2 1 Here, the first output signal O(Z) and the second output signal O(Z) may be orthogonal to each other. For example, the first output signal O(Z) may have a phase of 90 degrees, and the second output signal O(Z) may have a phase of 180 degrees.

1 1 2 1 Accordingly, for example, the first output signal O(Z) may be referred to as an “I signal”. Furthermore, the second output signal O(Z) may be referred to as a “Q signal”.

100 1 1 2 1 1 0 That is, the coupler circuitmay be configured to generate the first output signal O(Z) and the second output signal O(Z), which are orthogonal to each other, from the first input signal I(Z) having a single phase.

100 Referring to the above-described configurations, the coupler circuitmay be configured to perform an operation of generating complex signals from a single-phase input signal.

1 1 2 1 1 Besides, here, each of the first output signal O(Z) and the second output signal O(Z) may have the target impedance Z.

1 130 100 Here, the target impedance Zmay be referred to as “impedance” for minimizing a signal reflected as a signal is delivered to the antennathrough an electrical path including the coupler circuit.

100 1 1 2 1 1 1 0 0 The coupler circuitaccording to an embodiment may be configured to output the first output signal O(Z) and the second output signal O(Z), each of which has the target impedance Z, from the first input signal I(Z) having the input impedance Z.

100 100 1 0 100 1 1 2 1 1 In more detail, the coupler circuitmay include at least two or more transformers. Moreover, the coupler circuitmay be configured to convert the impedance of the first input signal I(Z) by using a transformer. In this way, the coupler circuitmay output the first output signal O(Z) and the second output signal O(Z), each of which has the target impedance Z.

100 1 1 2 1 1 0 0 1 That is, the coupler circuitmay be configured to perform impedance matching that allows the first output signal O(Z) and the second output signal O(Z), which are generated from the first input signal I(Z) having the input impedance Z, to have the target impedance Z.

100 100 1 Referring to the above-described configurations, the coupler circuitmay be configured to output output signals having different phases from an input signal. Furthermore, the coupler circuitmay be configured to perform impedance matching by using a transformer such that each output signal has the target impedance Z.

100 In other words, the coupler circuitmay be configured to perform an operation of generating complex signals from the input signal, and an impedance matching operation of allowing each of complex signals to have a target impedance.

10 100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the wireless communication device(or the coupler circuit) according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 10 That is, through the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

3 FIG. 4 4 FIGS.A toD 3 FIG. 5 5 FIGS.A toD 3 FIG. is a circuit diagram showing a coupler circuit, according to an embodiment.are circuit diagrams showing an equivalent circuit of the coupler circuit of, according to an embodiment.are circuit diagrams showing an equivalent circuit of the coupler circuit of, according to another embodiment.

3 FIG. 100 1 2 1 4 1 2 1 Referring to, a coupler circuitA according to an embodiment may include a first transformer TF, a second transformer TF, first to fourth capacitors Cto C, a first inductor L, a second inductor L, and a first resistor R.

100 100 3 FIG. 1 2 FIGS.and Here, the coupler circuitA illustrated inmay be referenced as an example of the coupler circuitillustrated in.

3 4 4 FIGS.andA toD 3 FIG. 4 4 FIGS.A toD 4 4 FIGS.A toD 100 100 1 100 1 Referring totogether, the coupler circuitA illustrated inmay be referenced as an equivalent circuit having substantially the same circuit configuration as a coupler circuitAillustrated in each of. Moreover, the circuit diagram of the coupler circuitAillustrated in each ofmay also be referenced as an equivalent circuit.

4 FIG.A 100 1 1 2 3 4 1 1 2 Referring to, the coupler circuitAaccording to an embodiment may include a plurality of transmission lines TL, TL, TL, and TLconnecting the first input terminal IT, the first output terminal OT, and the second output terminal OT.

100 1 2 1 1 100 1 1 1 1 100 1 3 2 2 1 1 100 1 4 1 2 2 100 1 For example, the coupler circuitAmay include the second transmission line TLconnected between the first input terminal ITand the first output terminal OT. Furthermore, the coupler circuitAmay include the first transmission line TLconnected between the first input terminal ITand the first resistor R. Also, the coupler circuitAmay include the third transmission line TLconnected between the second output terminal OTand a second node Nbetween the first transmission line TLand the first resistor R. Besides, the coupler circuitAmay include the fourth transmission line TLconnected between the first output terminal OTand the second output terminal OT. The second node Nmay be configured as an isolated terminal of the coupler circuitA.

1 2 3 4 100 1 4 Here, for example, each of the plurality of transmission lines TL, TL, TL, and TLmay have a length corresponding to a value obtained by dividing a wavelength according to an operating frequency ‘f’, at which the coupler circuitAoperates, by.

100 1 1 1 2 100 1 2 2 3 In addition, the coupler circuitAmay include a first ideal transformer ITFconnected between the first output terminal OTand the second transmission line TL. Moreover, the coupler circuitAmay include the second ideal transformer ITFconnected between the second output terminal OTand the third transmission line TL.

1 1 1 1 1 1 3 4 FIGS.andA 3 4 FIGS.andA The first ideal transformer ITFmay have a first coil connected between the first input terminal ITand a first reference node (e.g., ground in), and the first input signal Imay be defined with respect to the first reference node. The first ideal transformer ITFmay have a second coil inductively coupled to the first coil and connected between the first output terminal OTand a second reference node (e.g., ground in), and the first output signal Omay be defined with respect to the second reference node.

2 100 2 100 2 2 3 4 FIGS.andA 3 4 FIGS.andA The second ideal transformer ITFmay have a first coil (e.g., a third coil of the coupler circuitA) connected between the second node Nand a third reference node (e.g., ground in). The second ideal transformer may have a second coil (e.g., a fourth coil of the coupler circuitA) connected between the second output terminal OTand a fourth reference node (e.g., ground in), and the second output signal Omay be defined with respect to the fourth reference node.

1 2 Each of the first ideal transformer ITFand the second ideal transformer ITFmay have a conversion ratio of N:1. Here, ‘N’ may have a value according to Equation 1 below.

4 4 FIGS.A andB 100 1 1 2 3 4 Also, referring to, in a circuit diagram of the coupler circuitAaccording to an embodiment, each of the plurality of transmission lines TL, TL, TL, and TLmay be expressed equivalently to one inductor and two capacitors connected in a pi (π) shape.

100 1 1 2 3 4 For example, in the circuit diagram of the coupler circuitA, each of the plurality of transmission lines TL, TL, TL, and TLmay be expressed equivalently to two capacitors and an inductor connected between the two capacitors.

4 FIG.B 100 1 1 1 2 Referring to, the coupler circuitAmay include a first conversion inductor La, which is one among configurations equivalent to the first transmission line TL. The first conversion inductor La may be connected between a first node Nand the second node N.

100 1 1 1 2 1 1 The coupler circuitAmay include a first intermediate capacitor Ciequivalent to a configuration in which one capacitor among configurations equivalent to the first transmission line TLand one capacitor among configurations equivalent to the second transmission line TLare connected in parallel. The first intermediate capacitor Cimay be connected between the first node Nand a ground.

100 1 2 1 1 The coupler circuitAmay include a second conversion inductor Lb, which is one among configurations equivalent to the second transmission line TL. The second conversion inductor Lb may be connected between the first node Nand the first ideal transformer ITF.

100 1 2 2 2 1 The coupler circuitAmay include a second intermediate capacitor Cicorresponding to one capacitor among configurations equivalent to the second transmission line TL. The second intermediate capacitor Cimay be connected to ground in parallel with the first ideal transformer ITF.

100 1 3 2 2 The coupler circuitAmay include a third conversion inductor Lc, which is one among configurations equivalent to the third transmission line TL. The third conversion inductor Lc may be connected between the second node Nand the second ideal transformer ITF.

100 1 3 1 3 3 2 The coupler circuitAmay include a third intermediate capacitor Ciequivalent to a configuration in which one capacitor among configurations equivalent to the first transmission line TLand one capacitor among configurations equivalent to the third transmission line TLare connected in parallel. The third intermediate capacitor Cimay be connected between the second node Nand ground.

100 1 4 3 4 2 The coupler circuitAmay include a fourth intermediate capacitor Cicorresponding to one capacitor among configurations equivalent to the third transmission line TL. The fourth intermediate capacitor Cimay be connected to ground in parallel with the second ideal transformer ITF.

1 3 2 4 Here, the first intermediate capacitor Ciand the third intermediate capacitor Cimay have the same capacitance. Furthermore, the second intermediate capacitor Ciand the fourth intermediate capacitor Cimay have the same capacitance. In addition, the second conversion inductor Lb and the third conversion inductor Lc may have the same inductance.

100 1 5 6 4 1 2 5 1 6 2 Also, the coupler circuitAmay include a fourth conversion inductor Ld, a fifth intermediate capacitor Ci, and a sixth intermediate capacitor Ci, which are equivalent to the fourth transmission line TL. The fourth conversion inductor Ld may be connected between the first output terminal OTand the second output terminal OT. Moreover, the fifth intermediate capacitor Cimay be connected between the first output terminal OTand ground. In addition, the sixth intermediate capacitor Cimay be connected between the second output terminal OTand ground.

4 FIG.C 100 1 1 1 1 Besides, referring to, the coupler circuitAaccording to an embodiment may further include a first additional inductor Lpand a first additional capacitor Cp, each of which is connected to ground, between the second conversion inductor Lb and the first ideal transformer ITF.

1 1 1 Here, the capacitance of the first additional capacitor Cpmay be determined by the inductance of the first additional inductor Lp. For example, the first additional capacitor Cpmay have capacitance according to Equation 2 below.

1 100 Here, Lp may be understood as the inductance of the first additional inductor Lp. Furthermore, ‘f’ may be understood as the frequency at which the coupler circuitoperates.

100 1 2 2 2 Also, the coupler circuitAmay include a second additional inductor Lpand a second additional capacitor Cp, each of which is connected to ground, between the third conversion inductor Lc and the second ideal transformer ITF.

1 2 1 2 Here, the first additional inductor Lpand the second additional inductor Lpmay have the same inductance. Moreover, the first additional capacitor Cpand the second additional capacitor Cpmay have the same capacitance.

2 1 1 1 4 FIG.C 4 FIG.D The capacitors Ciand Cpconnected between the second conversion inductor Lb and the first ideal transformer ITFinmay be included in the capacitor connected to the first output terminal OTin.

1 1 1 1 4 FIG.C 4 FIG.D 2 For example, each of the first additional capacitor Cpand the first intermediate capacitor Ciofmay have capacitance equal to a value obtained by multiplying Nby the capacitance in a state where it is connected between the second conversion inductor Lb and the first ideal transformer ITF, and may be expressed as a capacitor connected to the first output terminal OTin.

4 FIG.D 2 2 2 1 1 5 That is, referring to, a second capacitor Cmay have capacitance equal to a value obtained by adding a value, which is obtained by multiplying Nby the capacitance of the capacitors Ciand Cpconnected between the second conversion inductor Lb and the first ideal transformer ITF, and the capacitance of the fifth intermediate capacitor Ci.

4 2 Moreover, a fourth capacitor Cmay have the same capacitance as the second capacitor C.

4 3 FIGS.D and 1 1 1 2 2 2 Furthermore, referring totogether, the first ideal transformer ITF, the second conversion inductor Lb, and the first additional inductor Lpmay be referenced as being equivalent to the first transformer TF. Also, the second ideal transformer ITF, the third conversion inductor Lc, and the second additional inductor Lpmay be referenced as being equivalent to the second transformer TF.

4 FIG.D 3 FIG. 4 FIG.D 3 FIG. 1 2 The first conversion inductor La ofmay have the same inductance as the first inductor Lof. Moreover, the fourth conversion inductor Ld ofmay have the same inductance as the second inductor Lof.

1 1 1 3 3 2 3 FIG. 4 FIG.D 3 FIG. 4 FIG.D The first capacitor Cinmay have the same capacitance as the first intermediate capacitor Ciconnected to the first node Nin. The third capacitor Cinmay have the same capacitance as the third intermediate capacitor Ciconnected to the second node Nin.

100 100 1 1 2 3 4 1 2 3 FIG. 4 4 FIGS.A toD That is, the coupler circuitA illustrated inmay be understood as a circuit equivalent to the coupler circuitAof, which includes circuit configurations equivalent to the plurality of transmission lines TL, TL, TL, and TLand the ideal transformers ITFand ITF.

3 FIG. 100 1 1 1 Referring to, the coupler circuitA may include the first transformer TFconnected between the first input terminal ITand the first output terminal OT.

1 1 1 Here, in the first transformer TF, each of a first coil inductance Lx on one side adjacent to the first input terminal IT, a second coil inductance Ly on the other side adjacent to the first output terminal OT, and a coupling coefficient ‘k’ may have values based on Equations 3 to 5 below.

1 Here, Lp may be understood as the inductance of the first additional inductor Lp.

1 1 1 4 FIG.D That is, the first transformer TFmay be understood as a configuration derived as being equivalent to the configuration of the first ideal transformer ITF, the second conversion inductor Lb, and the first additional inductor Lp, which are connected to each other in.

100 1 1 1 1 100 1 1 Moreover, the coupler circuitA may include the first inductor Lconnected to the first node Nbetween the first input terminal ITand the first transformer TF. Furthermore, the coupler circuitA may include the first resistor Rconnected between the first inductor Land ground.

100 1 1 1 That is, the coupler circuitA may include the first inductor Land the first resistor R, which are connected between the first node Nand ground in series with each other.

1 Here, the first inductor Lmay have inductance based on Equation 6 below.

1 0 That is, the inductance of the first inductor Lmay be determined according to a value obtained by dividing the input impedance Zby the operating frequency ‘f’.

100 1 1 2 1 Also, the coupler circuitA may include the first capacitor Cconnected in parallel to opposite ends of the first coil of the first transformer TFand the second capacitor Cconnected in parallel to opposite ends of the second coil of the first transformer TF.

100 1 1 1 100 2 1 1 In more detail, the coupler circuitA may include the first capacitor Cconnected to the first transformer TFin parallel between the first node Nand ground. Furthermore, the coupler circuitA may include the second capacitor Cconnected to the first transformer TFin parallel between the first output terminal OTand ground.

1 2 Here, each of the first capacitor Cand the second capacitor Cmay have capacitance based on Equations 7 and 8 below.

1 4 FIG.C Here, Cp may be understood as the capacitance of the first additional capacitor Cpof.

100 2 2 2 1 1 Moreover, the coupler circuitA may include the second transformer TFconnected between the second output terminal OTand the second node Nbetween the first inductor Land the first resistor R.

2 1 According to an embodiment, the second transformer TFmay have the same coil inductance Lx and Ly and a coupling coefficient ‘k’ as the first transformer TF.

100 3 100 4 2 100 Besides, the coupler circuitA may include the third capacitor Cconnected in parallel to opposite ends of the first coil of the second transformer (e.g., the third coil of the coupler circuitA) and the fourth capacitor Cconnected in parallel to opposite ends of the second coil of the second transformer TF(e.g., the fourth coil of the coupler circuitA).

100 3 2 2 100 4 2 2 In more detail, the coupler circuitA may include the third capacitor Cconnected to the second transformer TFin parallel between the second node Nand ground. Moreover, the coupler circuitA may include the fourth capacitor Cconnected to the second transformer TFin parallel between the second output terminal OTand ground.

3 1 4 2 Here, the third capacitor Cmay have the same capacitance as the first capacitor C. Furthermore, the fourth capacitor Cmay have the same capacitance as the second capacitor C.

100 2 1 2 Also, the coupler circuitA may include the second inductor Lconnected between the first output terminal OTand the second output terminal OT.

2 Here, the second inductor Lmay have inductance based on Equation 9 below.

2 1 That is, the inductance of the second inductor Lmay be determined according to a value obtained by dividing the target impedance Zby the operating frequency ‘f’.

100 1 0 1 100 0 1 0 1 1 According to an embodiment, the coupler circuitA may be configured to convert the impedance of the first input signal I(Z) by using the first transformer TF. For example, the coupler circuitA may be configured to convert the input impedance Zof the first input signal I(Z) to the target impedance Zby using the first transformer TF.

100 1 1 1 1 In this way, the coupler circuitA may be configured to output the first output signal O(Z) having the target impedance Zthrough the first output terminal OT.

100 2 2 100 0 2 1 2 Besides, the coupler circuitA may be configured to convert the impedance of a signal applied to the second node Nby using the second transformer TF. For example, the coupler circuitA may be configured to convert the input impedance Zof the signal applied to the second node Nto the target impedance Zby using the second transformer TF.

100 2 1 1 2 In this way, the coupler circuitA may be configured tot output the second output signal O(Z) having the target impedance Zthrough the second output terminal OT.

2 1 1 1 1 1 2 1 Here, the second output signal O(Z) may be orthogonal to the first output signal O(Z). For example, the first output signal O(Z) may have a phase of 90 degrees, and the second output signal O(Z) may have a phase of 180 degrees.

100 1 2 1 2 3 4 1 2 Referring to the above-described configurations, the coupler circuitA may include the transformers TFand TFimplemented by combining at least some of configurations included in equivalent circuits of the plurality of transmission lines TL, TL, TL, and TLwith the ideal transformers ITFand ITF.

100 1 2 1 2 3 4 1 2 In more detail, the coupler circuitA may include the transformers TFand TFimplemented by combining at least some (e.g., the second conversion inductor Lb) of inductors included in the equivalent circuits of the plurality of transmission lines TL, TL, TL, and TLwith the ideal transformers ITFand ITF.

100 1 1 1 2 For example, the coupler circuitA may include the first transformer TFformed by combining the second conversion inductor Lb, the first additional inductor Lp, and the first ideal transformer ITF, which are included in the equivalent circuit of the second transmission line TL.

100 1 1 2 1 1 0 1 2 100 1 2 1 1 2 1 1 The coupler circuitA may output the output signals O(Z) and O(Z) having different phases from the first input signal I(Z) by using the transformers TFand TFand a plurality of elements. Moreover, the coupler circuitA may be configured to perform impedance matching by using the transformers TFand TFand the plurality of elements such that each of the output signals O(Z) and O(Z) has the target impedance Z.

100 1 1 2 1 1 0 1 1 2 1 1 That is, the coupler circuitA may be configured to perform an operation of generating the output signals O(Z) and O(Z) having different phases from the first input signal I(Z), and an impedance matching operation of allowing each of the output signals O(Z) and O(Z) to have the target impedance Z.

100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the coupler circuitA according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 10 That is, through the above-described configurations, the coupler circuitA according to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

5 5 FIGS.A toD 3 FIG. are circuit diagrams showing an equivalent circuit of the coupler circuit of, according to another embodiment.

3 5 5 FIGS.andA toD 3 FIG. 5 5 FIGS.A toD 100 100 2 Moreover, referring totogether, the circuit diagram of the coupler circuitA illustrated inmay be referenced as an equivalent circuit having substantially the same configuration as the circuit diagram of a coupler circuitAillustrated in each of.

100 2 5 5 FIGS.A toD Moreover, the circuit diagram of the coupler circuitAillustrated in each ofmay also be referenced as an equivalent circuit.

100 2 100 1 5 5 FIGS.A toD 4 4 FIGS.A toD However, it may be understood that the configuration of at least some of the coupler circuitAillustrated inis substantially the same as a portion of the configuration of the coupler circuitAillustrated in.

Accordingly, the same reference numerals are used for components the same or substantially the same as the above-described components, and descriptions the same as the above-described descriptions are omitted to avoid redundancy.

5 FIG.A 100 2 1 2 3 4 1 1 2 Referring to, the coupler circuitAaccording to an embodiment may include a plurality of transmission lines TL, TL, TL, and TLconnecting the first input terminal IT, the first output terminal OT, and the second output terminal OT.

100 2 1 1 2 100 2 2 2 3 Moreover, the coupler circuitAmay include a first ideal transformer JTFconnected between the first input terminal ITand the second transmission line TL. Furthermore, the coupler circuitAmay include a second ideal transformer JTFconnected between the second node Nand the third transmission line TL.

1 2 Each of the first ideal transformer JTFand the second ideal transformer JTFmay have a conversion ratio of 1:N.

5 5 FIGS.A andB 100 2 1 2 3 4 Also, referring to, in a circuit diagram of the coupler circuitAaccording to an embodiment, each of the plurality of transmission lines TL, TL, TL, and TLmay be expressed equivalently to one inductor and two capacitors connected in a pi (π) shape.

5 FIG.B 100 2 1 1 2 Referring to, the coupler circuitAmay include a first conversion inductor La, which is one among configurations equivalent to the first transmission line TL. The first conversion inductor La may be connected between the first node Nand the second node N.

100 2 1 1 1 1 The coupler circuitAmay include a first intermediate capacitor Cjcorresponding to one capacitor among configurations equivalent to the first transmission line TL. The first intermediate capacitor Cjmay be connected between the first node Nand a ground.

100 2 2 1 2 2 The coupler circuitAmay include a second intermediate capacitor Cjcorresponding to one capacitor among configurations equivalent to the first transmission line TL. The second intermediate capacitor Cjmay be connected between the second node Nand ground.

1 2 Here, the first intermediate capacitor Cjand the second intermediate capacitor Cjmay have the same capacitance.

100 2 2 1 1 The coupler circuitAmay include a second conversion inductor Lb, which is one among configurations equivalent to the second transmission line TL. The second conversion inductor Lb may be connected between the first ideal transformer JTFand the first output terminal OT.

100 2 3 2 3 1 The coupler circuitAmay include a third intermediate capacitor Cjcorresponding to one capacitor among configurations equivalent to the second transmission line TL. The third intermediate capacitor Cjmay be connected to ground in parallel with the first ideal transformer JTF.

100 2 4 2 4 4 1 The coupler circuitAmay include a fourth intermediate capacitor Cjequivalent to a configuration in which one capacitor among configurations equivalent to the second transmission line TLand one capacitor among configurations equivalent to the fourth transmission line TLare connected in parallel. The fourth intermediate capacitor Cjmay be connected between the first output terminal OTand ground.

100 2 3 2 2 The coupler circuitAmay include a third conversion inductor Lc, which is one among configurations equivalent to the third transmission line TL. The third conversion inductor Lc may be connected between the second ideal transformer JTFand the second output terminal OT.

100 2 5 3 5 2 The coupler circuitAmay include a fifth intermediate capacitor Cjcorresponding to one capacitor among configurations equivalent to the third transmission line TL. The fifth intermediate capacitor Cjmay be connected to ground in parallel with the second ideal transformer JTF.

100 2 6 3 4 6 2 The coupler circuitAmay include a sixth intermediate capacitor Cjequivalent to a configuration in which one capacitor among configurations equivalent to the third transmission line TLand one capacitor among configurations equivalent to the fourth transmission line TLare connected in parallel. The sixth intermediate capacitor Cjmay be connected between the second output terminal OTand ground.

3 5 4 6 Furthermore, the third intermediate capacitor Cjand the fifth intermediate capacitor Cjmay have the same capacitance. Furthermore, the fourth intermediate capacitor Cjand the sixth intermediate capacitor Cjmay have the same capacitance. In addition, the second conversion inductor Lb and the third conversion inductor Lc may have the same inductance.

100 2 4 1 2 Moreover, the coupler circuitAmay include the fourth conversion inductor Ld, which is one among configurations equivalent to the fourth transmission line TL. The fourth conversion inductor Ld may be connected between the first output terminal OTand the second output terminal OT.

5 FIG.C 100 2 1 1 1 1 1 Besides, referring to, the coupler circuitAaccording to an embodiment may further include the first additional inductor Lpand the first additional capacitor Cp, each of which is connected to ground, between the second conversion inductor Lb and the first ideal transformer JTF. Here, the capacitance of the first additional capacitor Cpmay be determined by the inductance of the first additional inductor Lp.

100 2 2 2 2 Also, the coupler circuitAmay include a second additional inductor Lpand a second additional capacitor Cp, each of which is connected to ground, between the third conversion inductor Lc and the second ideal transformer JTF.

1 2 1 2 Here, the first additional inductor Lpand the second additional inductor Lpmay have the same inductance. Moreover, the first additional capacitor Cpand the second additional capacitor Cpmay have the same capacitance.

3 1 1 1 1 5 FIG.C 5 FIG.D The capacitors Cjand Cpconnected between the second conversion inductor Lb and the first ideal transformer JTFinmay be included in the capacitor connected to the first input terminal IT(or the first node N) in.

1 3 2 1 1 5 FIG.C 5 FIG.D For example, each of the first additional capacitor Cpand the third intermediate capacitor Cjofmay have capacitance equal to a value obtained by multiplying Nby the capacitance in a state where it is connected between the second conversion inductor Lb and the first ideal transformer JTF, and may be expressed as a capacitor connected to the first input terminal ITin.

1 2 3 1 1 1 That is, the first capacitor Cmay have capacitance equal to a value obtained by adding a value, which is obtained by multiplying Nby the capacitance of the capacitors Cjand Cpconnected between the second conversion inductor Lb and the first ideal transformer JTF, and the capacitance of the first intermediate capacitor Cj.

3 1 Moreover, the third capacitor Cmay have the same capacitance as the first capacitor C.

5 3 FIGS.D and 1 1 1 2 2 2 Furthermore, referring totogether, the first ideal transformer JTF, the second conversion inductor Lb, and the first additional inductor Lpmay be referenced as being equivalent to the first transformer TF. Also, the second ideal transformer JTF, the third conversion inductor Lc, and the second additional inductor Lpmay be referenced as being equivalent to the second transformer TF.

5 FIG.D 3 FIG. 5 FIG.D 3 FIG. 1 2 The first conversion inductor La ofmay have the same inductance as the first inductor Lof. Moreover, the fourth conversion inductor Ld ofmay have the same inductance as the second inductor Lof.

3 FIG. 100 1 2 1 2 3 4 1 2 That is, referring to, the coupler circuitA may include the transformers TFand TFimplemented by combining at least some of inductors included in equivalent circuits of the plurality of transmission lines TL, TL, TL, and TLwith the ideal transformers JTFand JTF.

100 1 1 1 2 For example, the coupler circuitA may include the first transformer TFformed by combining the second conversion inductor Lb, the first additional inductor Lp, and the first ideal transformer JTF, which are included in the equivalent circuit of the second transmission line TL.

100 1 1 2 1 1 0 1 2 The coupler circuitA may be configured to output the output signals O(Z) and O(Z) having different phases from the first input signal I(Z) by using the transformers TFand TFand a plurality of elements.

100 1 2 1 1 2 1 1 Moreover, the coupler circuitA may be configured to perform impedance matching by using the transformers TFand TFand the plurality of elements such that each of the output signals O(Z) and O(Z) has the target impedance Z.

100 1 1 2 1 1 0 1 1 2 1 1 That is, the coupler circuitA may be configured to perform an operation of generating the output signals O(Z) and O(Z) having different phases from the first input signal I(Z), and an impedance matching operation of allowing each of the output signals O(Z) and O(Z) to have the target impedance Z.

100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the coupler circuitA according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 10 That is, through the above-described configurations, the coupler circuitA according to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

6 FIG. is a circuit diagram showing a coupler circuit that outputs a plurality of orthogonal signals from a differential input signal, according to an embodiment.

6 FIG. 100 1 2 1 4 1 4 1 Referring to, a coupler circuitB according to an embodiment may include a first transformer TFF, a second transformer TFF, first to fourth capacitors CCto CC, first to fourth inductors Lto L, and the first resistor R.

100 100 6 FIG. 1 FIG. Here, the coupler circuitB illustrated inmay be an example of the coupler circuitillustrated in. Accordingly, the same reference numerals are used for components the same or substantially the same as the above-described components, and descriptions the same as the above-described descriptions are omitted to avoid redundancy.

6 FIG. 100 1 1 2 1 3 Referring to, the coupler circuitB may include the first transformer TFFconnected between the first and second input terminals ITand IT, and the first and third output terminals OTand OT.

1 2 1 1 3 Here, a first coil inductance Lz on one side adjacent to the first input terminal ITand the second input terminal ITof the first transformer TFF, and a second coil inductance Lq on the other side adjacent to the first output terminal OTand the third output terminal OTmay have values based on Equations 10 and 11, respectively.

1 6 FIG. Furthermore, the coupling coefficient ‘k’ of the first transformer TFFillustrated inmay have a value based on Equation 5 described above.

100 1 1 1 1 100 1 1 2 1 Moreover, the coupler circuitB may include the first inductor Lconnected to the first node Nbetween the first input terminal ITand the first transformer TFF. In more detail, the coupler circuitB may include the first inductor Lconnected between the first node Nand the second node N. Here, the first inductor Lmay have inductance based on Equation 6 described above.

100 1 1 100 1 1 2 Furthermore, the coupler circuitB may include the first resistor Rconnected to the first inductor L. In more detail, the coupler circuitB may include the first resistor R, which is connected to the first inductor Lvia the second node N.

100 1 1 2 1 The coupler circuitB may include the first capacitor CCconnected in parallel to opposite ends of the first coil of the first transformer TFFand the second capacitor CCconnected in parallel to opposite ends of the second coil of the first transformer TFF.

100 1 1 1 2 100 2 1 1 3 In more detail, the coupler circuitB may include the first capacitor CCconnected to the first transformer TFFin parallel between the first input terminal ITand the second input terminal IT. In addition, the coupler circuitB may include the second capacitor CCconnected to the first transformer TFFin parallel between the first output terminal OTand the third output terminal OT.

1 Here, the first capacitor CCmay have capacitance based on Equation 12 below.

2 Moreover, the second capacitor CCmay have capacitance based on Equation 13 below.

1 100 1 4 FIG.C 4 FIG.C Here, Cp may be understood as the capacitance of an additional capacitor (e.g., the first additional capacitor Cpof) added to the equivalent circuit of the coupler circuitB together with an additional inductor (e.g., the first additional inductor Lpof).

100 2 2 4 2 1 1 Also, the coupler circuitB may include the second transformer TFFconnected between the second and fourth output terminals OTand OTand the second node Nbetween the first inductor Land the first resistor R.

2 1 According to an embodiment, the second transformer TFFmay have the same coil inductance Lz and Lq and the coupling coefficient k as the first transformer TFF.

100 3 2 4 2 Besides, the coupler circuitB may include the third capacitor CCconnected in parallel to opposite ends of the first coil (e.g., third coil) of the second transformer TFFand the fourth capacitor CCconnected in parallel to opposite ends of the second coil (e.g., fourth coil) of the second transformer TFF.

100 3 1 2 2 100 3 2 2 4 4 2 2 In more detail, the coupler circuitB may include the third capacitor CCconnected in parallel with the first resistor Rand the second transformer TFFat the second node N. In more detail, the coupler circuitB may include the third capacitor CCconnected in parallel with the second transformer TFFbetween the second node Nand a fourth node N. The fourth node Nmay be configured as differential with the second node N(e.g., when the second node Nis configured as an isolated terminal).

100 4 2 2 4 In addition, the coupler circuitB may include the fourth capacitor CCconnected to the second transformer TFFin parallel between the second output terminal OTand the fourth output terminal OT.

3 1 4 2 Here, the third capacitor CCmay have the same capacitance as the first capacitor CC. Furthermore, the fourth capacitor CCmay have the same capacitance as the second capacitor CC.

100 3 2 Moreover, the coupler circuitB may include the third inductor Lconnected to the second input terminal IT.

100 3 3 2 1 4 1 2 3 1 In more detail, the coupler circuitB may include the third inductor Lconnected between a third node Nbetween the second input terminal ITand the first transformer TFF, and the fourth node Nbetween the first resistor Rand the second transformer TFF. Here, the third inductor Lmay have the same inductance as the first inductor L.

3 1 3 1 Furthermore, the third inductor Lmay be adjacent to the first inductor L. For example, the third inductor Lmay be adjacent to the first inductor Lwithin a predetermined distance.

1 3 Besides, the first inductor Land the third inductor Lmay be configured to flow currents in opposite directions to each other.

1 1 2 3 4 3 For example, the current formed in the first inductor Lmay be formed in a direction from the first node Nto the second node N(e.g., −y direction). In addition, the current formed in the third inductor Lmay be formed in a direction (e.g., +y direction) from the fourth node Ntoward the third node N.

3 1 In this way, the third inductor Land the first inductor Lmay be inductively coupled to each other.

1 3 Through the above-described configurations, the first inductor Land the third inductor Lmay be implemented to have relatively low inductance compared to a case where they are not coupled to each other.

100 2 1 2 2 Also, the coupler circuitB may include the second inductor Lconnected between the first output terminal OTand the second output terminal OT. Here, the second inductor Lmay have inductance based on Equation 9 described above.

100 4 3 4 4 2 Moreover, the coupler circuitB may include the fourth inductor Lconnected between the third output terminal OTand the fourth output terminal OT. Here, the fourth inductor Lmay have the same inductance as the second inductor L.

4 2 4 2 Moreover, the fourth inductor Lmay be adjacent to the second inductor L. For example, the fourth inductor Lmay be adjacent to the second inductor Lwithin a predetermined distance.

2 4 Besides, the second inductor Land the fourth inductor Lmay be configured to flow currents in opposite directions to each other.

2 1 2 4 4 3 For example, the current formed in the second inductor Lmay be formed in a direction (e.g., −y direction) from the first output terminal OTto the second output terminal OT. Moreover, the current formed in the fourth inductor Lmay be formed in a direction (e.g., +y direction) from the fourth output terminal OTto the third output terminal OT.

4 2 In this way, the fourth inductor Land the second inductor Lmay be inductively coupled to each other.

2 4 Through the above-described configurations, the second inductor Land the fourth inductor Lmay be implemented to have relatively low inductance compared to a case where they are not coupled to each other.

100 Referring to the above-described configurations, at least two or more inductors included in the coupler circuitB according to an embodiment may be coupled by being adjacent to each other.

100 In this way, the coupler circuitB according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 1 1 4 1 1 1 0 2 0 0 The coupler circuitB according to an embodiment may be configured to output the first to fourth output signals O(Z) to O(Z), each of which has the target impedance Z, from the first and second input signals I(Z) and I(Z) having the input impedance Z.

100 1 0 1 100 2 0 2 The coupler circuitB may be configured to receive the first input signal I(Z) through the first input terminal IT. Furthermore, the coupler circuitB may be configured to receive the second input signal I(Z) through the second input terminal IT.

1 0 2 0 1 0 2 0 Here, the first input signal I(Z) and the second input signal I(Z) may be differential with each other. For example, the first input signal I(Z) may have a phase of 0 degrees, and the second input signal I(Z) may have a phase of 180 degrees.

100 1 1 1 100 2 1 2 100 3 1 3 100 4 1 4 Moreover, the coupler circuitB may be configured to output the first output signal O(Z) through the first output terminal OT. Furthermore, the coupler circuitB may be configured to output the second output signal O(Z) through the second output terminal OT. Also, the coupler circuitB may be configured to output the third output signal O(Z) through the third output terminal OT. Besides, the coupler circuitB may be configured to output the fourth output signal O(Z) through the fourth output terminal OT.

1 1 2 1 1 1 3 1 6 FIG. 6 FIG. The first coil of the first ideal transformer TFFmay be connected between the first input terminal ITand a first reference node (e.g., connected to the second input terminal ITin), and the first input signal Imay be defined with respect to the first reference node. The second coil of the first ideal transformer TFFmay be connected between the first output terminal OTand a second reference node (e.g., connected to the third output terminal OTin), and the first output signal Omay be defined with respect to the second reference node.

2 2 4 2 2 4 2 6 FIG. 6 FIG. The first coil (e.g., third coil) of the second ideal transformer TFFmay be connected between the second node Nand a third reference node (e.g., fourth node Nin). The second coil (e.g., fourth coil) of the second ideal transformer IFFmay be connected between the second output terminal OTand a fourth reference node (e.g., connected to the fourth output terminal OTin), and the second output signal Omay be defined with respect to the fourth reference node.

1 1 4 1 1 1 2 1 3 1 4 1 Here, the first to fourth output signals O(Z) to O(Z) may be understood as complex signals whose phases are sequentially shifted by 90 degrees. For example, the first output signal O(Z) may have a phase of 90 degrees; the second output signal O(Z) may have a phase of 180 degrees; the third output signal O(Z) may have a phase of 270 degrees; and, the fourth output signal O(Z) may have a phase of 0 degrees.

1 1 2 1 3 1 4 1 Accordingly, for example, the first output signal O(Z) may be referred to as “Q+ signal”; the second output signal O(Z) may be referred to as “I+ signal”; the third output signal O(Z) may be referred to as “Q− signal”; and, the fourth output signal O(Z) may be referred to as “I− signal”.

100 1 1 4 1 1 0 2 0 1 2 Referring to the above-described configurations, the coupler circuitB may be configured to output the output signals O(Z) to O(Z) having different phases from the first input signal I(Z) and the second input signal I(Z) by using the transformers TFFand TFFand a plurality of elements.

100 1 2 1 1 4 1 1 Moreover, the coupler circuitB may be configured to perform impedance matching by using the transformers TFFand TFFand the plurality of elements such that each of the output signals O(Z) to O(Z) has the target impedance Z.

100 1 1 4 1 1 0 2 0 1 1 4 1 1 That is, the coupler circuitB may be configured to perform an operation of generating the output signals O(Z) to O(Z) having different phases from the first input signal I(Z) and the second input signal I(Z), and an impedance matching operation of allowing each of the output signals O(Z) to O(Z) to have the target impedance Z.

100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the coupler circuitB according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 10 That is, through the above-described configurations, the coupler circuitB according to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

7 FIG. is a circuit diagram showing a coupler circuit connected to at least one transistor, according to an embodiment.

7 FIG. 100 1 2 1 4 1 2 1 1 2 Referring to, a coupler circuitC according to an embodiment may include the first transformer TF, the second transformer TF, first to fourth capacitors CDto CD, the first inductor L, the second inductor L, the first resistor R, an input transistor ITR, a first output transistor OTR, and a second output transistor OTR.

100 100 100 1 2 100 7 FIG. 2 FIG. 7 FIG. 3 FIG. The coupler circuitC illustrated inmay be understood as an example of the coupler circuitillustrated in. Moreover, the coupler circuitC illustrated inmay be understood as a configuration that further includes the input transistor ITR, the first output transistor OTR, and the second output transistor OTRin the configuration of the coupler circuitillustrated in.

Accordingly, the same reference numerals are used for components the same or substantially the same as the above-described components, and descriptions the same as the above-described descriptions are omitted to avoid redundancy.

100 1 The coupler circuitC may include the input transistor ITR connected to the first input terminal IT.

1 The input transistor ITR may include an input resistor Ra and an input capacitor Ca connected in parallel between the first input terminal ITand ground. Here, the input capacitor Ca may be understood as a parasitic capacitor of the input transistor ITR.

1 In this case, the first capacitor CDmay have capacitance obtained by subtracting a value corresponding to the capacitance of the input capacitor Ca from a value calculated based on Equation 7 described above.

Here, the value calculated based on Equation 7 may be referred to as “first capacitance”.

1 1 100 0 That is, when the first input terminal ITis connected to the input transistor ITR, the first capacitor CDof the coupler circuitC may have a first subtraction capacitance obtained by subtracting parasitic capacitance of the input transistor ITR from the first capacitance calculated from the input impedance Zand the operating frequency ‘f’.

100 1 1 Moreover, the coupler circuitC may include the first output transistor OTRconnected to the first output terminal OT.

1 1 1 The first output transistor OTRmay include a first output resistor Rb and a first output capacitor Cb connected in parallel between the first output terminal OTand ground. Here, the first output capacitor Cb may be understood as a parasitic capacitor of the first output transistor OTR.

2 In this case, the second capacitor CDmay have capacitance obtained by subtracting the capacitance of the first output capacitor Cb from a value calculated based on Equation 8 described above.

Here, the value calculated based on Equation 8 may be referred to as “second capacitance”.

1 1 2 100 1 1 That is, when the first output terminal OTis connected to the first output transistor OTR, the second capacitor CDof the coupler circuitC may have second subtraction capacitance obtained by subtracting parasitic capacitance of the first output transistor OTRfrom the second capacitance calculated from the target impedance Zand the operating frequency ‘f’.

100 2 2 Moreover, the coupler circuitC may include the second output transistor OTRconnected to the second output terminal OT.

2 2 2 The second output transistor OTRmay include a second output resistor Rc and a second output capacitor Cc connected in parallel between the second output terminal OTand ground. Here, the second output capacitor Cc may be understood as a parasitic capacitor of the second output transistor OTR.

4 2 2 2 4 100 2 1 In this case, the fourth capacitor CDmay have capacitance obtained by subtracting the capacitance of the second output capacitor Cc from capacitance of the second capacitor CDcalculated based on Equation 8 described above. That is, when the second output terminal OTis connected to the second output transistor OTR, the fourth capacitor CDof the coupler circuitC may have a capacitance obtained by subtracting parasitic capacitance of the second output transistor OTRfrom the capacitance calculated from the target impedance Zand the operating frequency ‘f’.

1 2 However, according to another embodiment, at least some of the above-described transformers ITR, OTR, and OTRmay be omitted.

1 1 2 1 1 2 100 Referring to the above-described configurations, when a transistor is connected to at least some of the input terminal ITor the output terminals OTand OT, the capacitance of a capacitor (e.g., the first capacitor CD) connected to the transformers TFand TFin the coupler circuitC may be reduced by the parasitic capacitance of the connected transistor.

100 In this way, the coupler circuitC according to an embodiment of the present disclosure may be implemented to have a relatively small area.

8 FIG. is a block diagram illustrating an electronic device, according to an embodiment.

8 FIG. 800 910 200 300 110 130 Referring to, a wireless communication deviceaccording to an embodiment of the present disclosure may include a communication processor, an RFIC, a power modulator, the RFFE, a power amplifier PA, the antenna.

800 10 8 FIG. 1 FIG. Here, the wireless communication deviceillustrated inmay be understood as an example of the wireless communication deviceillustrated in. Accordingly, the same reference numerals are used for components the same or substantially the same as the above-described components, and descriptions the same as the above-described descriptions are omitted to avoid redundancy.

910 810 910 820 The communication processormay process a baseband signal BB_T through a digital transmission processorin compliance with a given communication scheme. Furthermore, the communication processormay process a received baseband signal BB_R through a digital reception processorin compliance with the given communication scheme.

910 910 For example, the communication processormay process a signal to be transmitted or a received signal in compliance with a communication scheme such as orthogonal frequency division multiplexing (OFDM), orthogonal frequency division multiplexing access (OFDMA), wideband code multiple access (WCDMA), or high speed packet access+ (HSPA+). Besides, the communication processormay process the baseband signal BB_T or BB_R in compliance with various kinds of communication schemes (i.e., various communication schemes to which a technology for modulating or demodulating the amplitude and frequency of the baseband signal BB_T or BB_R is applied).

910 810 910 The communication processormay extract envelop of the baseband signal BB_T through the digital transmission processorand may generate a digital envelop signal D_ENV based on the extracted envelop. Moreover, the communication processormay generate an average power signal D_REF based on an average power tracking table stored in a memory. Here, the extracted envelop may correspond to an amplitude component (i.e., a magnitude of each of I signal and Q signal) of the baseband signal BB_T.

910 1 2 910 300 830 300 1 2 910 300 Here, the communication processormay perform digital-to-analog conversion on the baseband signal BB_T and the digital envelop signal D_ENV by using a plurality of digital-to-analog converters DACand DACincluded therein and may generate a transmit signal TX and an analog envelop signal A_ENV being analog signals. That is, the average power signal D_REF output from the communication processormay be a digital signal. As such, the average power signal D_REF may be provided to a digital-to-analog converter included in the power modulatorthrough a MIPIand may be converted into an analog signal, for example, the reference voltage signal through the digital-to-analog converter included in the power modulator. In an embodiment, the digital-to-analog converters DACand DACincluded in the communication processormay operate at a speed higher than the digital-to-analog converter included in the power modulator.

910 910 300 However, the present disclosure is not limited thereto. For example, the communication processormay convert the average power signal D_REF into an analog signal through a digital-to-analog converter included therein. In this case, the communication processormay provide average power signal converted into the analog signal to the power modulator.

910 300 830 However, for convenience of description, in the embodiment of the present disclosure, the description will be given as the communication processorprovides the average power signal D_REF to the digital-to-analog converter included in the power modulatorthrough the MIPI.

In an embodiment, each of the transmit signal TX and the analog envelop signal A_ENV may be implemented with differential signals including a positive signal and a negative signal.

910 200 910 Also, the communication processormay be provided with a receive signal RX being an analog signal from the RFIC. Moreover, the communication processormay perform analog-to-digital conversion on the receive signal RX through the analog-to-digital converter ADC included therein and may extract the baseband signal BB_R being a digital signal. Here, the receive signal RX may be implemented with differential signals including a positive signal and a negative signal.

200 200 The RFICmay generate an RF input signal RF_IN by performing frequency up-conversion on the transmit signal TX or may generate the receive signal RX by performing frequency down-conversion on an RF receive signal RF_R. In detail, the RFICmay include a transmission circuit TXC for frequency up-conversion, a reception circuit RXC for frequency down-conversion, and a local oscillator LO.

200 120 8 FIG. 1 FIG. Here, the RFICillustrated inmay be understood as having substantially the same configuration as the RFICillustrated in.

1 1 210 1 Here, the transmission circuit TXC may include a first analog baseband filter ABF, a first mixer MX, and an amplifier. For example, the first analog baseband filter ABFmay include a low pass filter.

1 910 1 1 210 210 The first analog baseband filter ABFmay filter the transmit signal TX received from the communication processorso as to be provided to the first mixer MX. Furthermore, the first mixer MXmay perform frequency up-conversion for converting a frequency of the transmit signal TX from a baseband to a high-frequency band through a frequency signal provided by the local oscillator LO. The transmit signal TX may be provided to the amplifieras the RF input signal RF_IN, and the amplifiermay first amplify a power of the RF input signal RF_IN so as to be provided to the power amplifier PA.

300 110 The power amplifier PA may be supplied with a power supply voltage (i.e., a dynamically variable output voltage) from the power modulator, may second amplify a power of the RF input signal RF_IN based on the supplied power supply voltage, and may generate an RF output signal RF_OUT. The power amplifier PA may provide the generated RF output signal RF_OUT thus generated to the RFFE.

2 2 220 2 The reception circuit RXC may include a second analog baseband filter ABF, a second mixer MX, and a low-noise amplifier. For example, the second analog baseband filter ABFmay include a low pass filter.

220 110 2 2 2 2 910 The low-noise amplifiermay amplify the RF receive signal RF_R provided from the RFFEso as to be provided to the second mixer MX. Moreover, the second mixer MXmay perform frequency down-conversion for converting a frequency of the RF receive signal RF_R from a high-frequency band to a baseband through a frequency signal provided by the local oscillator LO. The RF receive signal RF_R may be provided to the second analog baseband filter ABFas the receive signal RX through the above frequency down-conversion, and the second analog baseband filter ABFmay filter the receive signal RX so as to be provided to the communication processor.

800 800 In an embodiment, the wireless communication devicemay transmit a transmit signal through a plurality of frequency bands by using carrier aggregation (CA). Also, to this end, the wireless communication devicemay include a plurality of power amplifiers for amplifying powers of a plurality of RF input signals RF_IN respectively corresponding to a plurality of carriers. However, in the embodiment of the present disclosure, for convenience of description, the description will be given as the number of power amplifiers PA is “1”.

200 100 Also, the RFICaccording to an embodiment may further include the coupler circuit.

200 100 100 100 1 FIG.B In more detail, the RFICmay further include the coupler circuitfor outputting a plurality of complex signals having different phases from an input signal. Here, the coupler circuitmay be understood as having substantially the same configuration as the coupler circuitillustrated in.

100 1 1 2 1 1 0 2 FIG. 2 FIG. For example, the coupler circuitmay be configured to output an I signal and a Q signal (e.g., the first output signal O(Z) and the second output signal O(Z) of), which are orthogonal to each other, from a single-phase input signal (e.g., the first input signal I(Z) of).

100 1 1 4 1 1 0 2 0 6 FIG. 6 FIG. For another example, the coupler circuitmay be configured to output quadrature-phase signals (e.g., the first to fourth output signals O(Z) to O(Z) of) whose phases are sequentially shifted by 90 degrees, from differential input signals (e.g., the first input signal I(Z) and the second input signal I(Z) of) that are differentially related to each other.

100 1 0 1 1 2 1 1 2 FIG. 2 FIG. Moreover, the coupler circuitmay be configured to convert the impedance of an input signal (e.g., the first input signal I(Z) in) and then may be configured to output output signals (e.g., the first output signal O(Z) and the second output signal O(Z) in) having a predetermined impedance (e.g., the target impedance Z).

100 In other words, the coupler circuitmay be configured to perform an operation of generating complex signals from the input signal, and an impedance matching operation of allowing each of complex signals to have a target impedance.

800 100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the wireless communication device(or the coupler circuit) according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 800 That is, through the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

200 100 2 According to an embodiment, the RFICmay further include the coupler circuitconnected between the local oscillator LO and the second mixer MX.

100 1 1 2 1 2 2 FIG. Here, the coupler circuitmay be configured to split the signal received from the local oscillator LO into the I signal and the Q signal (e.g., the first output signal O(Z) and the second output signal O(Z) in) with different phases and may be configured to transmit I signal and Q signal to the second mixer MX.

200 100 1 210 For another example, the RFICmay further include the coupler circuitconnected between the first mixer MXand the amplifier.

100 1 1 1 2 1 210 2 FIG. Here, the coupler circuitmay be configured to split the signal received from the first mixer MXinto I signal and Q signal (e.g., the first output signal O(Z) and the second output signal O(Z) in) with different phases and may transmit I signal and Q signal to the amplifier.

300 The power modulatormay generate a modulated output voltage, the level of which varies dynamically, based on the analog envelop signal A_ENV and the average power signal D_REF and may provide the modulated output voltage to the power amplifier PA as a power supply voltage.

300 910 300 300 In detail, the power modulatormay be provided with the average power signal D_REF and the analog envelop signal A_ENV from the communication processor. The power modulatormay be driven in the tracking mode corresponding to one of the ET mode and the APT mode based on the average power signal D_REF and the analog envelop signal A_ENV thus provided and may generate the dynamically variable output voltage. Also, the power modulatormay supply the generated output voltage to the power amplifier PA as the power supply voltage.

In an embodiment, when the power supply voltage of a fixed level is applied to the power amplifier PA, power efficiency of the power amplifier PA may decrease. Accordingly, to efficiently manage a power of the power amplifier PA, the power amplifier PA may modulate an input voltage (i.e., a power provided from a battery) based on at least one of the analog envelop signal A_ENV and the average power signal D_REF and may provide the modulated voltage to the power amplifier PA as the power supply voltage.

110 130 110 130 220 200 The RFFEmay separate the RF output signal RF_OUT provided from the power amplifier PA for each frequency band so as to be provided to the corresponding antenna. Also, the RFFEmay provide an external signal provided from the antennato the low-noise amplifierincluded in the reception circuit RXC of the RFIC.

110 According to another embodiment, the RFFEmay include the power amplifier PA.

110 100 130 100 100 1 FIG.A According to another embodiment, the RFFEmay include the coupler circuitconnected to the antenna. Here, the coupler circuitmay be understood as having substantially the same configuration as the coupler circuitillustrated in.

100 200 110 That is, referring to the above-described configurations, the coupler circuitmay be included in the RFICor the RFFE.

130 200 130 The antennamay transmit the RF output signal RF_OUT to the outside or may provide the RF receive signal RF_R received from the outside to the RFIC. For example, the antennamay include, but is not limited to, an array antenna.

910 300 200 110 910 300 200 110 910 300 200 110 In an embodiment, each of the communication processor, the power modulator, the RFIC, the power amplifier PA, and the RFFEmay be implemented with an integrated circuit, a chip, or a module. Also, the communication processor, the power modulator, the RFIC, the power amplifier PA, and the RFFEmay be together mounted on a printed circuit board (PCB). However, the technical idea of the present disclosure is not limited thereto. In some embodiments, at least a part of the communication processor, the power modulator, the RFIC, the power amplifier PA, and the RFFEmay be implemented with a single communication chip.

800 800 8 FIG. 8 FIG. In addition, the wireless communication deviceillustrated inmay be included in a wireless communication system that uses a cellular network such as 5G, LTE and may also be included in a wireless local area network (WLAN) system or any other wireless communication system. In an embodiment, a configuration of the wireless communication deviceillustrated inis, but is not limited to, an exemplary embodiment, and may be variously configured in compliance with a communication protocol or a communication scheme.

9 FIG. is a block diagram illustrating an IoT device including an electronic device, according to an embodiment.

9 FIG. 900 900 Referring to, an Internet of Things (IoT) may refer to a network between things that use wired and/or wireless communication. An IoT devicemay include an accessible wired or/and wireless interface and may include devices that communicate with at least one or more other devices through the wired or/and wireless interface to transmit or receive data. The accessible interface that the IoT deviceincludes may include a modem communication interface that is accessible to a local area network (LAN), a wireless local area network (WLAN) such as a wireless fidelity (Wi-Fi), a wireless personal area network (WPAN) such as Bluetooth, a wireless universal serial bus (USB), a Zigbee, a near field communication (NFC), a radio-frequency identification (RFID), a power line communication (PLC), or mobile cellular networks such as 3rd generation (3G), long term evolution (LTE), 4th generation (4G), or 5th generation (5G). The Bluetooth interface may support Bluetooth low energy (BLE).

900 1020 1020 In detail, the IoT devicemay include a communication interfacefor communicating with the outside. The communication interfacemay be, for example, a modem communication interface that is accessible to a wireless local area network such as an LAN, Bluetooth, Wi-Fi, or Zeebee, PLC, a mobile communication network, such as 3G, LTE, 4G, or 5G, etc.

1020 1020 10 1020 100 130 9 FIG. 1 FIG. The communication interfacemay include a transceiver and/or a receiver. Here, the communication interfaceillustrated inmay be understood to include at least some of the wireless communication deviceillustrated in. For example, the communication interfacemay include the coupler circuitconnected to the antenna.

100 According to an embodiment, the coupler circuitmay be configured to output a plurality of complex signals having different phases from an input signal.

100 1 1 2 1 1 0 2 FIG. 2 FIG. For example, the coupler circuitmay be configured to output an I signal and a Q signal (e.g., the first output signal O(Z) and the second output signal O(Z) of), which are orthogonal to each other, from a single-phase input signal (e.g., the first input signal I(Z) of).

100 1 1 4 1 1 0 2 0 6 FIG. 6 FIG. For another example, the coupler circuitmay be configured to output quadrature-phase signals (e.g., the first to fourth output signals O(Z) to O(Z) of) whose phases are sequentially shifted by 90 degrees, from differential input signals (e.g., the first input signal I(Z) and the second input signal I(Z) of) that are differentially related to each other.

100 1 0 1 1 2 1 1 2 FIG. 2 FIG. Moreover, the coupler circuitmay be configured to convert the impedance of an input signal (e.g., the first input signal I(Z) in) and then may be configured to output output signals (e.g., the first output signal O(Z) and the second output signal O(Z) in) having a predetermined impedance (e.g., the target impedance Z).

100 In other words, the coupler circuitmay be configured to perform an operation of generating complex signals from the input signal, and an impedance matching operation of allowing each of complex signals to have a target impedance.

900 100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the IoT device(or the coupler circuit) according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 900 That is, through the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may reduce the area required to implement the IoT device.

900 900 900 The IoT devicemay transmit and/or receive information from an access point or a gateway through the transceiver and/or the receiver. Also, the IoT devicemay communicate with a user apparatus or any other IoT device to transmit and/or receive control information or data of the IoT device.

900 1010 The IoT devicemay include a processorthat performs arithmetic operations.

900 900 1040 900 1040 900 900 For internal power supply, the IoT devicemay further include an embedded battery or a power supply unit that is supplied with a power from the outside. Also, the IoT devicemay include a displayfor displaying an internal state or data. The user may control the IoT devicethrough a user interface (UI) of the displayin the IoT device. The IoT devicemay transmit an internal state and/or data to the outside through the transceiver and may receive a control instruction and/or data to the outside through the receiver.

1030 900 1030 A memorymay store a control instruction code controlling the IoT device, control data, or user data. The memorymay include at least one of a volatile memory or a nonvolatile memory. The nonvolatile memory includes at least one of various memories such as a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory, a phase-change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (ReRAM), and a ferroelectric RAM (FRAM). The volatile memory may include at least one of various memories such as a static RAM (SRAM), a dynamic RAM (DRAM), and a synchronous DRAM (SDRAM).

900 1050 1060 The IoT devicemay further include a storage device. The storage device may include at least one of nonvolatile media such as a solid state drive (SSD), an embedded multimedia card (eMMC), and universal flash storage (UFS). The storage device may store user information provided through an input/output unit (I/O)and pieces of sensing information collected through a sensor.

10 FIG. is a block diagram showing a mobile terminal, to which an electronic device is applied, according to an embodiment.

10 FIG. 1000 1201 1300 1400 1510 1000 Referring to, a mobile terminalmay include a processor, a memory, a display, and a radio frequency (RF) module. In addition, the mobile terminalmay further include various components such as a lens and an audio module.

1201 1210 1220 1230 1240 1250 1260 1270 1201 1201 The processormay be implemented with a system on chip (SoC) and may include a central processing unit (CPU), a RAM, a power management unit (PMU), a memory interface (I/F), a display controller (DCON), a MODEM, and a bus. Besides, the processormay further include various intellectual properties (IPs). The processormay be integrated with a function of a MODEM chip therein, which is referred to as a “ModAP”, but is not limited thereto.

1210 1201 1000 1210 1201 1210 The CPUmay control overall operations of the processorand the mobile terminal. The CPUmay control an operation of each component of the processor. Also, the CPUmay be implemented with a multi-core. The multi-core may be one computing component having two or more independent cores.

1220 1300 1220 1210 1220 The RAMmay temporarily store programs, data, or instructions. For example, the programs and/or data stored in the memorymay be temporarily stored in the RAMunder control of the CPUor depending on a booting code. The RAMmay be implemented with a DRAM or an SRAM.

1230 1201 1230 1201 The PMUmay manage power of each component of the processor. The PMUmay also determine an operating situation of each component of the processorand may control an operation thereof.

1240 1300 1300 1201 1210 1240 1300 1300 The memory interfacemay control overall operations of the memoryand may control data exchange of the memorywith each component of the processor. Depending on a request of the CPU, the memory interfacemay write data in the memoryor may read data from the memory.

1250 1400 1400 1400 The display controllermay provide the displaywith image data to be displayed on the display. The displaymay be implemented with a flat panel display, such as a liquid crystal display (LCD) or an organic light emitting diode (OLED) display, or a flexible display.

1260 1260 1510 For wireless communication, the MODEMmay modulate data to be transmitted so as to be appropriate for a wireless environment and may recover received data. The MODEMmay perform digital communication with the RF module.

1510 130 1260 1510 1260 1000 1510 The RF modulemay convert a high-frequency signal received through the antennainto a low-frequency signal and may transmit the converted low-frequency signal to the MODEM. Also, the RF modulemay convert a low-frequency signal received from the MODEMinto a high-frequency signal and may transmit the converted high-frequency signal to the outside of the mobile terminalthrough the antenna. The RF modulemay amplify or filter a signal.

1510 10 1510 100 1 FIG. 1 2 FIGS.and Here, the RF modulemay include at least part of the wireless communication deviceillustrated in. For example, the RF modulemay include the coupler circuitillustrated in.

100 According to an embodiment, the coupler circuitmay be configured to output a plurality of complex signals having different phases from an input signal.

100 1 1 2 1 1 0 2 FIG. 2 FIG. For example, the coupler circuitmay be configured to output I signal and Q signal (e.g., the first output signal O(Z) and the second output signal O(Z) of), which are orthogonal to each other, from a single-phase input signal (e.g., the first input signal I(Z) of).

100 1 1 4 1 1 0 2 0 100 1 0 1 1 2 1 1 6 FIG. 6 FIG. 2 FIG. 2 FIG. For another example, the coupler circuitmay be configured to output quadrature-phase signals (e.g., the first to fourth output signals O(Z) to O(Z) of) whose phases are sequentially shifted by 90 degrees, from differential input signals (e.g., the first input signal I(Z) and the second input signal I(Z) of) that are differentially related to each other. Moreover, the coupler circuitmay be configured to convert the impedance of an input signal (e.g., the first input signal I(Z) in) and then may be configured to output output signals (e.g., the first output signal O(Z) and the second output signal O(Z) in) having a predetermined impedance (e.g., the target impedance Z).

100 In other words, the coupler circuitmay be configured to perform an operation of generating complex signals from the input signal, and an impedance matching operation of allowing each of complex signals to have a target impedance.

1000 100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the mobile terminal(or the coupler circuit) according to an embodiment of the present disclosure may be implemented in a relatively small area.

100 1000 That is, through the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may reduce the area required to implement the mobile terminal.

100 1 2 1 2 3 4 1 2 Referring to the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may include the transformers TFand TFimplemented by combining at least some of inductors included in equivalent circuits of the plurality of transmission lines TL, TL, TL, and TLwith the ideal transformers ITFand ITF.

100 1 1 2 1 1 0 1 2 100 1 2 1 1 2 1 1 The coupler circuitmay be configured to output the output signals O(Z) and O(Z) having different phases from the first input signal I(Z) by using the transformers TFand TFand a plurality of elements. Moreover, the coupler circuitmay be configured to perform impedance matching by using the transformers TFand TFand the plurality of elements such that each of the output signals O(Z) and O(Z) has the target impedance Z.

100 1 1 2 1 1 0 1 1 2 1 1 That is, the coupler circuitmay be configured to perform an operation of generating the output signals O(Z) and O(Z) having different phases from the first input signal I(Z), and an impedance matching operation of allowing each of the output signals O(Z) and O(Z) to have the target impedance Z.

100 Accordingly, compared to a case where a configuration for generating complex signals and a configuration for performing impedance matching are separately provided, the coupler circuitaccording to an embodiment of the present disclosure may be implemented in a relatively small area.

100 10 That is, through the above-described configurations, the coupler circuitaccording to an embodiment of the present disclosure may reduce the area required to implement the wireless communication device.

Embodiments in which a design is changed simply or which are easily changed may be included in the present disclosure as well as an embodiment described above. In addition, technologies that are easily changed and implemented by using the above embodiments may be included in the present disclosure. Accordingly, it will be apparent to those of ordinary skill in the art that various changes and modifications may be made to the above embodiments without departing from the spirit and scope of the present disclosure as set forth in the following claims.

A coupler circuit according to an embodiment of the present disclosure may reduce the area of a circuit required to implement a wireless communication device.

While the present disclosure has been described with reference to embodiments thereof, it will be apparent to those of ordinary skill in the art that various changes and modifications may be made thereto without departing from the spirit and scope of the present disclosure as set forth in the following claims.