Semiconductor Module

This application is a continuation of International Application No. PCT/JP2024/021321, filed Jun. 12, 2024, which claims priority to Japanese Patent Application No. 2023-108696, filed Jun. 30, 2023, the entire contents of each of which are hereby incorporated by reference.

The present disclosure generally relates to a semiconductor module, and more specifically relates to a semiconductor module including a semiconductor device and a capacitor.

Patent Document 1 discloses a power amplifier (semiconductor module) including an amplifier (semiconductor device), an inductor, and a bypass capacitor (capacitor).

In the power amplifier disclosed in Patent Document 1, the inductor is connected between the amplifier and a bias power supply (direct-current power supply). The bypass capacitor is connected between the ground and a contact between the inductor and the bias power supply.

Patent Document 1: International Publication No. 2011/092910

The present disclosure is directed to providing a semiconductor module capable of reducing high-frequency noises.

A semiconductor module according to an aspect of the present disclosure includes a semiconductor device, a power supply path, a first inductor, a capacitor, and a second inductor. The semiconductor device includes a power terminal. The power supply path is connected to the power terminal in the semiconductor device. The first inductor is disposed in the power supply path. The capacitor has a first end and a second end. In the capacitor, the first end is connected to the power supply path, and the second end is connected to a ground. The second inductor is disposed in the power supply path, and connected between the first inductor and the power terminal. The first inductor and the second inductor are disposed to couple a magnetic field generated at the first inductor and a magnetic field generated at the second inductor.

Hereafter, for example, first and second embodiments are described with reference to the drawings. The drawings referred to in the description of, for example, the first and second embodiments below are schematic. The size and the thickness of components in the drawings do not necessarily reflect the actual dimensions, and the ratios in size and thickness between the components do not necessarily reflect the ratios of the actual dimensions.

The inventor recognized that, in the power amplifier disclosed in Patent Document 1, the performance of the bypass capacitor may deteriorate due to an equivalent series inductance (ESL) of the bypass capacitor, and high-frequency noise may leak to the amplifier.

The semiconductor module as described in detail below with respect to various embodiments is capable of reducing high-frequency noises. As used herein, the terms “high-frequency” and “high-frequency noise” generally refer to frequencies exceeding the audio range, including but not limited to Radio Frequencies (RF) and microwave frequencies (e.g., from several MHz to several tens of GHz) typically utilized in wireless communication standards.

100 A semiconductor moduleaccording to a first embodiment is described with reference to the drawings.

1 FIG. 100 7 7 1 As illustrated in, the semiconductor moduleaccording to the first embodiment is connected to a direct-current power supply, and the power supply voltage of the direct-current power supplyis provided to the power terminal of a semiconductor device.

100 The semiconductor moduleis used as, for example, a communication device. An example of the communication device is a mobile phone (for example, a smartphone), but may be, for example, a wearable terminal (for example, a smartwatch) instead of a mobile phone.

100 Hereafter, the circuit configuration of the semiconductor moduleaccording to the first embodiment is described with reference to the drawings.

1 FIG. 100 1 2 1 3 1 1 2 1 14 3 14 1 1 3 3 1 1 3 5 2 3 3 1 14 As illustrated in, the semiconductor moduleincludes a first terminal T, a second terminal T, a ground terminal, a semiconductor device, a power supply path, a first inductor L, a capacitor C, and a second inductor L. The semiconductor deviceincludes a power terminal. The power supply pathis connected to the power terminalin the semiconductor deviceand may include conductive traces, via conductors, and/or conductive planes disposed within or on the module substrate. The first inductor Lis disposed in the power supply pathand is electrically connected in series with the power supply path. The capacitor Chas a first end and a second end. In the capacitor C, the first end is connected to the power supply path, and the second end is connected to the ground terminal (e.g., a ground reference provided by a ground layer of the module substrate). The second inductor Lis disposed in the power supply pathand is electrically connected in series with the power supply path, and connected between the first inductor Land the power terminal.

1 1 1 1 11 12 13 1 11 12 13 11 1 13 1 12 1 7 14 2 2 1 1 7 1 12 13 1 1 11 12 1 4 FIG. The semiconductor deviceis, for example, a power amplifier that power-amplifies a radio signal, and includes a transistor Qthat power-amplifies a radio signal, as illustrated in. The transistor Qis a npn bipolar transistor. The transistor Qincludes an input terminal, an output terminal, and a grounding terminal. In the transistor Q, the input terminal, the output terminal, and the grounding terminalrespectively function as a base terminal, a collector terminal, and an emitter terminal. The input terminalin the transistor Qis a terminal into which a radio signal is input. The grounding terminalin the transistor Qis a terminal connected to the ground terminal. The output terminalin the transistor Qis connected to the direct-current power supplythrough the power terminal, the second terminal T, the second inductor L, the first inductor L, and the first terminal T. A power supply voltage is applied from the direct-current power supplyto the transistor Q(across the output terminaland the grounding terminalin the transistor Q). The transistor Qamplifies a radio signal input into the input terminal, and outputs the radio signal from the output terminal. A bipolar transistor that forms the transistor Qis, for example, a heterojunction bipolar transistor (HBT).

11 1 12 1 The input terminalin the transistor Qis connected to a signal processing circuit of the communication device through a signal input terminal. The output terminalof the transistor Qis connected to an antenna of the communication device through an antenna terminal. The power amplifier amplifies a radio signal of a predetermined band output from the signal processing circuit and outputs the radio signal.

1 2 1 1 1 2 2 2 2 14 1 1 2 7 14 1 Each of the first inductor Land the second inductor Lhas a first end and a second end. The first end of the first inductor Lis connected to the first terminal T. The second end of the first inductor Lis connected to the first end of the second inductor L. The second end of the second inductor Lis connected to the second terminal T. The second terminal Tis connected to the power terminalin the semiconductor device. The first inductor Land the second inductor Lfunction as choke coils that reduce high-frequency noises directing from the direct-current power supplytoward the power terminalin the semiconductor device.

1 1 2 1 1 7 The capacitor Cis connected to the second end of the first inductor Land the first end of the second inductor L. The capacitor Cfunctions as, for example, a bypass capacitor that reduces leakage of high-frequency noise generated at the semiconductor deviceto the direct-current power supply.

2 FIG.B 100 5 5 50 As illustrated in, the semiconductor moduleincludes a module substrate. The module substratehas a main surface.

1 5 5 5 2 FIG.B When viewed in plan in a thickness direction D(refer to) of the module substrate, an outer edge of the module substrateis, for example, rectangular, but may have a shape other than a rectangular shape. The module substrateis, for example, a multilayer substrate including multiple dielectric layers and multiple electroconductive layers. The electroconductive layers are formed from, for example, copper. The multiple electroconductive layers include a ground layer.

5 5 The module substrateis, for example, a low temperature co-fired ceramic (LTCC) substrate. Instead of an LTCC substrate, the module substratemay be formed from, for example, a printed circuit board, a high temperature co-fired ceramic (HTCC) board, a resin multilayer substrate, or a component-embedded board.

1 1 5 5 1 50 5 1 5 1 5 1 5 The semiconductor deviceis a semiconductor chip. The semiconductor chip is a GaAs chip, but may be an Si chip instead of a GaAs chip. The semiconductor devicemay be disposed in the module substrateor mounted on a surface of module substrate. More specifically, the semiconductor devicemay be disposed in the main surfaceof the module substrate. The expression that “the semiconductor deviceis disposed in the module substrate” includes a case where the semiconductor deviceis mechanically connected to the module substrateand a case where the semiconductor deviceis electrically connected to the module substrate.

1 1 5 1 50 5 1 5 1 5 1 5 The capacitor Cis a chip capacitor. The capacitor Cis disposed in the module substrate. More specifically, the capacitor Cis disposed in the main surfaceof the module substrate. The expression that “the capacitor Cis disposed in the module substrate” indicates that the capacitor Cis mechanically connected to the module substrate, and that the capacitor Cis electrically connected to the module substrate.

2 FIG.A 2 FIG.B 1 2 5 As illustrated inand, the first inductor Land the second inductor Lare inner-layer inductors disposed in the module substrate.

1 1 5 2 1 5 The first inductor Lincludes a wire portion wound in a spiral form when viewed in plan in the thickness direction Dof the module substrate. The second inductor Lincludes a wire portion wound in a spiral form when viewed in plan in the thickness direction Dof the module substrate.

2 FIG.A 2 FIG.B 100 1 2 1 2 1 2 As illustrated inand, in the semiconductor module, the first inductor Land the second inductor Lare disposed to couple a magnetic field generated at the first inductor Land a magnetic field generated at the second inductor L, i.e., the inductors are magnetically coupled. The first inductor Land the second inductor Lare disposed to be coupled to each other.

100 1 2 1 2 1 5 100 1 2 1 5 1 2 1 2 1 2 5 100 1 2 1 2 1 2 1 2 3 FIG.A 3 FIG.B In the semiconductor module, the winding direction of the first inductor Land the winding direction of the second inductor Lare opposite to each other, and a part of the first inductor Land a part of the second inductor Loverlap in the thickness direction Dof the module substrate. In the semiconductor module, the first inductor Land the second inductor Lare adjacent to each other in the thickness direction Dof the module substrate. The expression that the first inductor Land the second inductor Lare adjacent to each other indicates that the first inductor Land the second inductor Lare disposed without having any other circuit element disposed therebetween. The second end of the first inductor Land the first end of the second inductor Lare connected in the module substratethrough a via conductor. In the semiconductor module, the first inductor Land the second inductor Lare negatively coupled, and a negative mutual inductance is indicated as “−M” in.is an equivalent circuit expressing negative coupling between the first inductor Land the second inductor L, and a negative inductance “−M” with respect to the ground is generated at the path between the first inductor Land the second inductor L. The first inductor Land second inductor Lare arranged such that a current flowing through the power supply path creates magnetic fluxes in the inductors that oppose each other (destructive interference), thereby generating a negative mutual inductance.

3 FIG.B 3 FIG.B 1 2 1 1 The equivalent circuit inillustrates, in addition to the first inductor L, the second inductor L, and the capacitor C, a negative mutual inductance as a circuit element (inductor). The equivalent circuit inalso illustrates an equivalent series resistance (ESR) and an equivalent series inductance (ESL) in the capacitor C.

100 1 1 In the semiconductor module, a negative inductance cancels out the ESL in the capacitor C, and thus allows the capacitor Cto behave as an approximately ideal capacitor.

100 1 2 3 1 3 1 2 1 2 100 100 7 14 1 The semiconductor moduleaccording to the first embodiment includes the first inductor Land the second inductor Ldisposed in the power supply path, and the capacitor Cconnected between the power supply pathand the ground, and the first inductor Land the second inductor Lare disposed to couple a magnetic field generated at the first inductor Land a magnetic field generated at the second inductor L. The semiconductor moduleaccording to the first embodiment can thus reduce high-frequency noises. The semiconductor moduleaccording to the first embodiment can thus reduce high-frequency noises that leak from the direct-current power supplytoward the power terminalin the semiconductor device.

5 5 FIGS.A andB 100 100 1 0 100 As illustrated in, a semiconductor moduleaccording to a first modification example of the first embodiment differs from the semiconductor moduleaccording to the first embodiment in that a first inductor Lis formed from a chip inductor L. Components the same as those in the semiconductor moduleaccording to the first embodiment are denoted by the same reference signs without being described.

1 5 0 When viewed in plan in the thickness direction Dof the module substrate, the outer edge of the chip inductor Lis rectangular.

0 9 8 9 9 8 9 9 9 8 9 0 50 5 1 9 1 5 5 FIG.B The chip inductor Lincludes a wound portion, a rectangular parallelepiped elementthat covers the wound portion, and a pair of outer electrodes. The wound portionis disposed in the element. The wound portionis connected between the pair of outer electrodes. The wound portionis a coil conductor and has electroconductivity. The wound portionhas, for example, a spiral shape. The elementis formed from a material containing any of ceramics. The pair of outer electrodes are formed from a material such as Cu or Ag. The wound portionis formed from a material containing, for example, the same material as the pair of outer electrodes, but the material is not limited to this. The chip inductor Lis a longitudinally wound inductor, and is disposed in the main surfaceof the module substratewhile allowing a winding axis A(refer to) of the wound portionto be parallel to the thickness direction Dof the module substrate.

100 1 0 2 5 1 9 0 1 5 In the semiconductor moduleaccording to the first modification example, the first inductor Lis the chip inductor L, and the second inductor Lis a spiral-shaped inner-layer inductor disposed in the module substrate. The winding axis Aof the wound portionin the chip inductor Lis parallel to the thickness direction Dof the module substrate.

100 1 2 1 5 1 2 1 2 1 2 5 FIG.A 5 FIG.B In the semiconductor moduleaccording to the first modification example, the first inductor Land the second inductor Loverlap when viewed in plan in the thickness direction Dof the module substrate. In the example illustrated inand, a part of the first inductor Land a part of the second inductor Loverlap. Alternatively, the entirety of the first inductor Lmay overlap the entirety of the second inductor L, or a part of the first inductor Lmay overlap the entirety of the second inductor L.

100 1 5 2 5 In a semiconductor moduleaccording to a second modification example, the first inductor Lis a spiral-shaped inner-layer inductor disposed in the module substrate, and the second inductor Lis a chip inductor disposed in the module substrate.

100 100 The semiconductor moduleaccording to each of the first and second modification examples of the first embodiment has the same effects as the semiconductor moduleaccording to the first embodiment.

100 100 100 1 6 FIG. 9 FIG. 4 FIG. A semiconductor moduleA according to a second embodiment is described with reference toto. Components in the semiconductor moduleA according to the second embodiment the same as those in the semiconductor moduleaccording to the first embodiment (refer to FIG.to) are denoted by the same reference signs without being described.

100 Hereafter, a circuit configuration of the semiconductor moduleA according to the second embodiment is described with reference to the drawings.

6 FIG. 9 FIG. 9 FIG. 9 FIG. 100 100 1 2 1 1 3 3 1 1 1 2 100 3 2 4 3 1 2 2 2 24 4 1 2 3 24 2 3 4 3 24 2 3 As illustrated in, as in the case of the semiconductor moduleaccording to the first embodiment, the semiconductor moduleA includes a first terminal T, a second terminal T, a ground terminal, a semiconductor device(hereafter also referred to as a first semiconductor device), a power supply path(hereafter also referred to as a first power supply path), a first inductor L, a capacitor C(first capacitor C), and a second inductor L. The semiconductor moduleA further includes a third terminal T, a second semiconductor device, a second power supply path, a third inductor L, a first matching circuit MN(refer to), a second matching circuit MN(refer to), and a second capacitor C(refer to). The second semiconductor deviceincludes a power terminal. The second power supply pathis connected between a contact (also referred to herein as a connection node) between the first inductor Land the second inductor Lat the first power supply pathand the power terminalin the second semiconductor device. The third inductor Lis disposed in the second power supply path. The third inductor Lis connected to the power terminalin the second semiconductor devicethrough the third terminal T.

9 FIG. 1 1 1 2 2 1 2 1 11 11 12 12 13 13 1 11 12 13 2 21 21 22 22 23 23 2 21 22 23 22 2 7 24 3 3 1 1 7 2 22 23 2 1 2 As illustrated in, the first semiconductor deviceincludes, for example, a transistor Q(hereafter also referred to as a first transistor Q) that power-amplifies a radio signal. The second semiconductor deviceincludes, for example, a second transistor Qthat power-amplifies a radio signal. Each of the first transistor Qand the second transistor Qis a npn bipolar transistor. The first transistor Qincludes an input terminal(hereafter also referred to as a first input terminal), an output terminal(hereafter also referred to as a first output terminal), and a grounding terminal(hereafter also referred to as a first grounding terminal). In the first transistor Q, the first input terminal, the first output terminal, and the first grounding terminalrespectively function as a base terminal, a collector terminal, and an emitter terminal. The second transistor Qincludes an input terminal(hereafter also referred to as a second input terminal), an output terminal(hereafter also referred to as a second output terminal), and a grounding terminal(hereafter also referred to as a second grounding terminal). In the second transistor Q, the second input terminal, the second output terminal, and the second grounding terminalrespectively function as a base terminal, a collector terminal, and an emitter terminal. The second output terminalin the second semiconductor deviceis connected to the direct-current power supplythrough the power terminal, the third terminal T, the third inductor L, the first inductor L, and the first terminal T. A power supply voltage is applied from the direct-current power supplyto the second transistor Q(across the second output terminaland the second grounding terminalin the second transistor Q). Bipolar transistors that form the first transistor Qand the second transistor Qare, for example, HBTs.

1 11 1 1 2 12 1 1 21 2 2 The first matching circuit MNis connected to the first input terminalin the first transistor Qin the first semiconductor device. The second matching circuit MNis connected between the first output terminalin the first transistor Qin the first semiconductor deviceand the second input terminalin the second transistor Qin the second semiconductor device.

11 1 1 22 2 The first input terminalin the first transistor Qis connected to the signal processing circuit of the communication device through the first matching circuit MNand the signal input terminal. The second output terminalin the second transistor Qis connected to the antenna of the communication device through a filter or an antenna terminal.

3 3 1 2 3 3 3 24 2 1 2 7 14 1 1 3 7 24 2 The third inductor Lhas a first end and a second end. The first end of the third inductor Lis connected to the second end of the first inductor Land the first end of the second inductor L. The second end of the third inductor Lis connected to the third terminal T. The third terminal Tis connected to the power terminalin the second semiconductor device. The first inductor Land the second inductor Lfunction as choke coils that reduce high-frequency noises directing from the direct-current power supplytoward the power terminalin the first semiconductor device. The first inductor Land the third inductor Lfunction as choke coils that reduce high-frequency noises directing from the direct-current power supplytoward the power terminalin the second semiconductor device.

7 FIG.B 100 5 5 50 As illustrated in, the semiconductor moduleA includes a module substrate. The module substratehas a main surface.

1 2 5 1 2 50 5 1 2 50 5 The first semiconductor deviceand the second semiconductor deviceare disposed in the module substrate. More specifically, the first semiconductor deviceand the second semiconductor deviceare disposed in the main surfaceof the module substrate. More specifically, an integrated circuit (IC) chip including the first semiconductor deviceand the second semiconductor deviceis disposed in the main surfaceof the module substrate.

1 1 5 The capacitor Cis a chip capacitor. The capacitor Cis disposed in the module substrate.

7 FIG.A 7 FIG.B 1 2 3 5 As illustrated inand, the first inductor L, the second inductor L, and the third inductor Lare inner-layer inductors disposed in the module substrate.

1 5 1 1 5 2 1 5 3 When viewed in plan in the thickness direction Dof the module substrate, the first inductor Lis spiral-shaped. When viewed in plan in the thickness direction Dof the module substrate, the second inductor Lis spiral-shaped. When viewed in plan in the thickness direction Dof the module substrate, the third inductor Lis spiral-shaped.

100 1 2 1 2 2 3 2 3 100 1 In the semiconductor moduleA, the first inductor Land the second inductor Lare disposed to couple a magnetic field generated at the first inductor Land a magnetic field generated at the second inductor L, and the second inductor Land the third inductor Lare disposed to couple a magnetic field generated at the second inductor Land a magnetic field generated at the third inductor L. In the semiconductor moduleA, the first inductor Land the third inductor are disposed to be negatively coupled to generate a negative mutual inductance.

100 1 2 3 1 5 50 5 In the semiconductor moduleA, the first inductor L, the second inductor L, and the third inductor Lare arranged in this order in the thickness direction Dof the module substratefrom the main surfaceof the module substrate.

100 1 2 1 2 1 5 100 1 2 1 5 1 2 5 100 1 2 1 2 8 FIG. In the semiconductor moduleA, the winding direction of the first inductor Land the winding direction of the second inductor Lare the same, and a part of the first inductor Land a part of the second inductor Loverlap in the thickness direction Dof the module substrate. In the semiconductor moduleA, the first inductor Land the second inductor Lare adjacent to each other in the thickness direction Dof the module substrate. The second end of the first inductor Land the first end of the second inductor Lare connected in the module substratethrough a first via conductor. In the semiconductor moduleA, the first inductor Land the second inductor Lare positively coupled, and a positive mutual inductance with respect to the ground is generated at the path between the first inductor Land the second inductor L. In, the positive mutual inductance is indicated as “M”.

100 2 3 2 3 1 5 100 2 3 1 5 2 3 5 100 2 3 2 3 8 FIG. In the semiconductor moduleA, the winding direction of the second inductor Land the winding direction of the third inductor Lare opposite, and a part of the second inductor Land a part of the third inductor Loverlap in the thickness direction Dof the module substrate. In the semiconductor moduleA, the second inductor Land the third inductor Lare adjacent to each other in the thickness direction Dof the module substrate. The first end of the second inductor Land the first end of the third inductor Lare connected in the module substratethrough the second via conductor. In the semiconductor moduleA, the second inductor Land the third inductor Lare negatively coupled, and a negative mutual inductance with respect to the ground is generated at a path between the second inductor Land the third inductor L. In, the negative mutual inductance is indicated as “−M”.

100 1 3 1 5 In the semiconductor moduleA according to the second embodiment, the first inductor Land the third inductor Lare not adjacent to each other in the thickness direction Dof the module substrate.

100 4 24 2 1 2 3 3 4 100 4 2 The semiconductor moduleA according to the second embodiment includes a second power supply pathconnected between the power terminalin the second semiconductor deviceand a contact between the first inductor Land the second inductor Lat the first power supply path, and a third inductor Ldisposed in the second power supply path. The semiconductor moduleA can thus reduce high-frequency noises leaking from the second power supply pathto the second semiconductor device.

100 3 4 100 1 2 3 1 The semiconductor moduleA according to the second embodiment can ensure isolation between the first power supply pathand the second power supply path. More specifically, the semiconductor moduleA according to the second embodiment can ensure isolation between a path between the first terminal Tand the second terminal Tand a path between the third terminal Tand the first terminal T.

100 1 2 2 3 1 3 1 2 2 3 1 3 10 FIG. In a semiconductor moduleA according to a modification example of the second embodiment, as illustrated in, the first inductor Land the second inductor Lmay be negatively coupled, the second inductor Land the third inductor Lmay be negatively coupled, and the first inductor Land the third inductor Lmay be positively coupled. In this case, the winding direction of the first inductor Land the winding direction of the second inductor Lare opposite, the winding directions of the second inductor Land the third inductor Lare opposite, and the winding direction of the first inductor Land the winding direction of the third inductor Lare the same.

100 100 The semiconductor moduleA according to the modification example of the second embodiment has the same effects as the semiconductor moduleA according to the second embodiment.

The first and second embodiments and other embodiments are mere examples in various embodiments of the present invention.

The first and second embodiments and other embodiments may be modified in various manners in accordance with, for example, design changes, as long as they can achieve the objective of the present invention.

1 1 2 2 Each of the first transistor Qincluded in the first semiconductor deviceand the second transistor Qincluded in the second semiconductor devicemay be, for example, a field effect transistor (FET), including metal oxide semiconductor FET (MOSFET), instead of a bipolar transistor.

1 2 7 Each of the first semiconductor deviceand the second semiconductor devicemay be any semiconductor device that is operated by a power supply voltage supplied from the direct-current power supply, and may be, for example, a low noise amplifier or a switch instead of a power amplifier.

The aspects of the present application are described as below.

100 100 1 3 1 1 2 1 14 3 14 1 1 3 1 1 3 2 3 1 14 1 2 1 2 A semiconductor module (,A) according to a first aspect includes a semiconductor device (), a power supply path (), a first inductor (L), a capacitor (C), and a second inductor (L). The semiconductor device () includes a power terminal (). The power supply path () is connected to the power terminal () in the semiconductor device (). The first inductor (L) is disposed in the power supply path (). The capacitor (C) has a first end and a second end. In the capacitor (C), the first end is connected to the power supply path (), and the second end is connected to a ground. The second inductor (L) is disposed in the power supply path (), and connected between the first inductor (L) and the power terminal (). The first inductor (L) and the second inductor (L) are disposed to couple a magnetic field generated at the first inductor (L) and a magnetic field generated at the second inductor (L).

The semiconductor module according to this aspect can reduce high-frequency noises.

100 100 1 1 2 In a semiconductor module (,A) according to a second aspect based on the first aspect, the first end of the capacitor (C) is connected to a contact between the first inductor (L) and the second inductor (L).

100 2 4 3 2 1 1 2 24 4 24 2 1 2 3 3 3 4 A semiconductor module (A) according to a third aspect based on the first or second aspect further includes a second semiconductor device (), a second power supply path (), and a third inductor (L). The second semiconductor device () is different from a first semiconductor device () serving as the semiconductor device (). The second semiconductor device () includes a power terminal (). The second power supply path () is connected between the power terminal () of the second semiconductor device () and a contact between the first inductor (L) and the second inductor (L) at a first power supply path () serving as the power supply path (). The third inductor (L) is disposed in the second power supply path ().

4 2 The semiconductor module according to this aspect can reduce high-frequency noises leaking from the second power supply path () to the second semiconductor device ().

100 100 5 1 5 1 2 5 1 1 5 2 1 5 1 2 1 2 A semiconductor module (,A) according to a fourth aspect based on the first aspect further includes a module substrate (). The semiconductor device () is disposed in the module substrate (). The first inductor (L) and the second inductor (L) are inner-layer inductors disposed in the module substrate (). The first inductor (L) includes a wire portion wound into a spiral shape when viewed in plan in a thickness direction (D) of the module substrate (). The second inductor (L) includes a wire portion wound into a spiral shape when viewed in plan in the thickness direction (D) of the module substrate (). The first inductor (L) and the second inductor (L) are disposed to couple a magnetic field generated at the first inductor (L) and a magnetic field generated at the second inductor (L).

100 100 1 2 1 5 In a semiconductor module (,A) according to a fifth aspect based on the fourth aspect, the first inductor (L) and the second inductor (L) are adjacent to each other in the thickness direction (D) of the module substrate ().

1 2 The semiconductor module according to this aspect can easily couple a magnetic field generated at the first inductor (L) and a magnetic field generated at the second inductor (L).

100 5 1 2 5 1 2 3 5 1 1 5 2 1 5 3 1 5 2 3 2 3 1 3 1 3 A semiconductor module (A) according to a sixth aspect based on the third aspect further includes a module substrate (). The semiconductor device () and the second semiconductor device () are disposed in the module substrate (). The first inductor (L), the second inductor (L), and the third inductor (L) are inner-layer inductors disposed in the module substrate (). The first inductor (L) includes a wire portion wound into a spiral shape when viewed in plan in a thickness direction (D) of the module substrate (). The second inductor (L) includes a wire portion wound into a spiral shape when viewed in plan in the thickness direction (D) of the module substrate (). The third inductor (L) includes a wire portion wound into a spiral shape when viewed in plan in the thickness direction (D) of the module substrate (). The second inductor (L) and the third inductor (L) are disposed to couple a magnetic field generated at the second inductor (L) and a magnetic field generated at the third inductor (L). The first inductor (L) and the third inductor (L) are disposed to cancel out a magnetic field generated at the first inductor (L) and the magnetic field generated at the third inductor (L).

3 4 The semiconductor module according to this aspect can improve isolation between the first power supply path () and the second power supply path ().

100 100 1 5 1 2 2 3 1 3 A semiconductor module (A) according to a seventh aspect is based on the sixth aspect. In the semiconductor module (A), in the thickness direction (D) of the module substrate (), the wire portion of the first inductor (L) and the wire portion of the second inductor (L) are adjacent to each other. The wire portion of the second inductor (L) and the wire portion of the third inductor (L) are adjacent to each other. The wire portion of the first inductor (L) and the wire portion of the third inductor (L) are not adjacent to each other.

The semiconductor module according to this aspect can achieve size reduction.

100 100 5 1 5 1 2 0 5 0 9 1 2 5 1 9 0 1 5 1 2 1 5 A semiconductor module (,A) according to an eighth aspect based on any one of the first to third aspects further includes a module substrate (). The semiconductor device () is disposed in the module substrate (). One of a wire portion of the first inductor (L) and a wire portion of the second inductor (L) is a chip inductor (L) disposed in the module substrate (). The chip inductor (L) includes a wound portion (). A remaining one of the wire portion of the first inductor (L) and the wire portion of the second inductor (L) is an inner-layer inductor disposed in the module substrate () and having a spiral shape. A winding axis (A) of the wound portion () of the wire portion of the chip inductor (L) is parallel to a thickness direction (D) of the module substrate (). The wire portion of the first inductor (L) and the wire portion of the second inductor (L) at least partially overlap when viewed in plan in the thickness direction (D) of the module substrate ().

1 2 1 2 The semiconductor device, the second semiconductor device, the matching circuits MN/MN, and any control logic associated therewith may be implemented as circuitry. The functionality of the elements disclosed herein may be implemented using circuitry or processing circuitry which includes general purpose processors, special purpose processors, integrated circuits, ASICs (“Application Specific Integrated Circuits”), FPGAs (“Field Programmable Gate Arrays”), conventional circuitry and/or combinations thereof which are programmed, using one or more programs stored in one or more memories, or otherwise configured to perform the disclosed functionality. Processors are considered processing circuitry or circuitry as they include transistors and other circuitry therein. The processor may be a programmed processor which executes a program stored in a memory. In the disclosure, the circuitry, units, or means are hardware that carry out or are programmed to perform the recited functionality. The hardware may be any hardware disclosed herein which is programmed or configured to carry out the recited functionality

1 semiconductor device (first semiconductor device) 11 input terminal (first input terminal) 12 output terminal (first output terminal) 13 grounding terminal (first grounding terminal) 14 power terminal 2 second semiconductor device 21 input terminal (second input terminal) 22 output terminal (second output terminal) 23 grounding terminal (second grounding terminal) 24 power terminal 3 power supply path (first power supply path) 4 second power supply path 5 module substrate 50 main surface 7 direct-current power supply 8 element 9 wound portion 100 100 ,A semiconductor module 1 Awinding axis 0 Lchip inductor 1 Lfirst inductor 2 Lsecond inductor 3 Lthird inductor 1 Ccapacitor (first capacitor) 2 Csecond capacitor 1 MNfirst matching circuit 2 MNsecond matching circuit 1 Tfirst terminal 2 Tsecond terminal 3 Tthird terminal