Semiconductor Devices and Methods of Manufacturing Semiconductor Devices

The present disclosure relates, in general, to electronic devices, and more particularly, to semiconductor devices and methods for manufacturing semiconductor devices.

Prior semiconductor packages and methods for forming semiconductor packages are inadequate, for example resulting in excess cost, decreased reliability, relatively low performance, or package sizes that are too large. Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such approaches with the present disclosure and reference to the drawings.

The following discussion provides various examples of semiconductor devices and methods of manufacturing semiconductor devices. Such examples are non-limiting, and the scope of the appended claims should not be limited to the particular examples disclosed. In the following discussion, the terms “example” and “e.g.” are non-limiting.

The figures illustrate the general manner of construction. Descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the present disclosure. Elements in the drawing figures are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of the examples discussed in the present disclosure. The same reference numerals in different figures denote the same elements.

The term “or” means any one or more of the items in the list joined by “or.” As an example, “x or y” means any element of the three-element set {(x), (y), (x, y)}. As another example, “x, y, or z” means any element of the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

The terms “comprises,” “comprising,” “includes,” and “including” are “open ended” terms and specify the presence of stated features, but do not preclude the presence or addition of one or more other features.

The terms “first,” “second,” etc. may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Thus, for example, a first element discussed in this disclosure could be termed a second element without departing from the teachings of the present disclosure.

Unless specified otherwise, the term “coupled” may be used to describe two elements directly contacting each other or describe two elements indirectly connected by one or more other elements. For example, if element A is coupled to element B, then element A can be directly contacting element B or indirectly connected to element B by an intervening element C. Similarly, the terms “over” or “on” may be used to describe two elements directly contacting each other or describe two elements indirectly connected by one or more other elements. As used herein, the term “coupled” can refer to a mechanical or electrical coupling.

An example electronic device comprises an electronic component comprising a contact pad. A first dielectric structure can be disposed over the electronic component and can define an opening that exposes the contact pad from the first dielectric structure. A conductive structure can be disposed over the first dielectric structure and coupled to the contact pad. A second dielectric structure can be disposed over the conductive structure and coupled to the contact pad. The second dielectric structure can comprise an outer side. A protruding pad of the conductive structure can include a contoured sidewall protruding from the outer side of the second dielectric structure.

In various examples, the contoured sidewall comprises a rounded geometry. The contoured sidewall can include a tapered sidewall. The protruding pad can comprise a perimeter substantially coplanar with the outer side of the second dielectric structure. The protruding pad can have a convex geometry. The outer side of the second dielectric structure can include a trench disposed around the protruding pad. The trench can be disposed around the contoured sidewall. An outward terminal of the protruding pad can be coplanar with a portion of the outer side of the second dielectric structure disposed around the trench. An external interconnect can be coupled to the protruding pad and the contoured sidewall. A bond area can be between the protruding pad and the external interconnect. The bond area can have a non-planar geometry.

Another example electronic device can include an electronic component, a dielectric structure disposed over the electronic component, and a conductive structure coupled to the electronic component and extending through the dielectric structure. The conductive structure can comprise a protruding pad having a contoured sidewall protruding from a side of the dielectric structure.

An example method of making an electronic device can include the steps of providing an electronic component including a contact pad, providing a conductive structure coupled to the contact pad, and providing a dielectric structure over the conductive structure. A protruding pad of the conductive structure can comprise a contoured sidewall protruding from an outer side of the dielectric structure.

In various examples, the method can include removing a portion of the dielectric structure from the outer side to leave a trench formed in the outer side and disposed around the protruding pad. A mask can be provided over the dielectric structure. The mask can define an opening that exposes the conductive structure. A conductive material can be provided in the opening to leave the protruding pad protruding from the outer side of the dielectric structure. A portion of the dielectric structure can be removed from the outer side to leave the outer side of the dielectric structure substantially planar and recessed from the protruding pad. A first mold chase and a second mold chase opposite the first mold chase can be provided. The first mold chase can include an elastic film on an inner side, and the protruding pad of the conductive structure can be pressed into the elastic film. A dielectric material can be provided between the first mold chase and second mold chase to form the dielectric structure over the conductive structure. The elastic film can be removed to leave the protruding pad protruding from a side of the dielectric structure.

Other examples are included in the present disclosure. Such examples may be found in the figures, in the claims, or in the description of the present disclosure.

Electronic devices and related methods incorporating protruding pads can yield improved board level reliability (BLR). External interconnects can be coupled to protruding pads having a contoured, non-planar geometry, with the pads protruding above adjacent dielectric structures. The bonds between external interconnects and protruding pads can significantly improve reliability at package interfaces for BGA solder joints, for example, relative to traditional techniques. The bond region between the external interconnect and protruding pad can have an increased surface area relative to the bond region between an external interconnect and a similarly-sized planar pad, which can increase resistance to bond failure. The bond between the protruding pad and external interconnect can include a physical interference to lateral movement, as the protruding pad can extend into the bonded external interconnect.

1 FIG. 1 FIG. 100 100 110 120 130 140 150 160 Referring now to, a cross-sectional view of an example electronic deviceis shown. In the example of, electronic devicecan comprise electronic component, first dielectric structure, conductive structure, second dielectric structure, external interconnects, and encapsulant.

110 111 112 113 130 130 130 135 135 140 135 136 140 a b Electronic componentcan comprise first side, second side, and contact pads. Conductive structurecan comprise inward terminals, outward terminals, and protruding pads. Protruding padscan protrude above the upper side of second dielectric structure. In some examples, protruding padscan have a tapered geometry with angled sidewallsoriented at an obtuse angle relative to an upper side of second dielectric structure.

120 130 140 150 160 110 110 First dielectric structure, conductive structure, second dielectric structure, external interconnects, and encapsulantcan be referred to as a semiconductor package. The semiconductor package can provide protection for electronic componentfrom external environments or external exposure. The semiconductor package can provide electrical coupling between electronic componentand external electronic components.

2 2 FIGS.A toJ 2 FIG.A 2 FIG.A 100 100 110 10 use cross-sectional views to illustrate an example method for manufacturing electronic device.shows a cross-sectional view of electronic deviceat an early stage of manufacture. In the example shown in, multiple electronic componentscan be coupled to carrier.

10 10 10 10 10 10 10 110 In various examples, carriercan comprise various shapes or characteristics. In some examples, carriercan comprise or be referred to as a wafer support system, a wafer, a board, a panel, or a plate. In some examples, carriercan comprise a wafer material (e.g., a semiconductor material, such as silicon), glass, ceramic, or metal. The thickness of carriercan range from approximately 300 μm (micrometers) to approximately 2,000 μm, and the width of carriercan range from approximately 50 mm (millimeters) to approximately 300 mm. In some examples, the width of carriercan be up to 600 mm. Carriercan support multiple electronic components. As used herein with numeric values, the term “approximately” can mean +/−5%, +/−10%, +/−15%, +/−20%, or +/−25%.

10 11 10 110 11 11 10 11 11 11 11 In some examples, carriercan comprise temporary bond layerprovided on carrier. Multiple electronic componentscan be provided on temporary bond layer. In some examples, temporary bond layercan be provided on the upper side of carrierby spin coating, doctor blade coating, casting, painting, spray coating, slot die coating, curtain coating, slide coating, or knife over edge coating, screen printing, pad printing, gravure printing, flexography printing, offset printing, inkjet printing, an intermediate technology between coating and printing, or by direct attachment of a bonding film or bonding tape. In some examples, the temporary bond layercan comprise or be referred to as a temporary bonding film, a temporary bonding tape, or a temporary adhesive coating. For example, the temporary bond layercan be a heat release tape (or film) or an optical release tape (or film), wherein the adhesive strength of temporary bond layeris weakened or removed by heat or light, respectively. In some examples, the adhesive strength of temporary bond layercan be weakened or removed by physical or chemical force.

110 111 112 111 113 111 111 110 112 110 113 Each of electronic componentscan comprise a first side (or first surface), a second side (or second surface)on the opposite side of first side, and multiple contact padsprovided on first side. In some examples, first sideof electronic componentcan comprise or be referred to as a front side, front surface, or an active side. In some examples, second sideof electronic componentcan comprise or be referred to as a back side, back surface, or inactive side. In some examples, contact padscan comprise or be referred to as bond pads, which can be exposed from an inorganic layer (e.g., SiN or SiO2) or redistribution layer (RDL) pads exposed from a dielectric material.

111 10 11 10 110 11 110 100 110 110 110 10 100 110 110 In accordance with various examples, first sideof electronic componentscan be temporarily coupled to temporary bond layerof carrier. In some examples, multiple electronic componentscan be arranged on temporary bond layerin a matrix with rows and columns. A spacing distance between neighboring electronic componentscan be appropriately adjusted depending on the size of completed electronic device. In some examples, the spacing distance (or gap) between the sidewall of a first electronic componentand the adjacent sidewall of a neighboring electronic componentcan be approximately 50 μm to approximately 500 μm. By placing multiple electronic componentson carrier, the production yield of electronic devicescan be improved. In some examples, the thickness of electronic componentcan range from approximately 50 μm to approximately 500 μm. In some examples, the area (or footprint) of electronic componentcan range from approximately 0.5 mm by 0.5 mm to 12 mm by 12 mm.

110 110 110 Electronic componentcan comprise or be referred to as a die, a chip, a package (e.g., one or more encapsulated die), or a passive device. In some examples, electronic componentcan comprise a digital signal processor (DSP), a network processor, a power management unit, an audio processor, a wireless baseband system on a chip (SoC) processor, a sensor, an application specific integrated circuit, a memory, an antenna on package (AoP), an antenna in package (AiP), a 5G NR mmWave module, a sub-6 GHz RF module, or an integrated passive device (IPD). In some examples, electronic componentcan perform various functions such as, for example, calculation processing, control processing, data storage, current or voltage amplification, noise filtering, or other functions suitable to electronic components.

2 FIG.B 2 FIG.B 100 160 160 110 11 160 110 160 112 110 160 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, encapsulantis be provided. Encapsulantcan cover multiple electronic componentsand temporary bond layer. In some examples, encapsulantcan be provided to a thickness greater than the thickness of electronic components, and encapsulantcan cover second sideof electronic component. In some examples, encapsulantcan comprise or be referred to as a body, a molding, an epoxy molding compound (EMC), a resin, a filler-reinforced polymer, a B-stage pressed film, or gel.

160 110 110 110 110 110 110 Encapsulantcan be provided by compression molding, transfer molding, liquid-body molding, vacuum lamination, paste printing, film-assisted molding, or any other suitable deposition process. In some examples, compression molding can comprise a method where a flowable resin is first supplied to a mold, electronic componentsare then input in the mold, and the flowable resin is cured. Transfer molding can comprise a method where a flowable resin is supplied from a gate (supply port) of the mold to the area surrounding electronic componentsand then cured. Liquid body molding can include a method where electronic componentsare molded by injecting a liquid resin into a mold. Vacuum lamination can comprise a method where electronic componentsare molded by attaching a thin sheet of resin using vacuum pressure. Paste printing can include a method where molding is performed by applying resin in the form of a high-viscosity paste to electronic componentsusing a silk screen method. Film-assisted molding can include a method where electronic componentsare molded by placing a film on the surface of a mold and then injecting resin into the mold.

160 160 120 130 140 100 160 110 110 2 2 FIGS.D-F In various examples, the thickness of encapsulantcan range from approximately 200 μm to approximately 600 μm. Encapsulantcan serve as a base member supporting formation of first dielectric structure, conductive structure, and second dielectric structure() during the manufacture of electronic device. Encapsulantcan protect electronic componentfrom exposure to external elements or the environment and can quickly radiate heat from electronic componentoutward.

2 FIG.C 2 FIG.C 100 10 10 11 11 11 10 10 110 160 10 11 11 10 110 160 11 110 160 10 10 111 110 160 111 110 160 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, carrieris removed. Carrierand temporary bond layercan be removed in any of a variety of ways. For example, temporary bond layercan be removed by applying energy (e.g., heat energy or laser energy) to temporary bond layeror carrier. In another example, carriercan be peeled, cut, or pulled away from electronic componentsand encapsulant. In still another example, carrieror temporary bond layercan be ground (or polished) and/or chemically etched. In some examples, after the adhesive force of temporary bond layeris removed or weakened by heat, light, a chemical solution, or physical external force, carriercan be separated from electronic componentsand encapsulant. In some examples, temporary bond layercan be separated from electronic componentand encapsulantwhile remaining attached to carrier. Removal of carriercan expose of first sideof electronic componentand encapsulant. In some examples, first sideof electronic componentand the upper side of encapsulantcan be coplanar.

2 FIG.D 2 FIG.D 100 120 110 160 120 110 160 120 120 120 120 110 160 120 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, first dielectric structureis provided over electronic componentsand encapsulant. First dielectric structurecan be provided covering electronic componentand encapsulant. In some examples, first dielectric structurecan comprise or be referred to as a dielectric layer, a coreless layer, or a filler-free layer. For example, first dielectric structurecan comprise an electrically insulating material such as polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), resin, or an Ajinomoto buildup film (ABF). In some examples, first dielectric structurecomprises an organic dielectric material. First dielectric structurecan be provided on electronic componentand encapsulantby spin coating, spray coating, printing, sintering, thermal oxidation, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), plasma vapor deposition (PVD), sheet deposition, vaporization, or any other suitable deposition technique. In some examples, the thickness of first dielectric structurecan range from approximately 10 μm to approximately 50 μm.

121 120 113 110 121 120 121 120 121 120 120 121 In accordance with various examples, openingscan be provided in first dielectric structure. Contact padsof electronic componentcan be exposed through openingsin first dielectric structure. In some examples, openingscan be provided after first dielectric structureis provided. For example, openingscan be provided by providing a mask pattern on the upper side of first dielectric structureand then removing exposed portions first dielectric structurethrough etching. In some examples, openingscan formed using laser ablation.

2 FIG.E 2 FIG.E 100 130 130 130 113 120 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, conductive structureis provided. In some examples, conductive structurecan be formed by first providing a seed layer for conductive structureon contact padsand first dielectric structure. The seed layer can be provided by electroless plating, electrolytic plating, sputtering, PVD, CVD, or any other suitable deposition process. In some examples, the seed layer can comprise titanium (Ti), titanium tungsten (TiW), titanium/copper (Ti/Cu), titanium tungsten/copper (TiW/Cu), or nickel vanadium (NiV). In some examples, the thickness of the seed layer can range from approximately 0.01 μm to approximately 1.0 μm.

130 In accordance with various examples, after forming the seed layer, a photoresist can be provided over the seed layer. The photoresist can be patterned in accordance with a desired pattern for conductive structure. For example, the photoresist can comprise multiple patterns (i.e., openings) with areas of the seed layer being exposed through the openings in the photoresist.

130 130 130 b. In accordance with various examples, a conductor can be electroplated on the seed layer exposed through the patterned photoresist to provide conductive structureon the seed layer. After deposition of the conductor, the photoresist and the portions of the seed layer not covered by conductive structureare removed (e.g., via etching). In some examples, this process (i.e., seed layer deposition, providing a patterned photoresist, electroplating conductor in the photoresist openings, then removing photoresist and exposed seed layer) can be performed a second time to provide outward terminals

130 113 121 120 130 130 150 130 130 a b In some examples, portions of conductive structurecoupled to contact padsthrough openingsof first dielectric structurecan be referred to as inward terminals, and portions of conductive structurewhere external interconnectsare to be connected later can be referred to as outward terminals. Conductive structurecan comprise or be referred to as one or more conductive layers defining signal distribution elements such as, for example, traces, vias, pads, conductive paths, and under bumped metals (UBMs).

130 130 130 130 130 130 113 110 130 130 130 150 130 a a b b In various examples, conductive structurecan comprise copper, aluminum, gold, silver, nickel, palladium, or platinum. Conductive structurecan be provided through processes such as, for example, electroplating, electroless plating, chemical vapor deposition (CVD), metal organic chemical vapor deposition (MOCVD), sputtering or physical vapor deposition (PVD), atomic layer deposition (ALD), plasma vapor deposition, printing, or screen printing. The thickness of conductive structurecan range from approximately 10 μm to approximately 30 μm. Conductive structurecan transmit electrical signals in horizontal and vertical directions. In some examples, the diameters of inward terminalscan range from approximately 10 μm to approximately 40 μm. Inward terminalscan electrically connect contact padsof electronic componentand conductive structure. In some examples, the diameters of outward terminalscan range from approximately 200 μm to approximately 250 μm. Outward terminalscan electrically connect external interconnectsand conductive structure.

2 FIG.E 120 130 120 130 120 130 130 140 Although the example ofdepicts first dielectric structureas a single layer and conductive structureas a single layer, first dielectric structureor conductive structurecan also comprise multi-layer structures. In some examples, in order to provide a multilayer structure, the process of providing the dielectric structure and the conductive structure can be repeated multiple times. In some examples, first dielectric structureand conductive structurecan comprise multiple layers interleaved with one another. Additionally, conductive structureand second dielectric structure, which will be described below, can also be interleaved with one another.

2 FIG.F 2 FIG.F 100 140 140 130 120 140 120 130 120 140 130 140 140 140 140 140 160 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, second dielectric structurecan be provided. Second dielectric structurecan be provided on conductive structureand first dielectric structure. In some examples, a height of second dielectric structureabove dielectric structurecan be greater than a height of conductive structureabove dielectric structure. Second dielectric structurecan cover conductive structure. In some examples, second dielectric structurecan comprise or be referred to as a body, a molding, an epoxy molding compound (EMC), a resin, a filler-reinforced polymer, a B-stage pressed film, or gel. Second dielectric structurecan comprise one or more of a variety of encapsulating materials. In some examples, second dielectric structurecan comprise any material selected from various encapsulating or molding materials (e.g., resins, polymers, polymer composites, polymers with fillers, epoxy resins, epoxy resins with fillers, epoxy acrylates with fillers, silicone resins, or combinations thereof. In some examples, second dielectric structurecan be provided by compression molding, transfer molding, liquid body molding, vacuum lamination, paste printing, or film assisted molding. In some examples, second dielectric structureand encapsulantcan comprise the same material (e.g., an encapsulant or mold material).

140 140 140 In some examples, second dielectric structurecan comprise inorganic dielectric materials (e.g., Si3N4, SiO2, SiON, SiN, oxide, nitride, or combinations thereof). In some examples, second dielectric structurecan comprise organic dielectric materials (e.g. polymers, PI, BCB, PBO, bismaleimide triazine (BT)). In some examples, second dielectric structurecan be provided by spin coating, spray coating, printing, sintering, thermal oxidation, PVD, CVD, MOCVD, ALD, LPCVD, PECVD, plasma vapor deposition, sheet deposition, vaporization, or any other suitable deposition process.

140 140 130 130 The thickness of second dielectric structure, before grinding, can range from approximately 50 μm to approximately 200 μm. Second dielectric structurecan protect conductive structurefrom exposure to external elements or the environment and can quickly radiate heat from conductive structureoutward.

120 130 140 In some examples, first dielectric structure, conductive structure, and second dielectric structurecan be referred to as a substrate. In some examples, the substrate can be a redistribution layer (“RDL”) substrate. RDL substrates can comprise one or more conductive redistribution layers and one or more dielectric layers that (a) can be formed layer by layer over an electronic device to which the RDL substrate is coupled, or (b) can be formed layer by layer over a carrier that can be entirely removed or at least partially removed after the electronic device and the RDL substrate are coupled together. RDL substrates can be manufactured layer by layer as a wafer-level substrate on a round wafer in a wafer-level process, or as a panel-level substrate on a rectangular or square panel carrier in a panel-level process.

RDL substrates can be formed in an additive buildup process that can include one or more dielectric layers alternatingly stacked with one or more conductive layers that define respective conductive redistribution patterns or traces configured to collectively (a) fan-out electrical traces outside the footprint of the electronic device, or (b) fan-in electrical traces within the footprint of the electronic device. The conductive patterns can be formed using a plating process such as, for example, an electroplating process or an electroless plating process. The conductive patterns can comprise an electrically conductive material such as, for example, copper or other plateable metal. The locations of the conductive patterns can be made using a photo-patterning process such as, for example, a photolithography process and a photoresist material to form a photolithographic mask.

The dielectric layers of the RDL substrate can be patterned with a photo-patterning process, which can include a photolithographic mask through which light is exposed to photo-pattern desired features such as vias in the dielectric layers. Thus, the dielectric layers can be made from photo-definable organic dielectric materials such as, for example, polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO). Such dielectric materials can be spun-on or otherwise coated in liquid form, rather than attached as a pre-formed film. To permit proper formation of desired photo-defined features, such photo-definable dielectric materials can omit structural reinforcers or can be filler-free, without strands, weaves, or other particles, that could interfere with the light from the photo-patterning process. In some examples, such filler-free characteristics of filler-free dielectric materials can permit a reduction of the thickness of the resulting dielectric layer. Although the photo-definable dielectric materials described above can be organic materials, in other examples the dielectric materials of the RDL substrates can comprise one or more inorganic dielectric layers. Some examples of inorganic dielectric layer(s) can comprise silicon nitride (Si3N4), silicon oxide (SiO2), or SiON.

The inorganic dielectric layer(s) can be formed by growing the inorganic dielectric layers using an oxidation or nitridization process instead of using photo-defined organic dielectric materials. Such inorganic dielectric layers can be filler-free, without strands, weaves, or other dissimilar inorganic particles. In some examples, the RDL substrates can omit a permanent core structure or carrier such as, for example, a dielectric material comprising bismaleimide triazine (BT) or FR4, and these types of RDL substrates can be referred to as coreless substrates.

In some examples, the substrate can be a pre-formed substrate. The pre-formed substrate can be manufactured prior to attachment to an electronic device and can comprise dielectric layers between respective conductive layers. The conductive layers can comprise copper and can be formed using an electroplating process. The dielectric layers can be thicker non-photo-definable layers and can be attached as a pre-formed film rather than as a liquid and can include a resin with fillers such as strands, weaves, or other inorganic particles for rigidity or structural support. Since the dielectric layers are non-photo-definable, features such as vias or openings can be formed by using a drill or laser. In some examples, the dielectric layers can comprise a prepreg material or Ajinomoto Buildup Film (ABF).

A pre-formed substrate can include a permanent core structure or carrier such as, for example, a dielectric material comprising bismaleimide triazine (BT) or FR4, and dielectric and conductive layers can be formed on the permanent core structure. In other examples, the pre-formed substrate can be a coreless substrate omitting the permanent core structure, and the dielectric and conductive layers can be formed on a sacrificial carrier and is removed after formation of the dielectric and conductive layers and before attachment to the electronic device. The pre-formed substrate can be referred to as a printed circuit board (PCB) or a laminate substrate. Such pre-formed substrate can be formed through a semi-additive or modified-semi-additive process.

2 FIG.G 2 FIG.G 100 140 140 140 140 140 130 130 140 130 130 140 b b shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, a grinding process can be performed. By grinding and removing some areas of second dielectric structure, the thickness of second dielectric structurecan be reduced. In some examples, after grinding the upper side of second dielectric structureto a reference thickness using a grinding pad with relatively large abrasive particles, the upper side of second dielectric structurecan be finely ground through a grinding pad with relatively small abrasive particles. In some examples, after grinding, the thickness of second dielectric structurecan range from approximately 50 μm to approximately 100 μm. By the grinding process, some areas of conductive structure(for example, outward terminals) can be exposed through second dielectric structure. In some examples, the upper sides of outward terminalsof conductive structureand the upper side of second dielectric structurecan be coplanar.

2 FIG.H 2 FIG.H 100 140 140 130 140 140 130 140 130 140 135 135 140 135 136 140 136 140 b b b shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, a laser ablation process can be performed. By providing laser beams on second dielectric structure, the areas of second dielectric structurearound the lateral sides of outward terminalscan be removed. The removal depth of second dielectric structurecan range from approximately 10 μm to approximately 25 μm. In some examples, by removing some areas of second dielectric structure, outward terminalscan protrude from the upper side (or distal side) of second dielectric structureby heights ranging from approximately 10 μm to approximately 25 μm. In some examples, the area of outward terminalprotruding from the upper side of second dielectric structurecan comprise or be referred to as protruding pad. Protruding padexposed from second dielectric structurecan be substantially circular when viewed from the top. Protruding padscan have a non-planar, contoured geometry comprising angled sidewallsextending above the upper side of second dielectric structure. Angled sidewallscan be oriented at an obtuse angle relative to the upper side of second dielectric structure.

140 140 140 In some examples, the laser ablation process can comprise the steps of placing an electronic device on a stage, generating laser beams, X-Y scanning the laser beams over second dielectric structure, focusing the laser beams scanned over second dielectric structureinto a small laser beam spot, suctioning and removing dust generated when some areas of second dielectric structureare removed, and adjusting the stage height according to the thickness of an electronic device.

140 140 140 130 135 140 b In accordance with various examples, laser beams can be generated as an energy source to selectively remove portions of second dielectric structure. As the laser beams generated in the laser beam generation step, laser beams of various wavelengths suitable for removing some areas of second dielectric structurecan be used. In some examples, a laser beam having a near-infrared wavelength region (e.g., a wavelength of approximately 1.0 μm to approximately 1.1 μm) can be suitable to selectively remove a portion of second dielectric structure. Continuing the near-infrared example, little reaction occurs with outward terminalsor protruding pad, made of metal materials, while having good reactivity between the laser beam and second dielectric structure. Using fiber lasers in the above-described wavelength range can reduce the need for optical alignment and can sustain prolonged and reliable use due to longevity of consumable optical components.

140 140 140 130 135 b In accordance with various examples, the dust suctioning step can comprise removing dust generated when portions of second dielectric structureare destroyed and removed by laser beams. In some examples, for more efficient dust removal, a gas injection area can be configured to spray gas from the opposite side of a dust suction area to the upper side of second dielectric structureto guide the dust evaporated from second dielectric structureto the dust suction area. When outward terminalsor protruding padcontain a copper material vulnerable to oxidation, thermal oxidation by the laser beam can occur. The thermal oxidation effect caused by the laser beam can be reduced by spraying an inert gas such as nitrogen (N2) or argon (Ar) from the gas injection area.

135 140 135 135 140 135 130 135 150 135 140 b Protruding padprotruding upward from second dielectric structurecan be provided through such a laser ablation process in various examples, though other techniques described herein can also be used to provide protruding pad. As described above, the thickness of protruding padprotruding from second dielectric structurecan range from approximately 10 μm to approximately 25 μm. In accordance with various examples, the upper side of protruding padcan be defined as outward terminals. The bonding area or contact area between protruding padand external interconnects(described below) can be increased by protruding padprotruding upward from second dielectric structure.

2 FIG.I 2 FIG.I 100 150 150 135 130 150 135 130 150 150 135 130 b b b. 37 95 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, external interconnectscan be provided. External interconnectscan be coupled to protruding padand outward terminals. In some examples, external interconnectscan comprise tin (Sn), silver (Ag), lead (Pb), copper (Cu), Sn—Pb, Sn—Pb, Sn—Pb, Sn—Pb—Ag, Sn—Pb—Bi, Sn—Cu, Sn—Ag, Sn—Au, Sn—Bi, Sn—Ag—Cu, Sn—Ag—Bi, Sn—Zn, or Sn—Zn—Bi. In some examples, after temporarily placing a conductive material containing solder on protruding padand outward terminalsthrough a ball drop method, external interconnectscan be completed through a reflow process. External interconnectscan be referred to as conductive balls, solder balls, conductive bumps, or conductive caps on protruding padand outward terminals

150 135 130 150 140 135 150 135 130 140 150 150 100 150 110 130 135 140 150 135 b b In some examples, external interconnectscan surround the exposed portion of protruding padand outward terminals. External interconnectscan be in contact with second dielectric structurein an area around protruding pads. In some examples, external interconnectscan surround a portion of protruding padand outward terminalsand can be spaced apart from second dielectric structure. In some examples, the diameter of external interconnectscan range from approximately 200 μm to approximately 300 μm. In some examples, external interconnectscan be referred to as external input/output terminals of electronic device. External interconnectscan be electrically connected to electronic componentthrough conductive structure. Protruding padbeing disposed above the upper side of second dielectricincreases the surface area of the bond region (or interface) between external interconnectand protruding pad, which can increase resistance to bond failure.

2 FIG.J 2 FIG.J 100 100 140 120 160 140 120 160 130 140 120 130 160 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, a sawing or singulation process can be performed. In some examples, individual electronic devicecan be separated by a sawing tool, such as a diamond blade wheel or laser beam. In some examples, sawing can be performed by cutting through second dielectric structure, first dielectric structure, and encapsulant. Accordingly, the lateral sides of second dielectric structure, first dielectric structure, and encapsulantcan be coplanar after singulation. In some examples, conductive structurecan also be sawed during the sawing process, and accordingly, the lateral sides of the second dielectric structure, first dielectric structure, conductive structure, and encapsulantcan be coplanar.

3 3 FIGS.A toC 3 FIG.A 3 FIG.A 2 2 FIGS.A-G 100 100 show an example method for manufacturing electronic deviceusing cross-sectional views.shows a cross-sectional view of electronic deviceat a later stage of manufacture. For example, the step depicted inmay follow after processing steps depicted in.

3 FIG.A 140 13 140 13 140 130 130 13 u In the example shown in, after grinding second dielectric structure, photoresistcan be provided on second dielectric structure. Photoresistcan be provided on the upper side of second dielectric structureand on the upper sideof conductive structure. Photoresistcan be provided by spin coating, doctor blade coating, casting, painting, spray coating, slot die coating, curtain coating, slide coating, knife over edge coating, screen printing, pad printing, gravure printing, flexography printing, offset printing, an inkjet printing method, an intermediate technology between coating and printing, by attachment of a film, or any other suitable deposition method.

3 FIG.B 3 FIG.B 100 14 13 13 13 13 14 130 130 130 130 14 13 u u shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, openingscan be provided in photoresistby a photo etching process. In some examples, by irradiating light after a mask is placed on photoresist, some areas of photoresistcan be exposed to light. By developing a photosensitive area or a non-photosensitive area of photoresist, openingscan be provided, for example, at locations corresponding to upper side(or pads) of conductive structure. Upper side(or pads) of conductive structurecan be exposed through openingsof photoresist.

3 FIG.C 3 FIG.C 2 FIG.H 100 135 135 135 130 140 140 135 135 135 13 shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, protruding padcan be provided. In some examples, protruding padcan be provided through electroplating, electroless plating, CVD, MOCVD, sputtering or PVD, ALD, plasma vapor deposition, printing, or screen printing. The thickness of protruding pad(i.e., the portion of conductive structurethat is located above the upper side of second dielectric) can range from approximately 10 μm to approximately 25 μm as measured from the upper side of second dielectric structure. Protruding padcan have similar or identical structures and characteristics to protruding padas described in. After forming protruding pad, photoresistcan be removed.

4 4 FIGS.A andB 4 FIG.A 4 FIG.A 2 2 FIGS.A-E 100 100 show cross-sectional views of an example method for manufacturing an example electronic device.shows a cross-sectional view of electronic deviceat a later stage of manufacture. For example, the step depicted inmay follow after processing steps depicted in.

4 FIG.A 130 110 16 17 160 16 130 17 18 130 130 17 18 130 18 135 130 18 19 18 130 18 120 b b b In the example shown in, after providing conductive structure, encapsulated electronic componentscan be interposed between lower mold chaseand upper mold chase. The lower side of encapsulantcan be located on the upper side of lower mold chase. Conductive structurecan be coupled to the lower side of upper mold chasethrough elastic film. In some examples, the upper sides of outward terminalsof conductive structurecan approach the lower side of upper mold chaseand extend into elastic film. In some examples, some areas of outward terminalscan be inserted to elastic filmto a desired depth (e.g., the desired height of protruding pad). In some examples, the depths of outward terminalsinserted to elastic filmcan range from approximately 10 μm to approximately 25 μm. In some examples, gap or volumecan be provided between elastic filmand conductive structureand between elastic filmand first dielectric structure.

4 FIG.B 4 FIG.B 100 140 140 19 120 130 18 140 19 140 160 140 19 120 130 18 160 130 140 140 130 130 18 140 130 18 140 b b shows a cross-sectional view of electronic deviceat a later stage of manufacture. In the example shown in, second dielectric structurecan be provided. In some examples, second dielectric structurecan be provided to fill gapbetween first dielectric structure, conductive structureand elastic film. In some examples, second dielectric structurecan be provided in gapin molten form. In some examples, second dielectric structurecan have a composition and characteristics similar to or identical to encapsulant. Second dielectric structurecan be provided to gapbetween first dielectric structure, conductive structure, and elastic filmby transfer molding. In some examples, the flowable resin similar or identical to encapsulantcan be supplied from the gate around conductive structureand then cured. The thickness of second dielectric structurecan range from approximately 50 μm to approximately 100 μm. Second dielectric structurecan protect conductive structurefrom exposure to external elements or the environment. Some areas of outward terminalscoupled to elastic filmmay be exposed from second dielectric structure. Portions of outward terminalsthat pressed into elastic filmcan protrude above the upper side of second dielectric structure.

140 100 17 16 18 130 130 135 140 140 135 135 140 135 135 bs 2 FIG.H After curing second dielectric structure, electronic devicecan be separated from upper mold chaseand lower mold chase. During the separation process, elastic filmis also removed, thereby leaving portions of conductive structure(i.e., outward terminalsand protruding pad) exposed from second dielectric structure. The upper side of second dielectric structurecan be lower than the upper side of protruding pad, and accordingly, the upper side of protruding padcan protrude from the upper side of second dielectric structure. Protruding padcan have similar or identical structures and characteristics to protruding padas described in

5 FIG. 5 FIG. 100 100 20 150 100 21 20 100 150 135 130 130 150 135 130 100 20 150 130 21 20 150 21 21 20 135 21 20 b b b shows a cross-sectional view of an example electronic device. In the example shown in, electronic devicecan be mounted on external board. External interconnectsof electronic devicecan be coupled to external padof external board. As described above, since electronic devicecan be connected through external interconnectssurrounding protruding padand outward terminalsof conductive structure, connection areas between external interconnects, protruding pad, and outward terminalscan be increased relative to flat bonding interfaces. Accordingly, board level reliability of electronic devicewith respect to external boardcan be improved. In some examples, board level reliability performance can be improved at upper interfaces between external interconnectsand outward terminals, and significant improvements can be made in package interfaces to solder joints. In some examples, depending on the design of external padof external board, board level reliability performance in lower interfaces between external interconnectsand external padcan also be improved. In some examples, external padof external boardcan also have a similar or identical structure to protruding pad, and thus the board level reliability performance for the lower interface can also be improved. In some examples external padcan be coplanar with the upper side of board.

6 FIG. 6 FIG. 1 FIG. 200 200 100 240 245 240 240 245 130 245 b shows a cross-sectional view of an example electronic device. In the example shown in, electronic devicecan be similar to electronic deviceshown in, except that second dielectric structureis provided with recessesdefined in second dielectric structure. Second dielectric structurecan comprise recessesprovided around outward terminals. Recessescan comprise or be referred to as wells or trenches.

245 240 240 130 245 240 130 130 240 135 240 245 240 245 245 135 245 150 130 135 150 245 150 240 245 2 FIG.H b b b b In some examples, recessescan be provided in a manner similar to the laser ablation process described above with reference to. In some examples, after grinding second dielectric structure, only some areas of second dielectric structurearound outward terminalscan be laser-ablated. In some examples, each of recessescan be defined by inner sidewalls of second dielectric structurein an annulus or ring-shape with respect to outward terminalsas viewed from above. As described above, after grinding, the upper sides of outward terminalscan be coplanar with the upper side of second dielectric structure, and thus the upper side of protruding padexposed from second dielectric structureby recessescan also be coplanar with the upper side of second dielectric structure. In some examples, the depth of recesscan range from approximately 10 μm to approximately 30 μm. In some examples, the width W of recess, as measured between the lateral side of protruding padand the sidewall of recess, can range from approximately 10 μm to approximately 30 μm. External interconnectscan be coupled to outward terminalswhile surrounding protruding padwith a portion of external interconnectsextending into recesses. In some examples, external interconnectscan be spaced apart from the interior sidewalls of second dielectric structuredefining recesses.

7 FIG. 7 FIG. 335 335 330 335 3351 330 3352 3351 3351 140 3352 140 335 330 335 335 330 330 335 330 330 140 3351 150 330 140 3351 335 3352 335 150 335 335 b b b b b b b b shows a cross-section of a protruding padof an example electronic device. In the example shown in, protruding padcan protrude from the center of one side of outward terminal. In some examples, protruding padcan comprise side portioninclined and extending from outward terminaland lower sideconnected to inclined side portion. Side portioncan also be described as tapered, angled, pitched, or sloped relative to the outer (or distal) side of second dielectric structure. Lower sidecan be substantially parallel to the distal side of second dielectric structurein some examples. In some examples, the width or diameter of protruding padcan be less than the width or diameter of outward terminal. Protruding padcan have a non-planar, contoured geometry. In some examples, this type of protruding padcan be provided by performing plating in a configuration in which the diameter of an opening in a mask is made smaller than the diameter of outward terminal, with the perimeter region of outward terminalis covered by the mask. Plating can result in forming the central portion of protruding padin the opening defined by the mask over the central portion of outward terminal, thus leaving the perimeter region of outward terminalsubstantially coplanar with second dielectric structure. The angled or tapered walls of side portioncan result from plating or other metal deposition processes, in some examples without subsequent smoothing or flattening steps. In some examples, external interconnectscan be coupled to a perimeter region of outward terminalsubstantially coplanar with second dielectric structure, inclined side portionof protruding pad, and planar lower sideof protruding pad. A contact region or contact area between external interconnectand protruding padcan be non-planar and contoured to the exposed side of protruding pad.

8 FIG. 8 FIG. 8 FIG. 435 435 430 435 140 435 435 140 435 140 435 435 430 435 435 150 435 b b shows a cross-section of a protruding padof an example electronic device. In the example shown in, protruding padcan protrude from an outer (or distal) side of outward terminal. In some examples, the width of protruding padcan taper in portions further downward (in the orientation of) from the level of second dielectric structure. Protruding padcan have a rounded geometry similar to a hemispherical geometry, a meniscus-like geometry, or a convex geometry. Protruding padcan protrude or bulge from a perimeter region that begins at a height of second dielectric structure. In some examples, protruding padcan have a side of a perimeter region closer to the height of second dielectric structurethan a side of a central region of protruding pad. In some examples, protruding padcan be provided by plating excess metal to form the outer side of outward terminalwithout performing typical smoothing or leveling steps. Plating excess metal without smoothing can provide protruding padhaving a rounded, convex, or bulbous geometry. Protruding padcan comprise a non-planar, contoured geometry. In some examples, external interconnectscan be coupled to the round lower side of protruding pad.

9 FIG. 9 FIG. 535 535 530 535 530 535 530 530 535 535 530 150 530 535 b b b b b b shows a cross-section of a protruding padof an example electronic device. In the example shown in, protruding padcan protrude from the center of one side of outward terminal. In some examples, protruding padcan comprise a lower side rounded and convex in an outward direction from outward terminal. In some examples, the width of protruding padcan be smaller than the width of outward terminal. Outward terminalcan comprise a flat ring disposed around protruding padat a lower side. In some examples, protruding padcan be provided by plating excessive metal in a state where the diameter of the mask opening is made smaller than the diameter of outward terminal. In some examples, external interconnectscan be coupled to a planar lower side of outward terminaland a round lower side of protruding pad.

Various examples of electronic devices include protruding pads coupled to a flowable material. The protruding pads can improve reliability of the interface between the pad and interconnect, thus improving BLR.

The present disclosure includes reference to certain examples, however, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the scope of the disclosure. Modifications may be made to the disclosed examples without departing from the scope of the present disclosure. Therefore, it is intended that the present disclosure not be limited to the examples disclosed, but that the disclosure will include all examples falling within the scope of the appended claims.