Storage Device, Operation Method Thereof and Computing System Including the Storage Device

This application claims benefit of priority to Korean Patent Application Nos. 10-2024-0153291 filed on Nov. 1, 2024, and 10-2024-0195628 filed on Dec. 24, 2024 in the Korean Intellectual Property Office, the disclosure of each of which is incorporated herein by reference in its entirety.

Example embodiments of the present disclosure relate to a storage device, an operation method thereof and a computing system including the storage device.

A storage device may be connected to a host device, may store data transmitted from the host device, and may transmit the stored data to the host device. The storage device may include a memory device and a storage controller, and the storage controller may be connected to the host device through a predetermined interface. The host device connected to the storage device may provide a recall function of generating snapshot data by capturing data of a running screen and storing the generated data in the storage device in order to improve user convenience. By storing the snapshot data generated from the host device in the storage device, a work history may be provided to a user. However, in the process of storing the snapshot data in the storage device, a write amplification factor (WAF) of the storage device may increase, such that lifespan may be shortened or reliability of the storage device may be deteriorated. Therefore, it is desirable to reduce the WAF of the storage device even when the process of storing the snapshot data is performed.

Example embodiments of the present disclosure are to provide a storage device which may reduce an increase in WAF and may improve lifespan and reliability by storing snapshot data generated by activating a recall function by a host device as sequential write rather than random write, an operation method thereof and a computing system including the storage device.

According to an example embodiment of the present disclosure, a storage device includes a nonvolatile memory device configured to store data, a storage interface connected to an external host device, and a storage controller configured to receive a command from the external host device through the storage interface and to control the nonvolatile memory device in response to the command. When the storage controller receives a command sequence from the external host device more than a reference number of times and the command sequence includes a first write command instructing a first write operation, a second write command instructing a second write operation, and a flush command instructing a flush operation sequentially, the storage controller executes the first write command by sequential write to store first write data in a first memory region of the nonvolatile memory device, and executes the second write command by random write to store second write data in the second memory region of the nonvolatile memory device.

According to an example embodiment of the present disclosure, an operation method of a storage device includes receiving a command sequence including a first write command, a second write command, and a flush command from an external host device, comparing the number of times the command sequence is received with a reference number, comparing the remaining capacity of a system partition in which an operating system is installed in a memory device included in the storage device with a reference free capacity when the number of times receiving the command sequence is equal to or greater than the reference number, and when the remaining capacity is greater than or equal to the reference free capacity, storing first write data in a first memory region of the memory device by sequential write in response to the first write command, and storing second write data in a second memory region of the memory device by random write in response to the second write command.

According to an example embodiment of the present disclosure, a computing system includes a storage device and a host device. The storage device includes a memory device, a storage interface, and a storage controller. The host device includes a processor and a host interface connected to the storage interface. The processor executes a boot process by loading an operating system installed in a system partition of the memory device, activates a recall function of generating snapshot data and metadata obtained by capturing a screen displayed by an application executing on the host device, and transmits to the storage device a command sequence including a first write command instructing writing of the snapshot data, and a second write command instructing writing of the metadata to the storage device. The storage controller stores the snapshot data in a first memory region of the system partition by sequential write, stores the metadata in a second memory region of the system partition by random write, and prohibits migration of the metadata written in the second memory region.

Hereinafter, embodiments of the present disclosure will be described as below with reference to the accompanying drawings.

1 FIG. is a diagram illustrating a storage device according to an example embodiment.

1 FIG. 1 FIG. 10 10 In the example embodiments described with reference to, a storage devicemay be configured as a solid state drive (SSD) device. Referring to, the storage devicemay have a form factor in accordance with the M.2 standard and may communicate with an external host device, such as a central processing device, a system-on-chip, an application processor, or the like, in accordance with the PCI-Express protocol.

10 11 12 13 14 15 11 12 13 14 15 The storage devicemay include a storage controller, memory devices, a RAM device, a power circuit, and a system substrate. The storage controller, the memory devices, the RAM device, and the power circuitmay be electrically connected to each other by interconnection patterns formed on the system substrate.

15 16 16 10 10 10 1 FIG. The system substratemay include a connectorincluding a plurality of pins for connection with the host device. The number of the plurality of pins included in the connectorand arrangement thereof may vary depending on an interface defining a connection method between the storage deviceand the host device. In example embodiments, the storage devicemay communicate with an external host according to one of interfaces, such as a universal serial bus (USB), peripheral component interconnect express (PCI-Express), serial advanced technology attachment (SATA), or M-Phy for universal flash storage (UFS). For example, the storage deviceaccording to an example embodiment illustrated inmay communicate with the host device in accordance with the PCI-Express protocol.

10 16 14 10 11 12 13 16 The storage devicemay operate by power supplied from the host device through the connector. The power circuitof the storage devicemay be a power management integrated circuit (PMIC) generating internal voltages necessary for operation of the storage controller, the memory devices, and the RAM deviceusing external voltages supplied by the host device through the connector.

11 12 12 10 12 15 12 The storage controllermay write data in the memory devicesor may read data from the memory devicesin response to a command received from the host device. For example, the storage devicemay include a plurality of memory devicesmounted on the system substrate, and each of the plurality of memory devicesmay include one or more memory chips. Each of the memory chips may have nonvolatile properties such that the stored data may be maintained even when power is cut off, and may be configured as a NAND memory chip.

10 13 12 13 12 11 13 12 10 13 11 11 13 1 FIG. 1 FIG. The storage deviceaccording to an example embodiment illustrated inmay include a RAM deviceoperating as a buffer memory to alleviate a difference in speeds between the memory devicesin which data is stored and the host device. For example, the RAM devicemay be a dynamic random access memory (DRAM) and may operate as a cache memory and may provide a space for temporarily storing data in a control operation for the memory devices. In an example embodiment illustrated in, the storage controllermay further include a DRAM controller for controlling the RAM devicein addition to the NAND controller for controlling the memory devices. When the storage devicedoes not include the RAM device, a portion of a storage space of the RAM device included in the host device may be allocated to the storage controllerand the storage controllermay use the allocated storage space as the RAM device.

12 10 12 12 10 12 The P/E cycle and WAF of each of the memory devicesmay affect lifespan of the storage device. For example, in a write operation of storing data in the memory devices, a write operation targeting data of a larger capacity than a request from the host device may be executed. For example, when an operation of storing data of a small capacity received from the host device in the memory devicesby random write is frequently executed, a background operation such as garbage collection may be executed in the storage device, and accordingly, the WAF of the memory devicesmay increase.

10 10 Recently, as one of functions of an operating system operating a host device, a recall function of capturing a screen displayed by an application executing on a host device in the form of snapshot data, storing the captured snapshot data in the storage deviceand providing the data to a user has been suggested. The snapshot data generated by this function may generally have a small capacity of less than 1 MB, and may be stored in the storage devicetogether with metadata having a capacity of several tens of KB.

10 10 10 10 For example, the host device may instruct a write operation of storing snapshot data and metadata by random write operation to the storage device. Accordingly, while the recall function is activated, snapshot data and metadata may be continuously stored in the storage deviceby the random write operation, and accordingly, the WAF of the storage devicemay be increased and lifespan of the storage devicemay be reduced.

10 11 In an example embodiment, when the recall function is enabled in an operating system driving the host device, the host device may determine whether a write operation instructed to the storage deviceis a write operation for data generated by the recall function. For example, the storage controllermay determine whether data transmitted together with the write command is data generated by the recall function, based on a write command received from the host device.

11 12 10 10 The storage controllermay write snapshot data to the memory devicesby sequential write rather than random write when it is determined that a write operation instructed by the host device is a write operation for data generated by the recall function. Accordingly, the increase in WAF of the storage devicedue to activation of the recall function may be reduced, and reliability and lifespan of the storage devicemay be improved.

2 3 FIGS.and are block diagrams illustrating a computing system including a storage device according to an example embodiment.

2 FIG. 100 110 120 110 111 113 115 117 120 121 123 125 Referring to, a computing systemaccording to an example embodiment may include a host deviceand a storage device. The host devicemay include a processor, a host memory, a host interface, and a host storage. The storage devicemay include a storage controller, a memory device, and a storage interface.

110 120 120 110 120 110 120 110 115 120 125 The host devicemay be configured to supply power to the storage deviceand to control operation of the storage device, and may be implemented as a desktop computer, a laptop computer, a server, a smartphone, a tablet PC, or the like. The host deviceand the storage devicemay be connected to each other through a predetermined interface, and for example, the host deviceand the storage devicemay be connected to each other through an interface such as USB, PCI-Express, SATA, or M-Phy for UFS. The host devicemay include the host interfacesupporting the corresponding interface, and the storage devicemay include the storage interfacesupporting the corresponding interface.

111 110 100 111 111 113 117 120 111 The processorof the host devicemay control overall operation of the computing system. For example, the processormay be implemented as a general-purpose processor, a dedicated processor, or an application processor. The processormay include one or more cores, and may further include a separate controller for controlling the host memory, the host storage, and the storage device. In example embodiments, the processormay include an accelerator, which is a dedicated circuit for high-speed data operations such as an artificial intelligence (AI) data operation.

113 100 113 113 111 The host memorymay be used as a main memory device of the computing system, and may include a volatile memory such as static random access memory (SRAM) and/or DRAM. However, in example embodiments, the host memorymay include nonvolatile memory such as a flash memory, phase change random access memory (PRAM), and resistive random access memory (RRAM). In an example embodiment, the host memorymay be implemented as a single package with the processor.

117 113 117 113 117 111 115 111 The host storagemay be a device including a nonvolatile memory and may provide relatively large storage capacity as compared to the host memory. The host storagemay be implemented as a solid state drive (SSD) and/or an HDD (hard disk drive). The host memoryand the host storagemay be connected to the processorthrough the host interfaceand may operate in response to a command from the processor.

120 110 120 120 123 121 110 125 123 123 110 125 The storage devicemay be implemented to be separated from the host device, and the storage devicemay conform to a standard specification such as universal flash storage (UFS), embedded multi-media card (eMMC), or non-volatile memory express (NVMe). The storage devicemay include a memory deviceimplemented as a nonvolatile memory. The storage controllermay store data received from the host devicethrough the storage interfacein the memory device, and may read data stored in the memory deviceand transmit the data to the host devicethrough the storage interface.

3 FIG. 200 210 220 210 211 213 215 217 220 221 223 225 227 Referring to, a computing systemaccording to an example embodiment may include a host deviceand a storage device. The host devicemay include a processor, a host memory, a host interface, and a host storage. The storage devicemay include a storage controller, a memory device, a storage interface, and a RAM device.

200 227 100 227 221 223 223 227 221 223 221 223 221 223 227 220 3 FIG. 2 FIG. In the computing systemaccording to an example embodiment illustrated in, the components other than the RAM devicemay be similar to the computing systemaccording to an example embodiment described with reference to. The RAM devicemay be connected between the storage controllerand the memory device, and may be implemented as a memory having a faster operating speed than that of the memory device, such as DRAM, PRAM, or RRAM. By connecting the RAM devicebetween the storage controllerand the memory device, degradation in data transmission speed occurring between the storage controllerand the memory devicemay be alleviated. Alternatively, by loading data required for the storage controllerto control the memory deviceinto the RAM device, performance of the storage devicemay be improved.

110 210 123 223 120 220 123 223 In an example embodiment, the host devicesandmay operate by an operating system loaded during a boot process, and the operating system may be installed in memory devicesandof the storage devicesand. In example embodiments, the memory devicesandmay include one or more partitions, and the partition in which the operating system is installed may be defined as a system partition.

120 220 110 210 120 220 110 210 In an example embodiment, the operating system installed in the storage devicesandmay support a recall function of capturing data displayed by an application executing in the host devicesandand storing the data in the storage devicesand. For example, the data generated by the recall function may include first write data and second write data having capacity smaller than capacity of the first write data. The first write data may be snapshot data generated by capturing a screen displayed by an application executing on the host devicesand, and the second write data may be metadata.

110 210 123 223 123 223 120 220 The first write data may have capacity of tens to hundreds of KB, and the second write data may have capacity of several to tens of KB. The host devicesandin which the recall function is activated may generate a first write command to write the first write data in the memory devicesand, and a second write command to write the second write data in the memory devicesand, and may transmit the commands to the storage devicesand.

121 221 120 220 120 220 120 220 121 221 110 210 121 221 When the storage controllerorexecutes the entirety of write operations executed in response to the first write command and the second write command by random write, the number of times background operations, such as garbage collection, are executed in the storage deviceormay increase, and accordingly, the WAF of the storage deviceormay increase. In an example embodiment, an increase in the WAF of the storage deviceormay be reduced by executing the first write operation executed in response to the first write command by the storage controllerorby sequential write rather than random write. For example, even when the first write command received from the host deviceorinstructs random write, the storage controllerormay write the first write data in the system partition by sequential write.

110 210 The first write data and the second write data generated by the recall function may be stored in the recall space included in the system partition in which the operating system is installed. The host devicesandmay determine whether to activate the recall function depending on capacity of a free space of the system partition.

4 FIG. is a diagram illustrating operations of a computing system according to an example embodiment.

4 FIG. 300 310 300 310 310 300 Referring to, the computing system according to an example embodiment may include a host deviceand a storage device. As described above, the host deviceand the storage devicemay be connected to each other by an interface such as PCI-Express, USB, SATA, M-Phy for UFS, or the like, and the storage devicemay store data or may output stored data in response to a control command received from the host device.

300 310 310 An operating system operating the computing system including the host devicemay be installed in the storage device. A memory device included in the storage devicemay be logically divided into a plurality of partitions, in example embodiments, and a partition in which the operating system is installed may be defined as a system partition.

300 10 300 310 11 300 When the computing system is powered on, the host devicemay start booting (S). When the boot process starts, the host devicemay load the operating system installed in the system partition of the storage device(S). The loaded operating system may be loaded into a storage space defined as the main memory of the host device, such as DRAM.

300 300 310 12 310 300 300 12 13 When the operating system is loaded, the host devicemay execute various applications supported by the operating system in response to an instruction from a user. For example, the operating system operating the computing system may support a recall function of capturing and storing a screen displayed on a display of the computing system by an application executed in the host device. When the computing system is booted, the operating system may transmit a request for confirmation of free space of the system partition to the storage deviceto determine whether to activate the recall function (S). The storage controller of the storage devicemay transmit free space information of the system partition in which the operating system is installed to the host devicein response to the request received from the host devicein operation S(S).

300 14 14 300 15 300 310 16 14 300 18 The host devicemay determine whether the free space of the system partition is sufficient (S). When the free space is determined to be sufficient in operation S(YES), the recall function may be activated by the operating system running on the host device(S). As the recall function is activated, the host devicemay capture the screen displayed on the display by the application currently executing at a predetermined time interval and may generate recall data. The generated recall data may be transmitted to the storage deviceby a write command of a specific sequence (S). When the free space of the system partition is determined to be insufficient in operation S(NO), the operating system running on the host devicemay deactivate the recall function (S).

310 16 17 310 The storage devicereceiving the write command in a specific sequence in operation Smay store the recall data generated by the recall function (S). In an example embodiment, the recall data may include snapshot data generated by capturing a screen displayed on a display of the computing system, and metadata. The metadata may include data for managing the snapshot data, and may include, for example, mapping information used to convert a logical address into a physical address in a system partition of the storage device.

The snapshot data may be data corresponding to an image captured from a screen displayed on a display. For example, the snapshot data may include image data captured from a screen, or data converted into text by applying optical character recognition (OCR) to the captured image of the screen. The snapshot data may generally have capacity greater than the metadata.

16 310 310 16 310 310 300 310 The write command transmitted in operation Sto store the recall data generated by the recall function in the storage devicemay include a first write command for writing the snapshot data, and a second write command for writing the metadata in sequence. In example embodiments, a flush command transmitted to the storage deviceafter the second write command may be further included in the write command transmitted in operation S. The flush command may be a command instructing a flush operation to move data stored in a RAM device in the storage deviceor a host memory allocated and used by the storage devicefrom the host deviceto a nonvolatile memory device in the storage device.

16 The storage controller may determine whether the write command received in operation Sincludes a first write command instructing a first write operation for the first write data having capacity of tens to hundreds of KB, a second write command instructing a second write operation for the second write data having capacity of several to tens of KB, and a flush command instructing a flush operation in sequence. The first write data may be the snapshot data described above, and the second write data may be the metadata described above.

16 16 When the write command received in operation Sincludes the first write command, the second write command, and the flush command in sequence, the storage controller may determine that the first write data and the second write data to be written by the write command received in operation Sare recall data generated by the recall function. When the first write data and the second write data are determined to be recall data, the storage controller may execute a sequential write operation to write the first write data in a first memory region, and may execute a random write operation and may write the second write data in a second memory region

310 Each of the first memory region and the second memory region may be a region defined in a nonvolatile memory device included in the storage device. For example, the first memory region may be a memory region controlled by one of multilevel cell (MLC), triple level cell (TLC), and quad level cell (QLC) methods, and the second memory region may be a memory region controlled by a single level cell (SLC) method.

300 310 16 310 310 Generally, data transmitted from the host deviceto the storage devicealong with a write command may be preferentially stored in the second memory region operating as a buffer region and may move to the first memory region by a migration policy. However, when the recall function is activated, the write command in operation Smay be transmitted to the storage deviceat an interval of several seconds to several tens of seconds, and the write operation may be executed. Accordingly, when the method of preferentially storing the first write data in the second memory region and moving the data to the first memory region is adopted, the WAF may significantly increase due to the background operation of the storage device, such that lifespan and/or reliability may deteriorate.

300 310 In an example embodiment, based on the command sequence of the write command transmitted from the host device, it may be determined whether the data to be written by the write command is recall data, and when it is determined that the data is recall data, the first write data, which is snapshot data having relatively large capacity, may be written directly in the first memory region. Accordingly, the number of times the background operation of the storage deviceis executed may be reduced such that the increase in WAF may be reduced.

300 310 Also, in an example embodiment, regardless of the instruction from the host device, the write operation of writing the first write data in the first memory region may be executed in a sequential write manner. Accordingly, by reducing the number of times the background operation, such as garbage collection, is executed, degradation of lifespan and/or reliability occurring on the storage devicewhile the recall function is enabled may be effectively reduced.

5 7 FIGS.to are diagrams illustrating operations of a storage device according to an example embodiment.

5 7 FIGS.to 5 7 FIGS.to 5 7 FIGS.to 400 400 410 420 may be drawings illustrating whether a recall function is activated according to free space of a system partition in which an operating system is installed. The memory devicedescribed with reference tomay be a nonvolatile memory device included in a storage device. In the example embodiment described with reference to, the memory devicemay be divided into a first partitionand a second partition.

410 411 420 411 410 The first partitionmay be a system partition in which an operating systemis installed, and the second partitionmay be a partition used as a storage space for data. When a computing system including a storage device is booted, the operating systeminstalled in the first partitionmay be loaded into a main memory of the host device and may operate the computing system.

411 413 410 413 410 411 410 410 413 411 410 410 410 After the operating systemis loaded, the host device may determine whether to activate the recall function by checking capacity of the free spaceof the first partition. The free spaceof the first partitionmay be a space in which the operating systemis not installed. For example, a reference free capacity required to activate the recall function may vary depending on the total capacity of the first partition. For example, when the total capacity of the first partitionis 256 GB, the reference free capacity may be 50 GB. In other words, when the free spaceis 50 GB or more, the recall function may be activated in the operating systemloaded on the host device. When the total capacity of the first partitionis 512 GB, the reference free capacity may be 100 GB, and when the total capacity of the first partitionis 1 TB or more, the reference free capacity may be 175 GB. However, the reference free capacity may vary in example embodiments, and for example, when the total capacity of the first partitionis 256 GB, the reference free capacity may be determined to be less than 50 GB.

415 410 417 415 417 When the recall function is activated, the storage controller may define a recall spacein the first partitionto store recall datain response to a recall function activation notification from the host device. The capacity of the recall spacemay be determined by the reference free capacity. The host device may generate recall dataonce every few seconds to tens of seconds and transmit the data to the storage device.

417 417 419 6 FIG. The recall datamay include snapshot data and metadata. The snapshot data may include image data captured from a screen displayed by an executing application, text data extracted from the image data captured by the screen, or the like, as described above. As the recall datais stored, a capacity of the remaining spacemay gradually decrease as illustrated in.

419 413 410 413 419 413 410 410 When the capacity of the remaining spacedecreases, the host device may deactivate the recall function. For example, when the capacity of the free spacein the first partitionbecomes smaller than a predetermined minimum free capacity, the host device may deactivate the recall function. The total capacity of the free spacemay include the capacity of the remaining space. When the capacity of the free spaceincreases more than the resume reference space, which is greater than the minimum free capacity, while the recall function is deactivated, the recall function may be reactivated. In an example embodiment, the minimum free capacity may be determined as approximately 10% of the total capacity of the first partition. For example, when the total capacity of the first partitionis 256 GB, the minimum free capacity is 25 GB, and the resume reference capacity required to reactivate the deactivated recall function may be 30 GB. For example, the resume free capacity may be greater than the minimum free capacity.

8 FIG. is a diagram illustrating operations of a computing system according to an example embodiment.

8 FIG. 500 510 500 510 510 500 Referring to, a computing system according to an example embodiment may include a host deviceand a storage device. The host deviceand the storage devicemay be connected to each other by an interface such as PCI-Express, USB, SATA, or M-Phy for UFS, and the storage devicemay store data or may output stored data in response to a control command received from the host device.

500 20 500 510 The host devicemay activate a recall function (S). As described above, when the recall function is activated, recall data captured by an application executing in the host devicemay be generated and the recall data may be stored in the storage device. The recall data may include image data captured by the screen, and text data extracted from the image data captured by the screen.

500 510 21 510 500 22 22 500 510 21 The host devicemay transmit a control command to the storage device(S). The storage controller of the storage devicemay determine whether the transmission order of the control command received from the host devicematches a specific command sequence (S). Operation Smay include determining whether the control command transmitted from the host deviceto the storage devicein operation Sis a control command for storing recall data.

For example, the control command for storing recall data may include a first write command instructing a first write operation for writing first write data, a second write command instructing a second write operation for writing second write data, and a flush command instructing a flush operation in sequence. The first write data may be snapshot data and the second write data may be metadata, and accordingly, capacity of the first write data may be greater than capacity of the second write data.

500 510 510 500 21 However, in example embodiments, the host devicemay directly inform the storage devicethat the control command is for storing recall data. In this case, the storage devicemay determine, instead of the command sequence, whether the control command received from the host devicein operation Sincludes a command instructing storing the recall data.

22 510 21 21 28 510 As a result of determination in operation S, when the transmission order of the control command received by the storage devicein operation Sdoes not match the command sequence, the storage controller may determine that the control command received in operation Sis not a control command for storing recall data. Accordingly, the storage controller may write the write data received together with the control command to the buffer region (S). The buffer region may be a region controlled in an SLC method, and the write data written in the buffer region may be moved to another region later according to the migration policy of the storage device.

22 500 510 23 23 23 510 500 21 28 As a result of determination in operation S, when the transmission order of the control command received from the host deviceto the storage devicematches the command sequence, the storage controller may further determine whether the number of times the control command is received in the transmission order matching the command sequence is equal to or greater than a reference number (S). The reference number in operation Smay be, for example, 3. When the number of times the control command is received in the transmission order matching the command sequence in operation Sis less than the reference number, the storage devicemay determine that the control command received from the host devicein operation Sis not a control command for storing recall data. Accordingly, the storage controller may write the write data received together with the control command in the buffer region (S).

23 500 24 When the number of times the control command is received in the transmission order matching the command sequence in operation Sis equal to or greater than the reference number, the storage controller may determine that the control command received from the host deviceinstructs storing of recall data. The storage controller may define a recall space in the system partition of a nonvolatile memory device included in the storage device, and may divide the recall space into a first memory region and a second memory region (S).

The storage controller may write 2 or more bits of data to each of a plurality of first memory cells included in the first memory region, and may write 1 bit of data to each of a plurality of second memory cells included in the second memory region. Accordingly, the first memory region may operate in one of the MLC, TLC, and QLC methods, and the second memory region may operate in the SLC method.

500 25 500 500 The storage controller may store the first write data corresponding to the snapshot data among the recall data in the first memory region by sequential write in response to the first write command received from the host device(S). The host devicemay also designate the write method of the first write data as random write in the first write command instructing storing of the first write data, which is the snapshot data. However, in an example embodiment, regardless of whether the host devicedesignates the write method of the first write data as random write, the storage controller may write the first write data in the first memory region by sequential write.

500 26 27 510 500 500 Thereafter, the storage controller may store the second write data corresponding to the metadata among the recall data to the second memory region by random write in response to the second write command received from the host device(S). Thereafter, the storage controller may execute a flush operation (S) of moving data stored in a RAM device in the storage device, and/or a host memory allocated from the host deviceto a nonvolatile memory device in response to a flush command received from the host device.

500 500 As described above, in an example embodiment, the storage controller may determine whether an operation instructed by a control command transmitted from the host deviceis an operation instructing the writing of recall data. The storage controller may determine whether a control command instructing the writing of recall data is received from the host deviceusing a unique command sequence appearing in the control command instructing the writing of recall data.

500 510 When it is determined that a control command instructing the writing of recall data is received, the storage controller may directly write first write data corresponding to snapshot data in the first memory region in a sequential write manner, regardless of the instruction of the host device. In other words, the first write data may be written directly to the first memory region without going through the second memory region, which may operate in the SLC method and may function as a buffer region. Accordingly, the background operation for moving the first write data written in the second memory region to the first memory region may not be performed, and the increase in WAF of the storage devicedue to activation of the recall function may be reduced.

500 510 Also, even when the host deviceinstructs the writing of the first write data by random write, in an example embodiment, the storage controller may write the first write data by sequential write. Accordingly, the number of times background operations, such as garbage collection, are executed may be reduced, and the increase in WAF of the storage devicemay be suppressed and lifespan and reliability may be improved.

9 FIG. is a diagram illustrating operations of a computing system according to an example embodiment.

9 FIG. 600 610 620 610 611 615 620 621 623 625 627 Referring to, a computing systemaccording to an example embodiment may include a host deviceand a storage device. The host devicemay include a processorand a host interface, and the storage devicemay include a storage controller, a memory device, a storage interface, and a RAM device.

611 615 620 621 625 623 627 621 621 625 620 610 623 When the processortransmits a control command through the host interfaceto the storage device, the storage controllermay receive the control command through the storage interface, and may control the memory deviceand the RAM devicein response to the received control command. Also, the storage controllermay execute a background operation autonomously even when the storage controllerdoes not receive a control command through the storage interface. The background operation executed on the storage devicewithout intervention of the host devicemay include operation of redistributing a storage space of data stored in the memory device, such as garbage collection.

610 623 610 623 623 As described above, the host devicemay load the operating system installed in the memory deviceand may perform the boot process, and when the boot process is completed, the host devicemay determine whether to activate the recall function based on the free space of the memory device. For example, whether to activate the recall function may be determined based on the capacity of the free space of the system partition in which the operating system is installed in the memory device.

610 620 600 When the capacity of the free space of the system partition is determined to be sufficient and the recall function is activated, the host devicemay generate recall data once every several seconds to several tens of seconds and transmit the recall data to the storage device. The recall data may include snapshot data, metadata, or the like, generated by capturing a screen displayed on a display by an application executing in the computing system.

610 631 620 633 620 633 635 620 For example, the host devicemay first transmit a first write commandinstructing writing of snapshot data to the storage device, and may transmit a second write commandinstructing writing of metadata to the storage device. After the second write commandis transmitted, a flush commandinstructing a flush operation may be transmitted to the storage device.

631 633 623 Each of the first write commandand the second write commandmay instruct random write of each of the snapshot data and the metadata. Also, the snapshot data and the metadata may be stored in a buffer region controlled by the SLC method in the memory device, and may be moved to another memory region controlled by at least one of the MLC, TLC, and QLC methods in accordance with a migration policy.

620 620 610 620 620 However, when the snapshot data and the metadata are stored in the above manner, the number of times the storage deviceexecutes a background operation may significantly increase. As described above, the background operation may be an operation executed in the storage devicewithout intervention of the host device. When the snapshot data and the metadata are stored in the buffer region by random write and are moved and stored in another memory region according to the migration policy, the number of times the storage deviceexecutes a background operation may inevitably increase, and accordingly, the WAF of the storage devicemay increase and lifespan and reliability may deteriorate.

620 610 630 610 630 631 633 635 621 631 633 635 630 9 FIG. According to an example embodiment, the storage devicemay determine whether a control command received from the host deviceis a control command generated by the recall function based on a command sequence, which is the order in which the control commands are received from the host device. For example, as illustrated in, when the command sequencein which the first write command, the second write command, and the flush commandare transmitted in sequence is repeated more than a predetermined reference number, the storage controllermay determine that control commands,andincluded in the command sequenceare generated by the recall function. In an example embodiment, the reference number may be 3.

631 633 635 630 621 631 633 635 631 633 631 633 621 631 633 635 630 To determine whether the control commands,andincluded in the command sequenceare generated by the recall function, the storage controllermay refer to the transmission order of the control commands,and, the capacity of the first write data instructed by the first write commandto be written, and the capacity of the second write data instructed by the second write commandto be written. For example, the first write data may correspond to snapshot data and may have capacity of tens to hundreds of KB, for example, capacity of 10 KB to 500 KB. The second write data may correspond to metadata and may have capacity of several tens to KB, for example, capacity of 4 KB to 12 KB. When the capacity of the first write data received together with the first write commandand the capacity of the second write data received together with the second write commandmatch the above range, the storage controllermay determine that the control commands,andincluded in the command sequencewere generated by the recall function.

620 631 633 635 630 Also, the storage devicemay refer to the capacity of the free space of the system partition to determine whether the control commands,andincluded in the command sequenceare generated by the recall function. As described above, the recall function may be activated only when the capacity of the free space of the system partition is greater than a predetermined capacity.

610 For example, when the total capacity of the system partition is 256 GB, the recall function may be activated when the capacity of the free space is greater than 50 GB, and the recall function may be deactivated when the capacity of the free space is less than 25 GB. In the above condition, 50 GB may be defined as a reference free capacity determining whether the recall function is activated after booting of the host device, and 25 GB may be defined as the minimum free capacity determining whether the recall function is suspended after being activated.

In an example embodiment, after the capacity of the free space of the system partition decreases below the minimum free capacity and the recall function is deactivated, when the capacity of the free space of the system partition increases again above the resume reference capacity, the recall function may be activated again. When the total capacity of the system partition is 256 GB, the resume reference capacity may be 30 GB.

621 610 610 630 631 633 635 610 623 The storage controllermay determine whether the recall function is activated in the host deviceby referring to the capacity of the free space of the system partition. When it is determined that the recall function is in a deactivated state in the host device, even when a command sequenceincluding a first write command, a second write command, and a flush commandin sequence is received from the host device, the first write data and the second write data may be written in the memory devicein random write manner.

621 630 631 633 635 621 623 631 633 For example, when the remaining capacity of the recall space allocated to store the recall data in the system partition is less than the minimum free capacity, the storage controllermay determine that the command sequenceincluding a first write command, a second write command, and a flush commandin sequence is not a command for writing the recall data. Accordingly, the storage controllermay write the first write data and the second write data in the memory deviceaccording to instructions of the first write commandand the second write command. For example, the first write data and the second write data may be written by random write in the buffer region controlled by the SLC method.

610 621 623 623 When the recall function is determined to be activated in the host device, the storage controllermay write the first write data in the first memory region of the memory deviceby sequential write, and the second write data may be written in the second memory region of the memory deviceby random write. The first memory region may be controlled by one of the MLC, TLC, and QLC methods, and the second memory region may be controlled by the SLC method.

630 631 633 635 610 621 623 623 621 623 623 In an example embodiment, when the command sequenceincluding the first write command, the second write command, and the flush commandis received three or more times from the host devicein sequence, the capacity of the first write data is tens to hundreds of KB and the capacity of the second write data is several to tens of KB, and the capacity of the free space of the system partition is larger than the reference free capacity which may activate the recall function, the storage controllermay write the first write data in the memory deviceby sequential write and the second write data in the memory deviceby random write. Even when the first write command instructs random write, the storage controllermay write the first write data received together with the first write command to the memory deviceby sequential write when the above conditions are satisfied. Accordingly, the number of times garbage collections to be executed may be reduced by writing the first write data, which is the snapshot data generated by the recall function, in the memory deviceby sequential write.

621 620 In an example embodiment, the storage controllermay directly write the first write data in the first memory region controlled by one of the MLC, TLC, and QLC methods, which may indicate that the first write data is written directly in the first memory region without passing through the buffer region controlled by the SLC method. Accordingly, as compared to the method of first writing the first write data in the buffer region and later moving the first write data in the first memory region by the migration policy, the number of times the background operation is executed in the storage devicemay be reduced.

610 610 620 620 In an example embodiment, when the write data received from the host devicealong with the write command is determined as the recall data, by writing the first write data corresponding to the snapshot data among the write data in the first memory region by sequential write, the number of times the background operation including the garbage collection is executed may be reduced. Accordingly, while the recall function is activated on the host device, the WAF increase on the storage devicemay be reduced, and lifespan, reliability of the storage devicemay be improved.

10 FIG. is a diagram illustrating operations of a storage device according to an example embodiment.

10 FIG. 5 7 FIGS.to 10 FIG. 700 700 410 710 700 710 720 730 is a drawing roughly illustrating a system partitiondefined in a memory device of a storage device according to an example embodiment. The system partitionmay correspond to each of the first partitionsof. Referring to, an operating systemmay be installed in the system partition, and the remaining space after the operating systemis installed may be defined as a storage spaceand a recall space.

710 700 700 730 700 Whether to activate the recall function in the host device connected to the storage device may be determined depending on the capacity of the remaining space after the operating systemis installed in the system partition. For example, when the capacity of the free space is greater than the reference free capacity determined according to the total capacity of the system partition, the recall function may be activated. When the recall function is activated, a recall spacemay be defined in the system partition.

700 700 700 700 The reference free capacity may be determined as approximately 20% of the total capacity of the system partition. For example, when the total capacity of system partitionis 256 GB, the reference free capacity may be 50 GB, when the total capacity of system partitionis 512 GB, the reference free capacity may be 100 GB, and when the total capacity of system partitionis 1 TB or more, the reference free capacity may be 175 GB.

710 720 730 720 730 When the capacity of the remaining space after the operating systemis installed is greater than or equal to the reference free capacity, as the recall function is activated, the storage spaceand the recall spacemay be defined. For example, the storage spaceand the recall spacemay be logically separated in free space.

10 FIG. 730 731 733 731 733 731 733 733 731 Referring to, the recall spacemay include a first memory regionand a second memory region. The first memory regionand the second memory regionmay be logically separated regions. A plurality of first memory cells included in the first memory regionmay store more than 2 bits of data, and a plurality of second memory cells included in the second memory regionmay store 1 bit of data. In other words, each of the plurality of first memory cells may operate by one of the MLC, TLC, and QLC methods, and each of the plurality of second memory cells may operate by the SLC method. In example embodiments, the capacity of the second memory regionmay be equal to or less than the capacity of the first memory region.

731 733 731 733 731 The storage controller may distinguish snapshot data and metadata generated by the recall function and may store the data in the first memory regionand the second memory region. For example, the snapshot data may be stored in the first memory regionby sequential write, and the metadata may be stored in the second memory regionby random write. By storing the snapshot data in the first memory regionby sequential write, the number of times the background operation including garbage collection is executed may be reduced, and the increase in WAF of the storage device may be effectively suppressed.

733 731 733 The second memory regionmay be defined as a spare region, differently from the first memory regionin which the snapshot data is stored. Metadata having capacity smaller than that of snapshot data may be written in a meta region included in the second memory regionby random write. For example, the meta region may have capacity of several hundred MB.

700 700 700 The recall function may be deactivated according to the remaining capacity of the system partition. For example, when the remaining capacity of the system partitionbecomes smaller than a predetermined minimum free capacity, the recall function may be deactivated. The deactivated recall function may be reactivated when the remaining capacity of the system partitionincreases to the resume reference capacity or more. The resume reference capacity may be larger than the minimum free capacity.

11 11 12 FIGS.A,B and are diagrams illustrating operations of a storage device according to an example embodiment.

11 FIG.A 11 FIG.B 11 FIG.A 11 FIG.B 1 3 1 3 1 3 andare drawings illustrating the method by which snapshot data SD-SDare stored in a state in which the recall function is activated.is a drawing illustrating an operation of writing snapshot data SD-SDin a random write manner, andis a drawing illustrating an operation of writing snapshot data SD-SDin a sequential write manner.

1 3 1 3 1 3 11 FIG.A In a state in which the recall function is activated, the host device may generate the snapshot data SD-SDat intervals of several seconds to tens of seconds and may transmit the data to the storage device together with a write command. The host device may transmit the snapshot data SD-SDto the storage device together with a write command by setting random write as a default. The operation when writing snapshot data SD-SDin a random write manner may be the same as.

11 FIG.A 1 1 1 2 2 2 3 3 3 1 3 Referring to, the first snapshot data SDmay be written to a first storage space corresponding to a region between a first start logical address LBA_Sand a first end logical address LBA_E. The second snapshot data SDmay be written to a second storage space corresponding to a region between a second start logical address LBA_Sand a second end logical address LBA_E, and the third snapshot data SDmay be written to a third storage space corresponding to a region between a third start logical address LBA_Sand a third end logical address LBA_E. The sizes of the snapshot data SD-SDmay be different from each other, and accordingly, capacities of the first to third storage spaces may also be different from each other.

11 FIG.A 2 1 1 3 2 2 As illustrated in, the first storage space and the second storage space may partially overlap each other, and the second storage space and the third storage space may also partially overlap each other. For example, the second start logical address LBA_Smay be an address between the first start logical address LBA_Sand the first end logical address LBA_E, and the third start logical address LBA_Smay be an address between the second start logical address LBA_Sand the second end logical address LBA_E. In an example embodiment, the capacity in which the first storage space and the second storage space overlap, and the capacity in which the second storage space and the third storage space overlap, may be 4 KB.

1 3 1 3 In an example embodiment, a write operation of writing the snapshot data SD-SDby random write instructed from a host device in which the recall function is activated may be executed in a manner in which a portion of consecutive storage spaces overlap, not by completely random write. By this random write, 4 KB of storage space may be ensured each time a piece of the snapshot data SD-SDis written. Consequently, the frequency of the background operations of the storage device may increase, such that the WAF may increase.

1 3 1 1 1 2 2 2 3 3 3 11 FIG.B In an example embodiment, the snapshot data SD-SDmay be written by sequential write regardless of the random write instructed by the host device in which the recall function is activated. Referring to, the first snapshot data SDmay be written to the first storage space corresponding to the region between the first start logical address LBA_Sand the first end logical address LBA_E. The second snapshot data SDmay be written in the second storage space corresponding to the region between the second start logical address LBA_Sand the second end logical address LBA_E, and third snapshot data SDmay be written in the third storage space corresponding to the region between the third start logical address LBA_Sand the third end logical address LBA_E.

2 1 3 2 1 3 The second start logical address LBA_Smay be the address immediately following the first end logical address LBA_E, and the third start logical address LBA_Smay be the address immediately following the second end logical address LBA_E. By writing the snapshot data SD-SDby sequential write, the number of times the background operation including garbage collection are executed may be reduced, and the increase in WAF of the storage device may be suppressed.

12 FIG. 12 FIG. 12 FIG. 1 6 is a diagram illustrating a method of storing data in each of a first memory region and a second memory region, logically separated from each other in a recall space in which recall data is stored. Referring to, snapshot data SD-SDmay be written in the first memory region in a sequential write manner, and metadata MD may be written in the second memory region in a random write manner. Accordingly, as illustrated in, the metadata MD may be written multiple times in a portion of a logical address of the second memory region.

13 FIG. is a diagram illustrating an operation method of a storage device according to an example embodiment.

13 FIG. 30 Referring to, an operation method of a storage device according to an example embodiment may start with checking, by a storage controller, a system partition in which an operating system is installed (S). For example, the storage device may be included in a computing system together with an external host device, and an operating system may be installed in a system partition of a memory device included in the storage device. For example, the host device may load the operating system stored in the system partition of the storage device and may execute a boot process.

31 32 32 The storage controller may check the remaining capacity of the system partition (S), and may determine whether the remaining capacity of the system partition is sufficient by comparing the remaining capacity of the system partition with a predetermined reference free capacity, for example (S). In operation S, when the remaining capacity of the system partition is equal to or greater than the reference free capacity, it may be determined that the remaining capacity of the system partition is sufficient. For example, under the condition in which the remaining capacity of the system partition is equal to or greater than the reference free capacity, the host device may activate a recall function of generating recall data at an interval of several seconds to several tens of seconds, and a recall space in which recall data is stored in the system partition of the storage device may be defined depending on activation of the recall function.

33 33 The storage controller may control the storage device in response to a control command received from the host device. The storage controller may determine whether the control command received from the host device corresponds to a predetermined command sequence (S). For example, when a first write command and a second write command are included in the command sequence in order, the capacity of the first write data, which is a write target of the first write command, is greater than the capacity of the second write data, which is a write target of the second write command, and each of the first write command and the second write command instructs random write, the storage controller may determine that the control command received from the host operation corresponds to the command sequence, which is the determination criterion of operation S.

33 In example embodiments, a flush command transmitted after the second write command may be included in the command sequence. Also, in example embodiments, the storage controller may further determine whether the number of times receiving the control command according to the command sequence, which is the determination criterion of operation S, is equal to or greater than the reference number.

33 34 34 When the result of determination in operation Sis positive, the storage controller may determine whether the first write command satisfies the first condition (S). The first condition, which is the determination criterion of the operation S, may include whether a first logical address pointed to by the first write command belongs to the recall space, and may include, for example, whether the first logical address points to the first memory region in which snapshot data is stored in the recall space. In example embodiments, the first condition may include whether the first logical addresses pointed to by the first write commands received in sequence by the storage controller from the host device overlap each other.

34 35 35 When the result of determination in operation Sis positive, the storage controller may determine whether the second write command satisfies the second condition (S). The second condition in which is the determination criterion of operation Smay include whether a second logical address pointed to by the second write command belongs to the recall space, and for example, the second condition may include whether the second logical address points to the second memory region in which metadata is stored in the recall space.

32 35 32 35 36 When the result of determination in each of operations Sto Sis positive, the storage controller may determine that the first write command and the second write command received from the host device command the writing of recall data. In response to the positive determinations of operations Sto S, the storage controller may store the first write data, which is snapshot data, in the first memory region by sequential write, and may store the second write data, which is metadata, in the second memory region by random write (S). In example embodiments, migration may be prohibited for metadata written in the second memory region.

32 35 37 37 When the result of determination in at least one of operations Sto Sis negative, the storage controller may write each of the first write data and the second write data in a buffer region (S). The buffer region may be logically separated from the first memory region and the second memory region, and may include memory cells operating in the SLC method. In operation S, the first write data and the second write data stored in the buffer region may be moved and stored in memory cells operating by one of the MLC, TLC, and QLC methods according to the migration policy.

32 35 33 32 34 35 32 The execution order of operations Sto Smay vary in example embodiments. For example, after the determination in operation Sis completed, operation Sof determining whether the remaining capacity of the system partition is sufficient may be executed. Also, operation Sand operation Sof performing determination on each of the first write command and the second write command may be executed before operation Sof checking the remaining capacity of the system partition.

14 15 FIGS.and are diagrams illustrating a memory device included in a storage device according to an example embodiment.

14 FIG. 1 FIG. 2 FIG. 3 FIG. 5 7 FIGS.- 9 FIG. 14 FIG. 800 810 800 12 123 223 400 623 810 820 820 820 821 821 821 Referring to, a memory deviceaccording to an example embodiment may include a plurality of memory dies. The memory devicemay correspond to the memory devicesof, the memory deviceof, the memory deviceof, the memory deviceof, or the memory deviceof. Each of the plurality of memory diesmay include a plurality of memory planes, and each of the plurality of memory planesmay operate individually. Referring to, each of the plurality of memory planesmay include a cell region (or a cell array)in which memory cells are disposed, and a peripheral circuit region controlling the cell region. In an example embodiment, the memory cells may be disposed in the cell regionin the form of a three-dimensional memory cell array.

822 823 824 825 822 824 825 824 825 822 The peripheral circuit region may include a page buffer circuit, a data input/output circuit, a row decoder, and a control logic circuit. The page buffer circuitmay be connected to the memory cells through a plurality of bitlines BL. The row decodermay be connected to the memory cells through a plurality of wordlines WL, a plurality of ground select lines GSL, a plurality of string select lines SSL, and a plurality of common source lines CSL. The control logic circuitmay control the row decoderand may determine at least one selected memory cell among the memory cells. The control logic circuitmay control the page buffer circuitand may execute a program operation and a read operation for the selected memory cell.

822 823 800 823 The page buffer circuitmay include a plurality of page buffers connected to the plurality of bitlines BL, and the plurality of bitlines BL and the plurality of page buffers may correspond to each other. For example, one page buffer may be connected to one bitline BL. Data received from an external host through the data input/output circuitmay be stored in the memory cells through the page buffers, and data read from the memory cells by the page buffers may be output to a storage interface of the storage device including the memory devicethrough the data input/output circuit.

15 FIG. 1 8 1 8 11 21 31 12 22 32 13 23 33 A memory cell array MCA illustrated inmay include a plurality of memory cells MC-MCdisposed in a three-dimensional structure. The plurality of memory cells MC-MCmay be stacked in a vertical direction (Z-axis direction) and may provide a plurality of NAND strings NS, N, N, N, N, N, N, Nand NS, and the vertical direction may be a direction perpendicular to the upper surface of a substrate.

15 FIG. 15 FIG. 11 21 31 12 22 32 13 23 33 1 3 11 21 31 12 22 32 13 23 33 1 8 11 21 31 12 22 32 13 23 33 1 8 1 8 Referring to, the plurality of NAND strings NS, N, N, N, N, N, N, Nand NSmay be connected between the bitlines BL-BLand a common source line CSL in the vertical direction. Each of the plurality of NAND strings NS, N, N, N, N, N, N, Nand NSmay include a string select transistor SST, a plurality of memory cells MC-MCand a ground select transistor GST. In, each of the plurality of NAND strings NS, N, N, N, N, N, N, Nand NSmay include eight memory cells MC-MC, but the number of memory cells MC-MCmay vary.

1 3 1 8 1 8 1 8 1 3 1 3 The string select transistor SST may be connected to corresponding string select lines SSL-SSL. The plurality of memory cells MC-MCmay be connected to corresponding wordlines WL-WL, respectively. In example embodiments, at least one of the wordlines WL-WLmay be provided as a dummy wordline. The ground select transistor GST may be connected to corresponding ground select lines GSL-GSL. The string select transistor SST may be connected to corresponding bitlines BL-BL, and the ground select transistor GST may be connected to the common source line CSL.

1 3 1 3 1 3 1 3 1 8 1 3 15 FIG. 15 FIG. Memory cells disposed at the same level may be commonly connected to one wordline in the vertical direction, and at least a portion of the ground select lines GSL-GSLand the string select lines SSL-SSLmay be separated from each other. For example, in an example embodiment illustrated in, the string select lines SSL-SSLand the ground select lines GSL-GSLdisposed at the same level may be separated from each other. In, the memory cell array MCA may be connected to eight wordlines WL-WLand three bitlines BL-BL, but the present invention is not limited thereto.

15 FIG. 821 820 820 820 810 820 820 A memory cell array MCA having a three-dimensional structure as illustrated inmay be included in the cell regionof each of the memory planes. As described above, each of the memory planesmay operate individually, and for example, a portion of the memory planesincluded in one memory diemay operate by an SLC method, and the other may operate by MLC, TLC, QLC methods. When a recall function is activated in a host device connected to a storage device, a memory planeoperating by an MLC, TLC, QLC method may be allocated as a first memory region in which snapshot data is written by sequential write, and a memory planeoperating in an SLC method may be allocated as a second memory region in which metadata is written by random write.

820 820 810 In example embodiments, a first memory region in which snapshot data is written by sequential write, and a second memory region in which metadata is written by random write may be defined in a single memory plane. For example, a portion of a plurality of memory blocks included in the memory planemay be allocated to the first memory region, and the other may be allocated to the second memory region. Alternatively, the first memory region in which snapshot data is written by sequential write, and the second memory region in which metadata is written by random write may be defined on different memory dies.

According to the aforementioned example embodiments, the storage controller of a storage device may store snapshot data, which occupies a relatively large capacity among the data generated by a host device in which the recall function is activated, in a memory device using a sequential write method rather than a random write method specified by a command by the host device. Accordingly, the increase in WAF of the storage device in which the recall function is activated may be reduced, and reliability and lifespan of the storage device may be improved.

While the example embodiments have been illustrated and described above, it will be configured as apparent to those skilled in the art that modifications and variations could be made without departing from the scope of the present invention as defined by the appended claims.