Input Stage Gain Control with Variable Attenuation Path

This application claims the benefit of and, under 35 U.S.C. § 119(e), priority to U.S. Provisional Patent Application No. 63/724,231, filed Nov. 22, 2024, entitled “INPUT STAGE GAIN CONTROL WITH VARIABLE ATTENUATION PATH,” which is incorporated herein by reference in its entirety.

One exemplary aspect relates to amplifiers, and in particular to an amplifier capable of receiving an input signal with a power level dynamic range greater than the linear operating region of the amplifier.

In electronic systems, signals are transmitted between processing systems. These systems may be on the same integrated circuit board, same server room, or separated by great distances. These signals may travel over a fiber optic cable, electrically conductive channel (wireline), or over the air in wireless environments. The distances these signals travel vary by system, as does the environment through which these signals pass from a transmitter to a receiver. As a result, the power level of a signal received at a transmitter can vary from system to system and even over time depending on a variety of factors, including but not limited to transmit power, type of channel, channel length, and environment of use. Receipt of an incoming signal, which has a power dynamic range that varies between a low-power level and a high-power level, creates challenges for the circuitry that receives the signal over the channel.

1 FIG. 104 104 108 112 108 108 128 120 120 124 illustrates an exemplary prior art amplifier circuit configured to receive a signal over a channel. This example receiver circuit is a common base input stage amplifier. As shown, an input nodereceives the incoming signal with a power level Pin that can vary in magnitude. The input nodeconnects to an emitter terminal of a transistorand to a current sourcethat biases the transistor. The base terminal of the transistorconnects to a Vdc, which is tied to ground, due to the common base design. The collector terminal of the transistorconnects to an output nodeand a resistor Rload. The opposing terminal of the resistor Rloadconnects to Vdc, as shown, which in this embodiment is 1.7 volts.

104 108 128 112 During operation, an incoming signal is presented to the input nodeand is amplified through the transistorto create an amplified signal. The amplified signal is presented on the output nodeas an amplified signal. The biasing is set by the current source, and determined based on the biasing needs for the gain level and input signal power.

108 For low distortion, which is preferred, the transistormust be biased so the output signal swing does not drive the transistor into a region of nonlinear operation, or maximize linearity over input signal power. For a bipolar junction transistor amplifier, this requirement means that the transistor should stay in active mode, and avoid cut-off or saturation. The same requirement applies to a MOSFET amplifier, although the terminology differs—the MOSFET should stay in the active mode, and avoid cutoff or ohmic operation.

The receiver circuit has to handle the input signal power level dynamic, which is a variable signal input power. When the input signal is at a low power level, referred to as the sensitivity level of the receiver's input, the referred noise limits the system's performance. This is often referred to as the signal-to-noise ratio for low-power input signal. When the input signal level increases, the linearity of the receiver circuit limits the performance, such as when a high-power level input signal saturates the transistor.

Several solutions have been proposed to address the challenges of an input signal that varies in power over time and the received signal power swing is greater than the active range of the amplifier. One proposed solution is to maintain linearity for received signals at the high end of the input signal range is to adapt the bias point of the circuit to the increased input signal power level. However, this suffers from the drawback of increased current consumption and reduces the gain.

In addition, if the operating point of the receiver system is adjusted, then the receiver is going to consume more power when receiving a stronger as well as a smaller magnitude signal. There are other issues as well. Changing operating point, such as the gain of the stage, may also require a VGA (variable gain amplifier) after the receiver to avoid saturating the rest of the signal chain. This at least adds additional cost, increases power consumption, and consumes additional space.

Another proposed solution is to place an attenuating circuit or network in front of the receiver. This will desirably attenuate the signals on the high end of the power range, but, to some degree, even a variable attenuator set to its lowest attenuation level will attenuate a low power level signal. Thus, an attenuator will have an assertion loss, even if the attenuation is set at its lowest level. This reduces the signal-to-noise ratio. One drawback to this approach is that the low-power signal should not be attenuated, which will occur even with a variable attenuator.

To at least overcome the drawbacks of the prior art and provide additional benefits, a method for amplifying a received signal, which can vary over a power range from a low power to a high power is provided. In one embodiment, this method includes receiving a received signal at a receiver input and sensing a received signal magnitude based on the received signal. Then, the received signal is presented to a main amplifier path and an attenuation path wherein a main path signal portion of the received signal and an attenuation path signal portion of the received signal is determined by the received signal magnitude. This method also includes generating a control signal proportional to the received signal magnitude. Responsive to the control signal, adjusting an impedance of the attenuation path such that an increase in received signal magnitude results in a reduction in the impedance of the attenuation path and a corresponding increase in the attenuation path signal portion, thereby reducing the main path signal portion. This maintains the operation of the amplifier in a linear operating region when receiving a high power received signal.

In one embodiment, the received signal is one of the following: an optic signal, a wireless signal, and/or an electrical signal. The step of sensing a received signal magnitude is performed by a regulator and a sensing circuit that includes a comparator and two or more field effect transistors. The step of sensing the received signal magnitude may also or alternatively comprise sensing a photodetector bias signal. In one configuration, adjusting the impedance of the attenuation paths occurs by the control signal changing a voltage presented to a base terminal of a transistor in the attenuation path. The method described above may further comprise responsive to the received signal being in the bottom 10% of the power range for the received signal, establishing the impedance of the attenuation path high to direct all of the received signal to the main amplifier path.

Also disclosed is an amplifier configured to receive and amplify a received signal with a power range greater than the amplifier's linear operating region. In one configuration, the amplifier (with associated circuitry) comprises an input configured to receive the signal to be amplified and a sensing circuit. The sensing circuit is configured to sense the power of the received signal directly or through monitoring another signal to determine an input signal power level and responsive to the input signal power level, generate an impedance control value that is proportional to the input signal power level. Also part of the amplifier is a main signal path connected to the input and configured to amplify a main path signal portion to generate an amplified signal. In addition, an attenuation signal path connects to the input and has a variable impedance. The impedance of the variable impedance controlled by the impedance control value, wherein as the input signal power level increases, the impedance control value reduces the variable impedance, thereby diverting a larger portion of the input signal away from the main signal path and through the attenuation signal path. As the input signal power level decreases, the impedance control value increases the variable impedance thereby diverting a smaller portion of the input signal through the attenuation signal path.

In one configuration, the signal originated as an optic signal, a wireless signal, or an electrical signal. It is contemplated that the sensing circuit may be a regulator that generates a bias signal and a sensing circuit to determine the value of the bias signal. In addition, the variable impedance comprises an attenuation signal path transistor and the impedance control value sets a base voltage for the attenuation signal path transistor. When the received signal is an optic signal, the amplifier may be a transimpedance amplifier, and a photodetector converts the optic signal to an electrical signal.

The configuration can further include a bias current source configured to provide a main signal path bias current to the main signal path and an attenuation signal path bias current to the attenuation signal path, wherein the bias current source is controlled by a bias current control signal that is proportional to a reference voltage.

In another embodiment, an amplifier is disclosed that is configured as part of a receiver to receive and amplify a received signal having a power range that is greater than the amplifier's linear operating region. This amplifier comprises a main signal path that has an amplifier configured to amplify a received signal or a portion of the received signal. Also part of this embodiment is an attenuation signal path comprising an impedance control device that has an impedance controlled by an impedance control signal. The impedance of the impedance control device determines how much of the received signal flows through the attenuation signal path. In addition, an impedance control signal generator is configured to generate the impedance control signal based on the power level of the received signal.

In one embodiment, the variable impedance comprises an attenuation signal path transistor, and the impedance control value sets a base voltage for the attenuation signal path transistor. When the received signal is an optic signal, the amplifier can be a transimpedance amplifier, and a photodetector converts an optic signal to the received signal. In one configuration, the amplifier further comprises a bias current source configured to provide a main signal path bias current to the main signal path and an attenuation signal path bias current to the attenuation signal path. In such a configuration, the bias current source is controlled by a bias current control signal proportional to a reference voltage. A sensing circuit may also be part of the receiver system, and it can be configured to sense the level power of the received signal directly or by monitoring of another signal in the receiver to determine the power level of the received signal.

In the disclosed receiver system and amplifier, as the input signal power level of the received signal increases, the impedance control value reduces the variable impedance, thereby diverting a larger portion of the received signal away from the main signal path and into the attenuation signal path. And as the power level of the received signal decreases, the impedance control value increases the variable impedance thereby diverting a smaller portion of the received signal through the attenuation signal path. In one embodiment, the impedance control signal is a current that generates a base voltage for an attenuation path transistor.

Other systems, methods, features and advantages of the disclosed technology will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.

2 FIG. 2 FIG. 1 FIG. 1 FIG. 204 208 216 220 224 228 260 208 To at least overcome the drawbacks of the prior art and provide additional benefits, disclosed is a circuit for reducing input power to the primary receiver circuit signal path by shunting a portion of the input signal to an auxiliary signal path, also referred to as an attenuation path.illustrates an example embodiment of a receiver circuit with an auxiliary shunt path. The purpose of the circuit is to attenuate the input signal when the input power increases by enabling a parallel path with a controlled impedance. As shown in, the primary path receiver amplifier is shown by the input node, an amplifier transistor T2, a bias current source, the resistor Rloadconnected to the supply voltage, and the output nodeas shown. Rload sets the output voltage. This structure is similar to that shown inand discussed above. In addition to, a capacitorconnects to the base terminal of the transistorand to a ground node.

2 FIG. 232 204 216 232 240 232 236 236 250 250 232 250 250 232 Shown inis an auxiliary path that runs through a transistor T1such that transistor T1 has an emitter terminal that connects to the input nodeand the bias current source. The transistor T1has a collector terminal that connects to ground nodethat allows an attenuation current Iatt to flow through transistor T1. A base terminal of transistor T1connects to a control current nodesuch that a control current Iagc flows through nodeto the diodesA,B. This creates an impedance control voltage at the base terminal of T1that is determined by the value of Iagc. The diodesA,B create a translinear circuit and function to establish a voltage drop to create the base voltage for T1.

232 232 204 In this configuration, the value of Iagc is proportional to the value of the input signal such that as the input signal becomes larger in magnitude so too does the value of lage, which in-turn increases the value of the base voltage for T1. As a result, the impedance of T1changes, thereby allowing a greater portion of the input signal from nodeto flow through T1.

2 FIG. 212 250 250 232 208 220 Also included in the embodiment ofis a reference current Iref that flows through nodeto the diodesC,D. The reference current Iref does not change with the input signal. The difference between the base voltage at transistor T1and transistor T2will depend on the value of the Iagc compared to the Iref. In this embodiment, Rloadsets the output voltage. In one embodiment, Iref is from a current source that is inside the system. This current source is configured to generate a current that may be proportional to temperature, or Iref may be constant over temperature.

268 228 264 268 268 216 254 216 A sensing circuit is also provided that includes a comparator(such as an operational amplifier) that receives the output signal from the output nodeand a reference voltage Vref on comparator input. The output of the comparatorcomprises a difference between the output signal and the voltage Vref, and this output functions as a bias control signal. As shown, the output of the comparatoris routed to the bias current sourceto control the bias current Ibias. A ground nodeconnects to the bias current source.

204 208 232 208 232 216 204 232 208 208 During operation, the input signal is provided on the input nodeand presented to transistors T2and T1. Transistor T2is biased with Igain while T1is biased with Iatt, both of which are sourced from the current source Ibias. Thus, the input signal from the input nodewill find two paths in parallel. One path is through T2, the primary path, and the other through T1, the auxiliary (attenuation) path. The amount of current through T1reduces the current through T2by shunting a portion of the input signal away from the primary path through T2. In one embodiment, the education in current through T2is half the input signal, so assuming bias point of T1 and T2 are the same, the input current is split in two, resulting in 6 db of attenuation of the input signal. In other embodiments, other levels of attenuation are contemplated.

208 232 208 During operation, the input power may change. Over the range of input signal power levels, transistors T1and T2are not biased the same. At lower input power levels (sensitivity level), the auxiliary path circuit is disabled (not active such that T1 is off with zero base voltage) which results in no impact on the input referred noise and no insertion loss as can be experienced using an attenuator. All of the input signal passes through transistor T2, which is the primary path.

232 232 236 232 232 204 200 The change in the bias through the auxiliary path is controlled by the base voltage presented to the base of T1. The base voltage of T1is controlled by the value of the Iagc current through oath. Thus, as the input signal increases, so too does the Iagc current, which in turn increases the voltage at the base terminal of transistor T1. The increase in base voltage at the base of transistor T1increases the current flow through T1, namely the attenuation current Iatt. This shunts or directs a portion of the input signal away from T2, preventing the unwanted effects of an excessive quantity/amount of an input signal being presented to the inputof the amplifier.

228 264 3 FIG. 2 FIG. The bias current Ibias is controlled by the average voltage on the Rload, which is a function of the output signal at node. The sensing circuit compares the output voltage to the reference voltage to control the Ibias value. This is discussed in connection with. The reference voltage is set by the manufacturer or customer based on the other parameters of the circuit and environment of use. The circuit ofmaintains the Rload voltage constant, as determined by the reference voltage presented to node.

232 208 208 220 220 As discussed above, increasing Iagc proportionally increases the base voltage of transistor T1, which allows a proportional increase in current through T1 and away from the path through transistor T2thereby keeping the primary path circuit in the linear zone. The amount of attenuation depends on the ratio between Iref and Iagc, such that Iagc is proportional to the input signal. In addition, it is preferred that the Ibias current be equal to the current through T2plus the attenuation current Iatt. (attenuation). The value of Ibias should increase to keep Igain constant, and Ibias is based on the voltage drop across Rloadand the reference voltage. Thus, the voltage drop across Rloadis controlled to be the same as the reference voltage Vref and the voltage drop across Rload is kept constant, regardless of the value of the input signal (current).

232 2 FIG. 1 FIG. For a small input signal, there would be a small Iagc. So, very little or none of the input signal will be diverted through transistor T1. Thus, at low input signals, this circuit topology does not consume more current or attenuate the input signal. At low input signal levels, the circuit offunctions as the circuit of.

3 FIG. 2 FIG. 2 FIG. 3 FIG. 2 FIG. 308 304 304 304 204 illustrates an alternative embodiment of the circuit shown in. As compared to, like elements are identified with identical reference numbers. Only the new aspects of, as compared to, are discussed below. In this alternative embodiment, a voltage source, generating a pink voltage on node, is used to reverse bias a photodetector. The photodetectorreceives and converts an optic signal into an electrical signal. The output of the photodetectorconnects to the input nodeas shown.

2 FIG. 232 232 In this embodiment, the current Iagc fromis referred to as Imon. The impedance of transistor T1is controlled by the base voltage of T1, which is controlled by the Imon. The bias current for transistor T1is Iatt. In this example configuration, the value of Imon is the current from the photodiode (a current proportion to the photodiode current) divided by 8. This is but one possible example embodiment, and in other embodiments, a different divider value may be used, or none at all. In general, the value of Imon is derived from the input current so that the attenuation path current (auxiliary path current) will vary with the input power.

324 324 324 330 344 324 340 304 320 232 In this embodiment, the pink voltage is generated by a regulator circuit, and as part of this process, the Imon current is generated by tapping or measuring the regulator current, voltage, or both. As shown, regulatorgenerates the pink voltage. The inputs to the regulatorinclude a supply voltage on supply nodeand a regulator reference voltage Vref on node. Associated with the regulatoris a sensing circuitthat senses the voltage, current, or both provided by the regulator as the pink voltage to the photodiode. The sensing circuit can generate Imon directly or provide a control value to a current sourcethat is configured to generate Imon. A divider or multiplier (not shown) may be used to adjust the value of Imon. By having Imon track the power of the input signal, additional current may be directed through the attenuation path (through T1) to reduce the current through the main path, which thereby maintains the linearity of the amplifier main path while also not adversely affecting the system operation when the input signal power is low.

4 FIG. 4 FIG. 3 FIG. 400 404 408 404 416 416 404 440 420 416 312 232 420 440 304 illustrates an example embodiment of the regulator with a sensing capability. This is but one possible configuration and a such other designs are contemplated. As shown in, the regulatoris configured with a comparatorthat receives a regulator reference voltage Vref. The output of the comparatoris provided to a gate terminal of a first FET. One of the first FETterminals is fed back into the comparatoras the comparator's second input, while the other terminal of the first FET is connected to a bias signal to power the comparator through node. A second FETalso connects to the first FETas shown by connecting the gate terminals. One of the terminals of the second FET provides the Imon signalto the base of T1(). The other terminal of the second FETties into the node. The value of Vref is specified or set by the customer as the bias for the photodetector.

3 FIG. 204 Returning to, the embodiment as shown is configured for use with a photodetector in an optic signal system; the same principles may be applied if an antenna is the device creating the electrical version of the received signal instead of the photodetector. In a wired line system, the electrical signal may be presented directly to the input node. In addition, a pink voltage or biasing current may not be available in such a system. However, a different parameter may be used to generate the Imon value that controls how much, if any, of the input signal is directed to the attenuation path.

While various embodiments of the invention have been described, it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible that are within the scope of this invention. In addition, the various features, elements, and embodiments described herein may be claimed or combined in any combination or arrangement.