Multi-Layer Sparse Content Handling for Split AR/Mr

The present disclosure relates generally to processing systems, and more particularly, to one or more techniques for display processing.

Computing devices often perform graphics and/or display processing (e.g., utilizing a graphics processing unit (GPU), a central processing unit (CPU), a display processor, etc.) to render and display visual content. Such computing devices may include, for example, computer workstations, mobile phones such as smartphones, embedded systems, personal computers, tablet computers, and video game consoles. GPUs are configured to execute a graphics processing pipeline that includes one or more processing stages, which operate together to execute graphics processing commands and output a frame. A central processing unit (CPU) may control the operation of the GPU by issuing one or more graphics processing commands to the GPU. Modern day CPUs are typically capable of executing multiple applications concurrently, each of which may need to utilize the GPU during execution. A display processor may be configured to convert digital information received from a CPU to analog values and may issue commands to a display panel for displaying the visual content. A device that provides content for visual presentation on a display may utilize a CPU, a GPU, and/or a display processor.

Current techniques for display processing may utilize individual render and composite operations for layers of images with sparse content, but may not address the inefficient memory access utilization and data throughput caused by encodes/decodes and composites associated with such individual handling. There is a need for improved techniques for rendering and compositing layers with sparse content, such as in split extended reality (XR) systems such, but not limited to, split augmented reality (AR) / mixed reality (MR) (AR/MR) systems.

The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus includes a memory; and a processor coupled to the memory and, based on information stored in the memory, the processor is configured to: generate an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content; encode the atlas in a first encoding session, and output the encoded atlas as an encoded representation of the image content.

In another aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus includes a memory; and a processor coupled to the memory and, based on information stored in the memory, the processor is configured to: receive an encoded atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content, decode the encoded atlas in a first decoding session to obtain the set of sparse layers, and output the set of sparse layers as a representation of the image content.

To the accomplishment of the foregoing and related ends, the one or more aspects include the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of but a few of the various ways in which the principles of various aspects may be employed, and this description is intended to include all such aspects and their equivalents.

Various aspects of systems, apparatuses, computer program products, and methods are described more fully hereinafter with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of this disclosure is intended to cover any aspect of the systems, apparatuses, computer program products, and methods disclosed herein, whether implemented independently of, or combined with, other aspects of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method which is practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth herein. Any aspect disclosed herein may be embodied by one or more elements of a claim.

Although various aspects are described herein, many variations and permutations of these aspects fall within the scope of this disclosure. Although some potential benefits and advantages of aspects of this disclosure are mentioned, the scope of this disclosure is not intended to be limited to particular benefits, uses, or objectives. Rather, aspects of this disclosure are intended to be broadly applicable to different wireless technologies, system configurations, processing systems, networks, and transmission protocols, some of which are illustrated by way of example in the figures and in the following description. The detailed description and drawings are merely illustrative of this disclosure rather than limiting, the scope of this disclosure being defined by the appended claims and equivalents thereof.

Several aspects are presented with reference to various apparatus and methods. These apparatus and methods are described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, and the like (collectively referred to as “elements”). These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.

By way of example, an element, or any portion of an element, or any combination of elements may be implemented as a “processing system” that includes one or more processors (which may also be referred to as processing units). Examples of processors include microprocessors, microcontrollers, graphics processing units (GPUs), general purpose GPUs (GPGPUs), central processing units (CPUs), application processors, digital signal processors (DSPs), reduced instruction set computing (RISC) processors, systems-on-chip (SOCs), baseband processors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functionality described throughout this disclosure. One or more processors in the processing system may execute software. Software can be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software components, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise.

The term application may refer to software. As described herein, one or more techniques may refer to an application (e.g., software) being configured to perform one or more functions. In such examples, the application may be stored in a memory (e.g., on-chip memory of a processor, system memory, or any other memory). Hardware described herein, such as a processor may be configured to execute the application. For example, the application may be described as including code that, when executed by the hardware, causes the hardware to perform one or more techniques described herein. As an example, the hardware may access the code from a memory and execute the code accessed from the memory to perform one or more techniques described herein. In some examples, components are identified in this disclosure. In such examples, the components may be hardware, software, or a combination thereof. The components may be separate components or sub-components of a single component.

In one or more examples described herein, the functions described may be implemented in hardware, software, or any combination thereof. If implemented in software, the functions may be stored on or encoded as one or more instructions or code on a computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can include a random access memory (RAM), a read-only memory (ROM), an electrically erasable programmable ROM (EEPROM), optical disk storage, magnetic disk storage, other magnetic storage devices, combinations of the aforementioned types of computer-readable media, or any other medium that can be used to store computer executable code in the form of instructions or data structures that can be accessed by a computer.

As used herein, instances of the term “content” may refer to “graphical content,” an “image,” etc., regardless of whether the terms are used as an adjective, noun, or other parts of speech. In some examples, the term “graphical content,” as used herein, may refer to a content produced by one or more processes of a graphics processing pipeline. In further examples, the term “graphical content,” as used herein, may refer to a content produced by a processing unit configured to perform graphics processing. In still further examples, as used herein, the term “graphical content” may refer to a content produced by a graphics processing unit. As used herein, the term “augmented reality (AR)” may refer to the technology that overlays digital content on top of the real world through, a headset, a mobile device display, extended reality (XR) display glasses, an automotive display, etc. As used herein, the term “virtual reality (VR)” may refer to a virtual environment to create believable experiences for a user, including immersive experiences in a real-life situation or a creative imaginary experience. As used herein, the term “mixed reality (MR)” may refer to a combination of both AR and VR together which may capture real-world experience through a series of cameras and/or sensors and then project the experience on a display before the eyes of a user, where virtual objects may be seamlessly integrated into reality for user experiences. As used herein, the term “extended reality (XR)” may refer to any of the set of AR, VR, and MR, including the “metaverse” which may refer to the ecosystem revolving around XR. As used herein, the term “split AR/MR system” may refer to a system in which rendering of image content is performed by a companion/host/server device (e.g., a mobile device, etc.), and displaying image content is performed by a viewer/client device (e.g., a headset, a mobile device display, extended reality (XR) display glasses, an automotive display, etc.). As used herein, the term “atlas” may refer to a single representation/merger of a set of layers, e.g., a set of layers with sparse content, and associated layer information. As used herein, the term “sparse content” may refer to virtual content of a layer that occupies an amount of the layer less than a threshold. As used herein, the term “bounding box” may refer to a geometry, e.g., a quadrilateral/rectangle, that bounds a virtual object during creation of an atlas of sparse layers. As used herein, the term “margin” may refer to a scalar or other value that is added to height and/or width dimensions of a bounding box. As used herein, the term “metadata” may refer to data that includes information about other data, generally, such as but not limited to, data that provides information associated with layer data, margin data, bounding box data, etc., herein. As used herein, the terms “encoding session” and “decoding session” may refer to single, atomic encoding/decoding procedure from initialization of an encoder/decoder to a closing of the encoder/decoder, e.g., an encoding/decoding procedure of a single layer associated with image content.

In split AR/MR system cases, there may generally be sparse content with few layers, and managing such sparse layers/content as a separate layers after rendering up to display may increase memory accesses (e.g., for double data rate (DDR) memory) and may take multiple sessions in encoding/decoding, as well as multiple accesses via Bluetooth™ (Bluetooth is a trademark of the Bluetooth Special Interest Group (SIG)), Wi-Fi™ (Wi-Fi is a trademark of the Wi-Fi Alliance), etc. Current techniques for display processing may utilize individual render and composite operations for layers of images/image frames with sparse content, but may not address the inefficient memory access utilization and data throughput caused by encodes/decodes and composites associated with such individual handling. Further, this type of naïve handling of sparse content for layers leads to increased power consumption for memory and processors, increased encoder concurrency, and increased power for transmission/provision of rendered content for display. There is a need for improved techniques for rendering and compositing layers with sparse content, such as in split XR systems such, but not limited to, split AR/MR systems.

Aspects herein provide for merging a number the layers having sparse content (e.g., a set of layers, all layers, and/or the like) into a single atlas, such as an atlas of sparse layers, after rendering. Aspects enable identifying bounding boxes for virtual objects (e.g., either provided by an application, such a game engine, etc., or detected using a deep learning (DL) model(s)) of all the sparse layers, and grouping overlapping bounding boxes of a layer into one bigger bounding box. Aspects also enable the creation of an atlas of sparse layers using the bounding boxes of all the layers while keeping a defined margin (e.g., approximately a smallest coding block size) between neighboring bounding boxes, and the creation of an appropriate/a corresponding occupancy map of the virtual objects in the layers. Aspect also enable the creation of metadata containing layer and bounding box information, and the creation of three encoder sessions for a Red (R), Green (G), Blue (B), Alpha Channel (A) (RGBA) atlas with lossy/lossless compression, for a depth map atlas with lossy/lossless compression, and for an occupancy map of the atlas with lossless compression, as well as creation of the metadata with lossless compression, e.g., using an entropy encoding. In aspects, a vertex shader may be configured, for each pixel of output texture, to find a mapping to all layers using respective transformation matrices, and a fragment shader may be configured to iterate over layers according to their composition order and blend color.

Accordingly, aspects enable layers with sparse content to be merged/rearranged into a single atlas (post-rendering) at the server side that may be handled as a single frame, rather than multiple sparse frames. Thus, aspects reduce DDR memory access bandwidth and reduce the number of encode/decode sessions for multiple layers with sparse content to a single encode/decode session (e.g., a reduction in session overhead). Additionally, as the image content/data for an atlas of sparse layers is encoded at one time and transmitted/provided for a display, e.g., via Wi-Fi™ or Bluetooth™, transmission/provision power is reduced as all data for the layers merged in the atlas may be transmitted/provided in a single access/session. Similarly, at the client side, software overhead for de-packetization is reduced, as is multi-session decoding of multiple layers with sparse content (e.g., a single decode session of the atlas may be performed instead).

The examples described herein may refer to a use and functionality of a graphics processing unit (GPU). As used herein, a GPU can be any type of graphics processor, and a graphics processor can be any type of processor that is designed or configured to process graphics content. For example, a graphics processor or GPU can be a specialized electronic circuit that is designed for processing graphics content. As an additional example, a graphics processor or GPU can be a general purpose processor that is configured to process graphics content.

1 FIG. 100 100 104 104 104 104 104 120 124 104 126 132 128 130 127 131 131 131 131 is a block diagram that illustrates an example content generation systemconfigured to implement one or more techniques of this disclosure. The content generation systemincludes a device. The devicemay include one or more components or circuits for performing various functions described herein. In some examples, one or more components of the devicemay be components of a SOC. The devicemay include one or more components configured to perform one or more techniques of this disclosure. In the example shown, the devicemay include a processing unit, a content encoder/decoder 122, and a system memory. In some aspects, the devicemay include a number of components (e.g., a communication interface, a transceiver, a receiver, a transmitter, a display processor, and one or more displays). Display(s)may refer to one or more displays. For example, the displaymay include a single display or multiple displays, which may include a first display and a second display. The first display may be a left-eye display and the second display may be a right-eye display. In some examples, the first display and the second display may receive different frames for presentment thereon. In other examples, the first and second display may receive the same frames for presentment thereon. In further examples, the results of the graphics processing may not be displayed on the device, e.g., the first display and the second display may not receive any frames for presentment thereon. Instead, the frames or graphics processing results may be transferred to another device. In some aspects, this may be referred to as split-rendering.

120 121 120 107 122 123 104 120 131 100 127 127 127 127 127 120 131 127 131 The processing unitmay include an internal memory. The processing unitmay be configured to perform graphics processing using a graphics processing pipeline. The content encoder/decodermay include an internal memory. In some examples, the devicemay include a processor, which may be configured to perform one or more display processing techniques on one or more frames generated by the processing unitbefore the frames are displayed by the one or more displays. While the processor in the example content generation systemis configured as a display processor, it should be understood that the display processoris one example of the processor and that other types of processors, controllers, etc., may be used as substitute for the display processor. The display processormay be configured to perform display processing. For example, the display processormay be configured to perform one or more display processing techniques on one or more frames generated by the processing unit. The one or more displaysmay be configured to display or otherwise present frames processed by the display processor. In some examples, the one or more displaysmay include one or more of a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, a projection display device, an augmented reality display device, a virtual reality display device, a head-mounted display, or any other type of display device.

120 122 124 120 122 120 122 124 120 124 120 122 121 Memory external to the processing unitand the content encoder/decoder, such as system memory, may be accessible to the processing unitand the content encoder/decoder. For example, the processing unitand the content encoder/decodermay be configured to read from and/or write to external memory, such as the system memory. The processing unitmay be communicatively coupled to the system memoryover a bus. In some examples, the processing unitand the content encoder/decodermay be communicatively coupled to the internal memoryover the bus or via a different connection.

122 124 126 124 122 124 126 122 The content encoder/decodermay be configured to receive graphical content from any source, such as the system memoryand/or the communication interface. The system memorymay be configured to store received encoded or decoded graphical content. The content encoder/decodermay be configured to receive encoded or decoded graphical content, e.g., from the system memoryand/or the communication interface, in the form of encoded pixel data. The content encoder/decodermay be configured to encode or decode any graphical content.

121 124 121 124 121 124 121 124 124 104 124 104 The internal memoryor the system memorymay include one or more volatile or non-volatile memories or storage devices. In some examples, internal memoryor the system memorymay include RAM, static random access memory (SRAM), dynamic random access memory (DRAM), erasable programmable ROM (EPROM), EEPROM, flash memory, a magnetic data media or an optical storage media, or any other type of memory. The internal memoryor the system memorymay be a non-transitory storage medium according to some examples. The term “non-transitory” may indicate that the storage medium is not embodied in a carrier wave or a propagated signal. However, the term “non-transitory” should not be interpreted to mean that internal memoryor the system memoryis non-movable or that its contents are static. As one example, the system memorymay be removed from the deviceand moved to another device. As another example, the system memorymay not be removable from the device.

120 120 104 120 104 104 120 120 121 The processing unitmay be a CPU, a GPU, a GPGPU, or any other processing unit that may be configured to perform graphics processing. In some examples, the processing unitmay be integrated into a motherboard of the device. In further examples, the processing unitmay be present on a graphics card that is installed in a port of the motherboard of the device, or may be otherwise incorporated within a peripheral device configured to interoperate with the device. The processing unitmay include one or more processors, such as one or more microprocessors, GPUs, ASICs, FPGAs, arithmetic logic units (ALUs), DSPs, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuitry, or any combinations thereof. If the techniques are implemented partially in software, the processing unitmay store instructions for the software in a suitable, non-transitory computer-readable storage medium, e.g., internal memory, and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered to be one or more processors.

122 122 104 122 122 123 The content encoder/decodermay be any processing unit configured to perform content decoding. In some examples, the content encoder/decodermay be integrated into a motherboard of the device. The content encoder/decodermay include one or more processors, such as one or more microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), arithmetic logic units (ALUs), digital signal processors (DSPs), video processors, discrete logic, software, hardware, firmware, other equivalent integrated or discrete logic circuitry, or any combinations thereof. If the techniques are implemented partially in software, the content encoder/decodermay store instructions for the software in a suitable, non-transitory computer-readable storage medium, e.g., internal memory, and may execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing, including hardware, software, a combination of hardware and software, etc., may be considered to be one or more processors.

100 126 126 128 130 128 104 128 130 104 130 128 130 132 132 104 In some aspects, the content generation systemmay include a communication interface. The communication interfacemay include a receiverand a transmitter. The receivermay be configured to perform any receiving function described herein with respect to the device. Additionally, the receivermay be configured to receive information, e.g., eye or head position information, rendering commands, and/or location information, from another device. The transmittermay be configured to perform any transmitting function described herein with respect to the device. For example, the transmittermay be configured to transmit information to another device, which may include a request for content. The receiverand the transmittermay be combined into a transceiver. In such examples, the transceivermay be configured to perform any receiving function and/or transmitting function described herein with respect to the device.

1 FIG. 120 198 198 131 199 199 Referring again to, in certain aspects, the processing unitmay include a sparse content atlas generatorconfigured to generate an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content, to encode the atlas in a first encoding session, and to output the encoded atlas as an encoded representation of the image content. The sparse content atlas generatormay also be configured to encode an occupancy map in a different encoding session than the first encoding session. In certain aspects, the display(s)may include a sparse content atlas generatorconfigured to receive an encoded atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content, to decode the encoded atlas in a first decoding session to obtain the set of sparse layers, and to output the set of sparse layers as a representation of the image content. The sparse content atlas generatormay also be configured to decode an encoded occupancy map in a different decoding session than the first decoding session. Although the following description may be focused on display processing, the concepts described herein may be applicable to other similar processing techniques.

104 A device, such as the device, may refer to any device, apparatus, or system configured to perform one or more techniques described herein. For example, a device may be a server, a base station, a user equipment, a client device, a station, an access point, a computer such as a personal computer, a desktop computer, a laptop computer, a tablet computer, a computer workstation, or a mainframe computer, an end product, an apparatus, a phone, a smart phone, a server, a video game platform or console, a handheld device such as a portable video game device or a personal digital assistant (PDA), a wearable computing device such as a smart watch, an augmented reality device, or a virtual reality device, a non-wearable device, a display or display device, a television, a television set-top box, an intermediate network device, a digital media player, a video streaming device, a content streaming device, an in-vehicle computer, any mobile device, any device configured to generate graphical content, or any device configured to perform one or more techniques described herein. Processes herein may be described as performed by a particular component (e.g., a GPU) but in other embodiments, may be performed using other components (e.g., a CPU) consistent with the disclosed embodiments.

GPUs can process multiple types of data or data packets in a GPU pipeline. For instance, in some aspects, a GPU can process two types of data or data packets, e.g., context register packets and draw call data. A context register packet can be a set of global state information, e.g., information regarding a global register, shading program, or constant data, which can regulate how a graphics context will be processed. For example, context register packets can include information regarding a color format. In some aspects of context register packets, there can be a bit or bits that indicate which workload belongs to a context register. Also, there can be multiple functions or programming running at the same time and/or in parallel. For example, functions or programming can describe a certain operation, e.g., the color mode or color format. Accordingly, a context register can define multiple states of a GPU.

Context states can be utilized to determine how an individual processing unit functions, e.g., a vertex fetcher (VFD), a vertex shader (VS), a shader processor, or a geometry processor, and/or in what mode the processing unit functions. In order to do so, GPUs can use context registers and programming data. In some aspects, a GPU can generate a workload, e.g., a vertex or pixel workload, in the pipeline based on the context register definition of a mode or state. Certain processing units, e.g., a VFD, can use these states to determine certain functions, e.g., how a vertex is assembled. As these modes or states can change, GPUs may need to change the corresponding context. Additionally, the workload that corresponds to the mode or state may follow the changing mode or state.

2 FIG. 2 FIG. 2 FIG. 200 200 210 212 220 222 224 226 228 230 232 234 236 238 240 200 220 238 200 220 238 200 250 260 261 illustrates an example GPUin accordance with one or more techniques of this disclosure. As shown in, GPUincludes command processor (CP), draw call packets, VFD, VS, vertex cache (VPC), triangle setup engine (TSE), rasterizer (RAS), Z process engine (ZPE), pixel interpolator (PI), fragment shader (FS), render backend (RB), L2 cache (UCHE), and system memory. Althoughdisplays that GPUincludes processing units-, GPUcan include a number of additional processing units. Additionally, processing units-are merely an example and any combination or order of processing units can be used by GPUs according to the present disclosure. GPUalso includes command buffer, context register packets, and context states.

2 FIG. 210 260 212 210 260 212 250 As shown in, a GPU can utilize a CP, e.g., CP, or hardware accelerator to parse a command buffer into context register packets, e.g., context register packets, and/or draw call data packets, e.g., draw call packets. The CPcan then send the context register packetsor draw call data packetsthrough separate paths to the processing units or blocks in the GPU. Further, the command buffercan alternate different states of context registers and draw calls. For example, a command buffer can simultaneously store the following information: context register of context N, draw call(s) of context N, context register of context N+1, and draw call(s) of context N+1.

GPUs can render images in a variety of different ways. In some instances, GPUs can render an image using direct rendering and/or tiled rendering. In tiled rendering GPUs, an image can be divided or separated into different sections or tiles. After the division of the image, each section or tile can be rendered separately. Tiled rendering GPUs can divide computer graphics images into a grid format, such that each portion of the grid, i.e., a tile, is separately rendered. In some aspects of tiled rendering, during a binning pass, an image can be divided into different bins or tiles. In some aspects, during the binning pass, a visibility stream can be constructed where visible primitives or draw calls can be identified. A rendering pass may be performed after the binning pass. In contrast to tiled rendering, direct rendering does not divide the frame into smaller bins or tiles. Rather, in direct rendering, the entire frame is rendered at a single time (i.e., without a binning pass). Additionally, some types of GPUs can allow for both tiled rendering and direct rendering (e.g., flex rendering).

In some aspects, GPUs can apply the drawing or rendering process to different bins or tiles. For instance, a GPU can render to one bin, and perform all the draws for the primitives or pixels in the bin. During the process of rendering to a bin, the render targets can be located in GPU internal memory (GMEM). In some instances, after rendering to one bin, the content of the render targets can be moved to a system memory and the GMEM can be freed for rendering the next bin. Additionally, a GPU can render to another bin, and perform the draws for the primitives or pixels in that bin. Therefore, in some aspects, there might be a small number of bins, e.g., four bins, that cover all of the draws in one surface. Further, GPUs can cycle through all of the draws in one bin, but perform the draws for the draw calls that are visible, i.e., draw calls that include visible geometry. In some aspects, a visibility stream can be generated, e.g., in a binning pass, to determine the visibility information of each primitive in an image or scene. For instance, this visibility stream can identify whether a certain primitive is visible or not. In some aspects, this information can be used to remove primitives that are not visible so that the non-visible primitives are not rendered, e.g., in the rendering pass. Also, at least some of the primitives that are identified as visible can be rendered in the rendering pass.

In some aspects of tiled rendering, there can be multiple processing phases or passes. For instance, the rendering can be performed in two passes, e.g., a binning, a visibility or bin-visibility pass and a rendering or bin-rendering pass. During a visibility pass, a GPU can input a rendering workload, record the positions of the primitives or triangles, and then determine which primitives or triangles fall into which bin or area. In some aspects of a visibility pass, GPUs can also identify or mark the visibility of each primitive or triangle in a visibility stream. During a rendering pass, a GPU can input the visibility stream and process one bin or area at a time. In some aspects, the visibility stream can be analyzed to determine which primitives, or vertices of primitives, are visible or not visible. As such, the primitives, or vertices of primitives, that are visible may be processed. By doing so, GPUs can reduce the unnecessary workload of processing or rendering primitives or triangles that are not visible.

In some aspects, during a visibility pass, certain types of primitive geometry, e.g., position-only geometry, may be processed. Additionally, depending on the position or location of the primitives or triangles, the primitives may be sorted into different bins or areas. In some instances, sorting primitives or triangles into different bins may be performed by determining visibility information for these primitives or triangles. For example, GPUs may determine or write visibility information of each primitive in each bin or area, e.g., in a system memory. This visibility information can be used to determine or generate a visibility stream. In a rendering pass, the primitives in each bin can be rendered separately. In these instances, the visibility stream can be fetched from memory and used to remove primitives which are not visible for that bin.

Some aspects of GPUs or GPU architectures can provide a number of different options for rendering, e.g., software rendering and hardware rendering. In software rendering, a driver or CPU can replicate an entire frame geometry by processing each view one time. Additionally, some different states may be changed depending on the view. As such, in software rendering, the software can replicate the entire workload by changing some states that may be utilized to render for each viewpoint in an image. In certain aspects, as GPUs may be submitting the same workload multiple times for each viewpoint in an image, there may be an increased amount of overhead. In hardware rendering, the hardware or GPU may be responsible for replicating or processing the geometry for each viewpoint in an image. Accordingly, the hardware can manage the replication or processing of the primitives or triangles for each viewpoint in an image.

3 FIG. 3 FIG. 3 FIG. 300 300 302 321 322 323 324 321 322 323 324 310 311 312 313 314 315 321 324 321 324 350 351 300 302 illustrates image or surface, including multiple primitives divided into multiple bins in accordance with one or more techniques of this disclosure. As shown in, image or surfaceincludes area, which includes primitives,,, and. The primitives,,, andare divided or placed into different bins, e.g., bins,,,,, and.illustrates an example of tiled rendering using multiple viewpoints for the primitives-. For instance, primitives-are in first viewpointand second viewpoint. As such, the GPU processing or rendering the image or surfaceincluding areacan utilize multiple viewpoints or multi-view rendering.

As indicated herein, GPUs or graphics processors can use a tiled rendering architecture to reduce power consumption or save memory bandwidth. As further stated above, this rendering method can divide the scene into multiple bins, as well as include a visibility pass that identifies the triangles that are visible in each bin. Thus, in tiled rendering, a full screen can be divided into multiple bins or tiles. The scene can then be rendered multiple times, e.g., one or more times for each bin.

In aspects of graphics rendering, some graphics applications may render to a single target, i.e., a render target, one or more times. For instance, in graphics rendering, a frame buffer on a system memory may be updated multiple times. The frame buffer can be a portion of memory or random access memory (RAM), e.g., containing a bitmap or storage, to help store display data for a GPU. The frame buffer can also be a memory buffer containing a complete frame of data. Additionally, the frame buffer can be a logic buffer. In some aspects, updating the frame buffer can be performed in bin or tile rendering, where, as discussed above, a surface is divided into multiple bins or tiles and then each bin or tile can be separately rendered. Further, in tiled rendering, the frame buffer can be partitioned into multiple bins or tiles.

As indicated herein, in some aspects, such as in bin or tiled rendering architecture, frame buffers can have data stored or written to them repeatedly, e.g., when rendering from different types of memory. This can be referred to as resolving and unresolving the frame buffer or system memory. For example, when storing or writing to one frame buffer and then switching to another frame buffer, the data or information on the frame buffer can be resolved from the GMEM at the GPU to the system memory, i.e., memory in the double data rate (DDR) RAM or dynamic RAM (DRAM).

In some aspects, the system memory can also be system-on-chip (SoC) memory or another chip-based memory to store data or information, e.g., on a device or smart phone. The system memory can also be physical data storage that is shared by the CPU and/or the GPU. In some aspects, the system memory can be a DRAM chip, e.g., on a device or smart phone. Accordingly, SoC memory can be a chip-based manner in which to store data.

In some aspects, the GMEM can be on-chip memory at the GPU, which can be implemented by static RAM (SRAM). Additionally, GMEM can be stored on a device, e.g., a smart phone. As indicated herein, data or information can be transferred between the system memory or DRAM and the GMEM, e.g., at a device. In some aspects, the system memory or DRAM can be at the CPU or GPU. Additionally, data can be stored at the DDR or DRAM. In some aspects, such as in bin or tiled rendering, a small portion of the memory can be stored at the GPU, e.g., at the GMEM. In some instances, storing data at the GMEM may utilize a larger processing workload and/or consume more power compared to storing data at the frame buffer or system memory.

4 FIG. 400 120 124 127 131 104 is a block diagramthat illustrates an example display framework including the processing unit, the system memory, the display processor, and the display(s), as may be identified in connection with the device.

120 410 104 410 415 415 410 120 A GPU may be included in devices that provide content for visual presentation on a display. For example, the processing unitmay include a GPUconfigured to render graphical data for display on a computing device (e.g., the device), which may be a computer workstation, a mobile phone, a smartphone or other smart device, an embedded system, a personal computer, a tablet computer, a video game console, and the like. Operations of the GPUmay be controlled based on one or more graphics processing commands provided by a CPU. The CPUmay be configured to execute multiple applications concurrently. In some cases, each of the concurrently executed multiple applications may utilize the GPUsimultaneously. Processing techniques may be performed via the processing unitoutput a frame over physical or wireless communication channels.

124 120 420 425 420 425 430 430 127 430 127 The system memory, which may be executed by the processing unit, may include a user spaceand a kernel space. The user space(sometimes referred to as an “application space”) may include software application(s) and/or application framework(s). For example, software application(s) may include operating systems, media applications, graphical applications, workspace applications, etc. Application framework(s) may include frameworks used by one or more software applications, such as libraries, services (e.g., display services, input services, etc.), application program interfaces (APIs), etc. The kernel spacemay further include a display driver. The display drivermay be configured to control the display processor. For example, the display drivermay cause the display processorto compose a frame and transmit the data for the frame to a display.

127 435 440 127 131 430 435 131 440 435 124 120 The display processorincludes a display control blockand a display interface. The display processormay be configured to manipulate functions of the display(s)(e.g., based on an input received from the display driver). The display control blockmay be further configured to output image frames to the display(s)via the display interface. In some examples, the display control blockmay additionally or alternatively perform post-processing of image data provided based on execution of the system memoryby the processing unit.

440 131 440 131 131 131 127 131 131 127 450 The display interfacemay be configured to cause the display(s)to display image frames. The display interfacemay output image data to the display(s)according to an interface protocol, such as, for example, the MIPI DSI (Mobile Industry Processor Interface, Display Serial Interface). That is, the display(s), may be configured in accordance with MIPI DSI standards. The MIPI DSI standard supports a video mode and a command mode. In examples where the display(s)is/are operating in video mode, the display processormay continuously refresh the graphical content of the display(s). For example, the entire graphical content may be refreshed per refresh cycle (e.g., line-by-line). In examples where the display(s)is/are operating in command mode, the display processormay write the graphical content of a frame to a buffer.

127 131 127 450 127 450 450 In some such examples, the display processormay not continuously refresh the graphical content of the display(s). Instead, the display processormay use a vertical synchronization (Vsync) pulse to coordinate rendering and consuming of graphical content at the buffer. For example, when a Vsync pulse is generated, the display processormay output new graphical content to the buffer. Thus, generation of the Vsync pulse may indicate that current graphical content has been rendered at the buffer.

131 445 455 450 445 440 450 445 450 455 450 131 445 440 455 Frames are displayed at the display(s)based on a display controller, a display client, and the buffer. The display controllermay receive image data from the display interfaceand store the received image data in the buffer. In some examples, the display controllermay output the image data stored in the bufferto the display client. Thus, the buffermay represent a local memory to the display(s). In some examples, the display controllermay output the image data received from the display interfacedirectly to the display client.

455 131 131 445 445 131 131 455 The display clientmay be associated with a touch panel that senses interactions between a user and the display(s). As the user interacts with the display(s), one or more sensors in the touch panel may output signals to the display controllerthat indicate which of the one or more sensors have sensor activity, a duration of the sensor activity, an applied pressure to the one or more sensor, etc. The display controllermay use the sensor outputs to determine a manner in which the user has interacted with the display(s). The display(s)may be further associated with/include other devices, such as a camera, a microphone, and/or a speaker, that operate in connection with the display client.

104 1 2 3 1 2 410 131 Some processing techniques of the devicemay be performed over three stages (e.g., stage: a rendering stage; stage: a composition stage; and stage: a display/transfer stage). However, other processing techniques may combine the composition stage and the display/transfer stage into a single stage, such that the processing technique may be executed based on two total stages (e.g., stage: the rendering stage; and stage: the composition/display/transfer stage). During the rendering stage, the GPUmay process a content buffer based on execution of an application that generates content on a pixel-by-pixel basis. During the composition and display stage(s), pixel elements may be assembled to form a frame that is transferred to a physical display panel/subsystem (e.g., the displays) that displays the frame.

Instructions executed by a CPU (e.g., software instructions) or a display processor may cause the CPU or the display processor to search for and/or generate a composition strategy for composing a frame based on a dynamic priority and runtime statistics associated with one or more composition strategy groups. A frame to be displayed by a physical display device, such as a display panel, may include a plurality of layers. Also, composition of the frame may be based on combining the plurality of layers into the frame (e.g., based on a frame buffer). After the plurality of layers are combined into the frame, the frame may be provided to the display panel for display thereon. The process of combining each of the plurality of layers into the frame may be referred to as composition, frame composition, a composition procedure, a composition process, or the like.

A frame composition procedure or composition strategy may correspond to a technique for composing different layers of the plurality of layers into a single frame. The plurality of layers may be stored in doubled data rate (DDR) memory. Each layer of the plurality of layers may further correspond to a separate buffer. A composer or hardware composer (HWC) associated with a block or function may determine an input of each layer/buffer and perform the frame composition procedure to generate an output indicative of a composed frame. That is, the input may be the layers and the output may be a frame composition procedure for composing the frame to be displayed on the display panel.

Some aspects of display processing may utilize different types of mask layers, e.g., a shape mask layer. A mask layer is a layer that may represent a portion of a display or display panel. For instance, an area of a mask layer may correspond to an area of a display, but the entire mask layer may depict a portion of the content that is actually displayed at the display or panel. For example, a mask layer may include a top portion and a bottom portion of a display area, but the middle portion of the mask layer may be empty. In some examples, there may be multiple mask layers to represent different portions of a display area. Also, for certain portions of a display area, the content of different mask layers may overlap with one another. Accordingly, a mask layer may represent a portion of a display area that may or may not overlap with other mask layers.

5 FIG. 500 500 502 506 502 506 504 illustrates a diagramshowing an example of image content for AR/MR, in accordance with one or more techniques of this disclosure. As described herein, AR/MR image content may be sparse in layers. That is, much of a layer associated with image content may be empty of virtual objects. As shown in diagram, an image framemay include virtual objects/content, which may comprise a number of layers. The image frame, where the virtual object(s)/contentare absent, may comprise transparent area.

506 506 506 506 504 506 502 In some scenarios, the virtual object(s)/contentmay comprise sparse content of the layer(s) in which the virtual object(s)/contentis included. As one example, an amount of the virtual object(s)/contentthat does not meet a threshold (e.g., the amount is less than, or is less than or equal to, the threshold) may be considered sparse content. The amount of the virtual object(s)/contentmay be one or more of a number, a size, a total area, etc., of objects in a given layer. As another example, an amount (e.g., an area) of the transparent areathat meets a threshold, e.g., is greater than or is greater than or equal to the threshold, may be indicative of sparse content. In one illustrative scenario, the four virtual objects representing the virtual object(s)/content, by way of example, may each comprise a separate layer in the image frame.

Thus, each layer may be individually rendered and then individually encoded and transmitted/provided for a display, despite the sparse content therein. Such handling of sparse content for layers leads to increased power consumption for memory and processors, increased encoder concurrency, and increased power for transmission / provision of rendered content for display.

6 FIG. 600 800 127 198 600 602 602 illustrates a diagramshowing an example of an atlas of sparse layers, in accordance with one or more techniques of this disclosure. Aspects of diagrammay be performed by a display processor (e.g., the display processor/the sparse content atlas generator). Diagramshows an image framethat may comprise a number of layers. In aspects, the image framemay be associated with image content from an application, e.g., a gaming engine and/or the like, and may be associated with XR content, such as split AR/MR content.

604 1 606 2 608 3 602 604 606 608 600 610 612 1 614 2 615 3 610 604 606 608 612 1 614 2 615 3 As shown, by way of example, a layer(e.g., layer), a layer(layer), and a layer(layer) may comprise the image frame. Each of the layer, the layer, and the layer, as shown for the illustrative example in diagram, may include transparent area(e.g., area without virtual content/objects), as well as virtual objects/contentfor layer, virtual objects/contentfor layer, and virtual objects/contentfor layer. As the transparent areacomprises most of the layer, the layer, and the layer(e.g., the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s) / contentfor layermay fail to meet a threshold condition), these layers may be layers with sparse content. As noted herein, individual handling/operations for layers of images/image frames with sparse content layers may lead to inefficiencies.

650 650 650 616 618 620 622 616 604 606 608 612 1 614 2 615 3 616 616 618 612 1 614 2 615 3 622 612 1 614 2 615 3 Aspects herein provide for merging and/or rearranging a number the layers having sparse content (e.g., a set of layers, all layers, and/or the like) into a single atlas, such as an atlasof sparse layers, after rendering so that the atlasrepresents a single image frame for display processing, rather than processing multiple sparse frames individually. The atlasof sparse layers may comprise an RGB atlasand an alpha atlas(which may be stacked/stitched, e.g., vertically or horizontally, as a stitched atlasor a stitched RGBA atlas), and a depth map atlas. The RGB atlasmay comprise the sparse content from the layer, the layer, and the layer: the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s)/contentfor layer. In aspects, the virtual object(s)/content may be arranged in the RGB atlasaccording to respective bounding boxes, of the virtual object(s)/content, in such a manner that the RGB atlasis tightly packed (e.g., the bounding boxes may be arranged to take up the least, or approximately the least, area). The alpha atlasmay comprise alpha channel information associated with the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s)/contentfor layer. The depth map atlasmay comprise depth information/representations of the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s)/contentfor layer.

650 624 626 1 0 624 612 1 614 2 615 3 610 624 612 1 614 2 615 3 In aspects, the atlasmay have associated therewith an occupancy mapand metadata. In some aspects, an occupancy map may be a 2D matrix-like data structure which may have the same size as an associated RGBA atlas. In an occupancy map, each element may beor, by way of example, depending on whether the corresponding element in the RGBA atlas has a virtual object or background, respectively. In aspects, the occupancy mapmay be various types of data structures representative of first pixels that correspond to the virtual objects (e.g., the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s)/contentfor layer) that may be mapped to a first value (e.g., 1 or 0) and second pixels that correspond to locations outside of the virtual objects (e.g., the transparent area) that may be mapped to a second value (e.g., conversely 0 or 1). In aspects, information included for the occupancy mapmay be utilized after encodes and decodes of boundary pixels (e.g., for the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and/or the virtual object(s)/contentfor layer) that have been smoothed out (e.g., to prevent pixels which do not exist in the input frames from being generated inadvertently during display processing).

626 650 628 650 630 650 632 650 634 650 636 630 650 636 650 650 In aspects, the metadatamay include information associated with the atlas, such as but without limitation, a number of layersrepresented by the atlas, layer informationfor each layer in the atlas, a margin(e.g., a value applied/added to dimensions of the bounding boxes for generation of the atlas, described in further detail herein), a number of bounding boxesassociated with the layers represented by the atlas, bounding box information(e.g., locations, sizes, etc. of the bounding boxes), and/or the like. The layer informationmay include information such as position, orientation, order of composition, plane parameters (which may be optional aspects based on the application utilizing a depth map) for warping, and/or the like, for each layer comprising the atlas. The bounding box informationmay include information such as a corresponding layer index, an original position in a corresponding input layer, a position in the atlas, and/or the like, for each bounding box associated with the atlas.

624 612 1 614 2 615 3 616 618 620 622 624 626 Thus, aspects also enable the creation of an appropriate/a corresponding occupancy map (e.g., the occupancy map) of the virtual objects (e.g., the virtual object(s)/contentfor layer, the virtual object(s)/contentfor layer, and the virtual object(s)/contentfor layer) in the layers, and three encoder sessions (e.g., for the RGB atlasand the alpha atlas(e.g., the stitched atlas) and the depth map atlaswith lossy/lossless compression, and for the occupancy mapwith lossless compression), as well as creation and encoding of the metadatawith lossless compression, e.g., using an entropy encoding.

7 FIG. 6 FIG. 700 700 127 198 700 600 726 738 702 1 704 2 706 3 700 742 744 732 illustrates a diagramshowing an example of generating an atlas of sparse layers, in accordance with one or more techniques of this disclosure. Aspects of diagrammay be performed by a display processor (e.g., the display processor/the sparse content atlas generator). Diagrammay be an aspect of diagramin, and illustrates generation of an RGB atlas, and metadataassociated therewith, based on a first layer(layer), a second layer(layer), and a third layer(layer), by way of illustrative example. Diagramand bounding boxes therein may be described with respect to dimensions (e.g., height(s) ‘h’and width(s) ‘w’) and applied/added margin ‘m’.

746 702 748 704 750 706 726 Aspects herein enable the creation of an atlas of sparse layers using bounding boxes of all the layers while keeping a defined margin (e.g., approximately a smallest coding block size) between neighboring bounding boxes. For example, aspects enable identifying/generating bounding boxes for virtual objects (e.g., for virtual objects/contentfor the first layer, virtual objects/contentfor the second layer, and/or virtual objects/contentfor the third layer), which may be either provided by an application, such a game engine, etc., or detected using a DL model(s), of all the sparse layers, and grouping overlapping bounding boxes of a layer into one bigger bounding box. For instance, to generate the RGB atlas, a display processor may be configured to bound, for each virtual object in each sparse layer of a set of sparse layers, a virtual object with a bounding box, of a set of bounding boxes, that surrounds the virtual object.

702 708 746 710 746 704 712 748 706 714 750 732 742 744 708 710 712 714 As one example, for the first layer, a bounding boxmay bound (with minimal dimensions [h1, w1] and an original position (x1, y1)) a first portion of the virtual object(s)/content, and a bounding boxmay bound (with minimal dimensions [h2, w2] and an original position (x2, y2)) a second portion of the virtual object(s)/content. For the second layer, a bounding boxmay bound (with minimal dimensions [h3, w3] and an original position (x3, y3)) the virtual object(s)/content. For the third layer, and a bounding boxmay bound (with minimal dimensions [h4, w4] and an original position (x4, y4)) the virtual object(s)/content. The margin ‘m’may be added to the height ‘h’and to the width ‘w’for each of the generated/identified bounding boxes, e.g., the bounding box, the bounding box, the bounding box, and the bounding box, to increase the corresponding dimensions to adjusted minimum dimensions.

732 716 746 718 746 704 720 748 706 722 750 Accordingly, the positions of the bounding boxes may also be adjusted to account for the margin ‘m’, as shown, resulting in an adjusted bounding boxthat may bound (with adjusted minimal dimensions [h1+2m, w1+2m] and an adjusted position (x1−m, y1−m)) the first portion of the virtual object(s)/content, and an adjusted bounding boxthat may bound (with adjusted minimal dimensions [h2+2m, w2+2m] and an adjusted position (x2−m, y2−m)) the second portion of the virtual object(s)/content. For the second layer, an adjusted bounding boxthat may bound (with adjusted minimal dimensions [h3+2m, w3+2m] and an adjusted position (x3−m, y3−m)) the virtual object(s)/content. For the third layer, and an adjusted bounding boxthat may bound (with adjusted minimal dimensions [h4+2m, w4+2m] and an adjusted position (x4−m, y4−m)) the virtual object(s)/content. Aspects herein also provide for positioning references of bounding boxes to be other corners or portions thereof (e.g., a center) instead of a top left corner, as shown by way of example.

702 746 708 716 710 718 716 718 726 Regarding the first layer, having multiple portions of the virtual object(s)/contentin separate bounding boxes (e.g., the bounding box/the adjusted bounding box, the bounding box/the adjusted bounding box) that overlap each other, the overlapping, adjusted bounding boxes (e.g., the adjusted bounding box, the adjusted bounding box) may be grouped. As one example, to generate the RGB atlas, a display processor may be configured to group, for a subset of the set of sparse layers comprising overlapping bounding boxes, a set of overlapping bounding boxes in each sparse layer of the subset with an outer bounding box, of a set of outer bounding boxes, that surrounds the set of overlapping bounding boxes

726 702 700 702 704 706 700 716 718 716 718 724 702 724 716 718 732 746 704 706 For instance, to generate the RGB atlas, a display processor may be configured to bound, for a subset (e.g., the first layerin diagram) of the set of sparse layers (e.g., the first layer, the second layer, and the third layerin diagram) comprising overlapping bounding boxes (e.g., the adjusted bounding box, the adjusted bounding box), a set of overlapping bounding boxes (e.g., the adjusted bounding box, the adjusted bounding box) in each sparse layer of the subset with an outer bounding box, of a set of outer bounding boxes, that surrounds the set of overlapping bounding boxes. For instance, in the first layer, the outer bounding boxmay bound (with adjusted minimal dimensions [h2+2m, w2+x2−x1+2m] and an adjusted position (x1−m, y1−m) (e.g., based on the adjusted bounding boxand the adjusted bounding boxso as to minimally bound with the margin ‘m’applied)) the first portion and the second portion of the virtual object(s)/content. Aspects also provide for a display processor to be configured to skip, or refrain from, the grouping of bounding boxes for layers (e.g., the second layerand the third layer) that do not include overlapping bounding boxes.

726 700 726 746 724 748 720 750 722 732 738 726 728 726 700 730 726 732 726 734 726 700 736 730 726 736 702 724 704 720 706 722 726 726 The RGB atlasmay thus be generated by a display processor based on the aspects described in diagram, as one example. As shown, the RGB atlasmay include the virtual object(s)/contentin the outer bounding box, the virtual object(s)/contentin the adjusted bounding box, and the virtual object(s)/contentin the adjusted bounding box, and may have dimensions [h2+h3+4m, w2+x2−x1+2m] (e.g., a minimal bounding with the margin ‘m’applied). Accordingly, the merger of the set of sparse layers that includes the sparse content may be based on a smallest overall area for an arrangement of the set of bounding boxes. The metadatamay be generated to include information associated with the RGB atlas, such as but without limitation, a number of layersrepresented by the RGB atlas(e.g., 3 layers in diagram), layer informationfor each layer in the RGB atlas, the margin ‘m’(e.g., a value applied/added to dimensions of the bounding boxes for generation of the RGB atlas), a number of bounding boxesassociated with the layers represented by the RGB atlas(e.g., 4 bounding boxes in diagram), bounding box information(e.g., locations (x, y), sizes [h, w], etc. of the bounding boxes), and/or the like. The layer informationmay include information such as position, orientation, order of composition, plane parameters (which may be optional aspects based on the application utilizing a depth map) for warping, and/or the like, for each layer comprising the RGB atlas. The bounding box informationmay include information such as a corresponding layer index (e.g., an index to the first layerfor the outer bounding box, an index to the second layerfor the adjusted bounding box, and an index to the third layerfor the adjusted bounding box), an original position (e.g., (x1, y1), (x2, y2), (x3, y3), (x4, y4)) in a corresponding input layer, a position in the RGB atlas, and/or the like, for each bounding box associated with the RGB atlas.

8 FIG. 6 FIG. 7 FIG. 800 800 127 198 131 199 800 600 700 802 804 822 illustrates a diagramshowing an example of a server-client pipeline for utilizing an atlas of sparse layers, in accordance with one or more techniques of this disclosure. Aspects of diagrammay be performed by a display processor (e.g., the display processor/the sparse content atlas generator) and/or by a display (e.g., the display(s)/the sparse content atlas generator). Diagrammay be an aspect of diagraminand/or of diagramin, and illustrates a pipeline between a server deviceand a client device(e.g., for split AR/MR) in the context of an atlasof sparse layers.

802 804 802 804 822 In aspects, the server devicemay comprise a wireless communication device (e.g., a smart phone and/or the like), and the client devicemay comprise a display (e.g., a headset, a mobile device display, XR display glasses, an automotive display, etc.). In some aspects, the server deviceand the client devicemay communicate, e.g., wirelessly, image content via the atlasof sparse layers.

802 806 808 810 812 814 808 816 810 818 812 820 800 The server devicemay receive input layers, e.g., comprising a first layer, a second layer, a third layer, etc., which may include sparse content, from an application (e.g., such as but not limited to, a gaming engine for XR), based on an amount of virtual objects/content therein meeting a threshold condition and/or based on an amount of transparent areatherein. The first layermay include virtual objects/content, the second layermay include virtual objects/content, and the third layermay include virtual objects/content, each of which may represent sparse content for their respective layers in the illustrated example of diagram.

6 7 FIGS., 6 FIG. 6 FIG. 7 FIG. 806 821 822 822 824 826 824 828 826 822 830 624 832 626 738 822 833 834 822 804 830 832 822 804 As similarly described above with respect to, the input layersmay be utilized, e.g., by a display processor, to generate (at) the atlasof sparse layers. The atlasmay comprise an alpha atlas, an RGB atlas(which may be stitched/stacked with the alpha atlas), and a depth mapof the RGB atlas. The atlasmay be associated with/include an occupancy map(e.g., an aspect of the occupancy mapin) and metadata(e.g., an aspect of the metadatainand/or the metadatain). The atlasmay be lossy/lossless encoded, by an encoder, as a single frame/as a single encoding session, and an encoded atlas, e.g., an encoded representation of the atlas, may be transmitted/provided to the client device(e.g., via Wi-Fi™, Bluetooth™, etc.). The occupancy mapand the metadatamay be losslessly encoded, in an encoding session(s) that is different than that used for the atlas, and be transmitted/provided to the client device(e.g., via Wi-Fi™, Bluetooth™, etc.).

804 834 830 834 832 834 804 834 835 822 824 826 828 826 830 832 The client devicemay receive the encoded atlas, the occupancy map(e.g., as separately encoded from the encoded atlas), and the metadata(e.g., as separately encoded from the encoded atlas), and perform respective decodes thereon. The client devicemay be configured to decode the encoded atlasusing a decoderto obtain the atlaswith the alpha atlas, the RGB atlas, and the depth mapof the RGB atlas. Utilizing a separate decode(s), the occupancy mapand the metadatamay be similarly obtained.

804 837 826 842 824 828 830 832 808 810 812 804 838 840 846 840 838 808 810 812 844 840 844 804 The client devicemay be configured to convert (at) the RGB atlasto individual, separated layersbased on the alpha atlas, the depth map, the occupancy map, and the metadata(e.g., to obtain the first layer, the second layer, the third layer, etc.). In aspects, the client devicemay comprise a compositorthat is configured to generate a local layer(e.g., for split AR/MR content) having local virtual objects/content. The local layermay be combined or composited at/by the compositorwith the first layer, the second layer, the third layer, etc., to generate composed output(e.g., a composed layer in which the local layeris included). The composed outputmay be stored in a memory and/or provided for display to a user by the client device.

9 FIG. 6 FIG. 7 FIG. 8 FIG. 900 900 127 198 131 199 900 600 700 800 938 904 922 illustrates a diagramshowing examples of layer composition for an atlas of sparse layers, in accordance with one or more techniques of this disclosure. Aspects of diagrammay be performed by a display processor (e.g., the display processor/the sparse content atlas generator) and/or by a display (e.g., the display(s)/the sparse content atlas generator). Diagrammay be an aspect of diagramin, of diagramin, and/or of diagramin, and illustrates layer composition by a compositorat a client device(e.g., for split AR/MR) in the context of an atlasof sparse layers.

8 FIG. 900 904 904 935 922 924 926 928 926 930 932 As similarly described above for, in diagram, the client devicemay receive an encoded atlas, an occupancy map, and metadata, and perform respective decodes thereon. The client devicemay be configured to decode the encoded atlas using a decoderto obtain the atlaswith an alpha atlas, an RGB atlas, and a depth mapof the RGB atlas. Utilizing a separate decode(s), the occupancy mapand the metadatamay be similarly obtained.

904 937 926 942 924 928 930 932 908 910 912 914 908 916 910 918 912 920 900 The client devicemay be configured to convert (at) the RGB atlasto individual, separated layersbased on the alpha atlas, the depth map, the occupancy map, and the metadata(e.g., to obtain the first layer, the second layer, the third layer, etc.), which may include sparse content, from an application (e.g., such as but not limited to, a gaming engine for XR), based on an amount of virtual objects/content therein meeting a threshold condition and/or based on an amount of transparent areatherein. The first layermay include virtual objects/content, the second layermay include virtual objects/content, and the third layermay include virtual objects/content, each of which may represent sparse content for their respective layers in the illustrated example of diagram.

938 940 946 940 938 908 910 912 944 940 938 908 910 912 948 938 945 948 944 944 904 In aspects, the compositormay be configured to generate a local layer(e.g., for split AR/MR content) having local virtual objects/content. The local layermay be combined or composited at/by the compositorwith the first layer, the second layer, the third layer, etc., to generate composed output. In some aspects, the local layermay be combined or composited at/by the compositorwith the first layer, the second layer, the third layer, etc., together or individually (e.g., composed by layer) by a pixel shader. The client device and/or the compositormay be configured to determine (at) if the layers are to be composed individually or together. Based on individual composition or on composition together by the pixel shader, the composed outputmay be generated. The composed outputmay be stored in a memory and/or provided for display to a user by the client device.

10 FIG. 1000 1002 1004 1000 1002 127 198 1004 131 199 is a call flow diagramillustrating example communications between a display processorand a displaybased on/associated with one or more techniques of this disclosure. In aspects, call flow diagramis described for multi-layer sparse content handling for split AR/MR. In an example, the display processormay be or include the display processor/the sparse content atlas generator. In an example, the displaymay be or include the display(s)/the sparse content atlas generator.

1006 1002 1006 1012 1002 1012 1012 1002 1006 1012 1002 1012 1012 1012 1006 1012 1002 1012 1012 1012 1006 1012 1002 1006 1012 1002 1012 1012 At, the display processormay be configured to generate an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content. In some aspects, to generate (at) the atlas, the display processormay be configured to bound, for each virtual object in each sparse layer of the set of sparse layers, a virtual object with a bounding box, of a set of bounding boxes, that surrounds the virtual object. In such aspects, the atlasmay comprise the set of bounding boxes and associated virtual objects. In aspects, each bounding box may comprise minimum dimensions by which a corresponding virtual object is respectively bounded. In such aspects, to generate the atlas, the display processormay be configured to increase, for each virtual object in each sparse layer of the set of sparse layers, the minimum dimensions for a corresponding bounding box, to adjusted minimum dimensions, by a margin value. The merger of the set of sparse layers that includes the sparse content may be based on a smallest overall area for an arrangement of the set of bounding boxes. In some aspects, to generate (at) the atlas, the display processormay be configured to bound, for a subset of the set of sparse layers comprising overlapping bounding boxes, a set of overlapping bounding boxes in each sparse layer of the subset with an outer bounding box, of a set of outer bounding boxes, that surrounds the set of overlapping bounding boxes. In such aspects, the atlasmay comprise the set of outer bounding boxes and the associated virtual objects. In some aspects, the atlasmay comprise an occupancy map associated with virtual objects represented by the atlas, and to generate (at) the atlas, the display processormay be configured to generate the occupancy map as a data structure representative of first pixels that correspond to the virtual objects mapped to a first value and second pixels that correspond to locations outside of the virtual objects mapped to a second value. In some aspects, the atlascomprises a set of metadata. The set of metadata may include at least one of: an indication of a number of the set of sparse layers, sparse layer information comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers, a margin added to bounding boxes, a number of bounding boxes that respectively surround virtual objects represented by the atlas, bounding box information comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the atlas, and/or the like. In some aspects, the set of sparse layers may comprise a set of input layers associated with the image content, and to generate (at) the atlas, the display processormay be configured to generate the set of metadata based on at least one of the set of sparse layers associated with the image content or the bounding boxes. In some aspects, to generate (at) the atlas, the display processormay be configured to generate an alpha atlas based on alpha channel values associated with the atlas, and/or to stitch the atlastogether with the alpha atlas.

1008 1002 1012 1008 1012 1002 1012 1008 1012 1002 1012 1008 1012 1002 1012 1008 1012 1002 1012 At, the display processormay be configured to encode the atlasin a first encoding session. In some aspects, to encode (at) the atlasin a first encoding session, the display processormay be configured to encode the atlasin the first encoding session with the alpha atlas. In some aspects, to encode (at) the atlasin a first encoding session, the display processormay be configured to encode the atlasin the first encoding session and to encode the alpha atlas in a second encoding session. In some aspects, to encode (at) the atlasin a first encoding session, the display processormay be configured to encode the atlasas a single frame. In some aspects, to encode (at) the atlasin a first encoding session, the display processormay be configured to encode the atlasas lossy/lossless encoded.

1010 1002 1010 1002 1010 1002 At, the display processormay be configured to encode an occupancy map and/or metadata in a different encoding session than the first encoding session. In some aspects, to encode (at) an occupancy map and/or metadata, the display processormay be configured to encode based on a lossless encode. In some aspects, to encode (at) metadata, the display processormay be configured to encode losslessly based on an entropy encode.

1002 1004 1012 1012 1002 1012 1002 1004 1012 1012 The display processormay be configured to transmit/provide (e.g., output), and the displaymay be configured to receive, the atlasas an encoded representation of the image content. In some aspects, to output the atlas, as encoded, the display processormay be configured to output the encoded occupancy map and/or the encoded metadata. In some aspects, to output the atlas, as encoded, the display processormay be configured to provide, for the display, the atlasas the encoded representation of the image content and/or to store, in a memory, the atlasas the encoded representation of the image content.

1014 1004 1012 1004 1004 At, the displaymay be configured to decode the atlas(as encoded) in a first decoding session to obtain the set of sparse layers. In aspects, the encoded atlas may include an encoded alpha atlas, and the alpha atlas associated with the encoded alpha atlas may be based on alpha channel values associated with the encoded atlas that is stitched together with, or separately encoded from, the encoded atlas. In some aspects, to decode the encoded atlas in the first decoding session, the displaymay be configured to: decode the encoded atlas in the first decoding session with the encoded alpha atlas to obtain the alpha atlas, or decode the encoded atlas in the first decoding session and decode the encoded alpha atlas in a second decoding session to obtain the alpha atlas. In some aspects, to decode the encoded atlas in the first decoding session, the displaymay be configured to decode the encoded atlas as a single frame. In some aspects, a first number of decoding sessions comprising the first decoding session may be less than a second number of the set of sparse layers. The encoded atlas may include a set of virtual objects associated with the set of sparse layers, and each virtual object in each sparse layer of the set of sparse layers may be bound by a bounding box, of a set of bounding boxes, that surrounds the virtual object. In some aspects, each bounding box may comprise minimum dimensions by which a corresponding virtual object is respectively bounded. In some aspects each bounding box may comprise dimensions of a minimum value by which the corresponding virtual object is respectively bounded plus an increased margin value. In some aspects, the merger of the set of sparse layers that includes the sparse content may be based on a smallest overall area for an arrangement of the set of bounding boxes, and, for a subset of the set of sparse layers, the set of bounding boxes may comprise an outer bounding box that bounds two or more virtual objects in the set of virtual objects, where the outer bounding box may be based on a set of overlapping bounding boxes respectively associated with the two or more virtual objects in a sparse layer of the subset.

1016 1004 1004 1004 At, the displaymay be configured to decode an encoded occupancy map and/or encoded metadata in a different decoding session than the first decoding session. The encoded atlas may comprise an encoded occupancy map associated with virtual objects represented by the encoded atlas, and the encoded occupancy map may comprise a data structure representative of first pixels that correspond to the virtual objects mapped to a first value and second pixels that correspond to locations outside of the virtual objects mapped to a second value. The encoded atlas may comprise an encoded set of metadata, and the encoded set of metadata may include at least one of: an indication of a number of the set of sparse layers, sparse layer information comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers, a margin added to bounding boxes, a number of bounding boxes that respectively surround virtual objects represented by the encoded atlas, bounding box information comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the encoded atlas, and/or the like. In some aspects, the displaymay be configured to decode the encoded set of metadata in a different decoding session than the first decoding session to obtain a decoded set of metadata. In some aspects, the displaymay be configured to decode the encoded occupancy map in a different decoding session than the first decoding session.

1018 1004 1004 1004 1004 1004 At, the displaymay be configured to output the set of sparse layers as a representation of the image content. In some aspects, to output the set of sparse layers as the representation of the image content, the displaymay be configured to compose the set of sparse layers, by a pixel shader of a compositor, individually or as a group to generate a composed layer. In some aspects, to output the set of sparse layers as the representation of the image content, the displaymay be configured to provide, for a display panel, the composed layer. In some aspects, to output the set of sparse layers as the representation of the image content, the displaymay be configured to store, in a memory, the composed layer. In aspects, to compose the set of sparse layers, by the pixel shader, individually or as the group, the displaymay be configured to compose the set of sparse layers in association with a locally-generated layer associated with the compositor, where the locally-generated layer is included in the composed layer.

11 FIG. 1 10 FIGS.- 1100 104 198 is a flowchartof an example method of display processing in accordance with one or more techniques of this disclosure. The method may be performed by an apparatus, such as an apparatus for display processing, a display processing unit (DPU) or other display processor, a wireless communication device, and the like, as used in connection with the aspects of. In an example, the method may be associated with multi-layer sparse content handling for split AR/MR at a device (e.g., the device). In an example, the method may be performed by the sparse content atlas generator.

1102 1006 1002 821 616 650 822 826 922 926 604 606 608 702 704 706 808 810 812 908 910 912 604 606 608 702 704 706 808 810 812 908 910 912 506 612 614 615 746 748 750 816 818 820 916 918 920 604 606 608 702 704 706 808 810 812 908 910 912 502 602 1006 821 1012 616 650 822 826 922 926 1002 700 746 748 750 604 606 608 702 704 706 808 810 812 908 910 912 708 710 712 714 746 748 750 1012 616 650 822 826 922 926 708 710 712 714 746 748 750 708 710 712 714 742 744 746 748 750 821 1012 616 650 822 826 922 926 1002 746 748 750 604 606 608 702 704 706 808 810 812 908 910 912 742 744 708 710 712 714 716 718 720 722 732 604 606 608 702 704 706 808 810 812 908 910 912 506 612 614 615 746 748 750 816 818 820 916 918 920 726 708 710 712 714 716 718 720 722 724 1006 821 1012 616 650 822 826 922 926 1002 700 702 604 606 608 702 704 706 808 810 812 908 910 912 708 710 716 718 708 710 716 718 702 724 724 708 710 716 718 1012 616 650 822 826 922 926 724 746 1012 616 650 822 826 922 926 624 830 930 506 612 614 615 746 748 750 816 818 820 916 918 920 1012 616 650 822 826 922 926 1006 821 1012 616 650 822 826 922 926 1002 624 830 930 506 612 614 615 746 748 750 816 818 820 916 918 920 9 506 610 814 914 506 612 614 615 746 748 750 816 818 820 916 918 920 1 0 1012 616 650 822 826 922 926 626 738 832 932 626 738 832 932 628 728 604 606 608 702 704 706 808 810 812 908 910 912 630 730 604 606 608 702 704 706 808 810 812 908 910 912 732 708 710 712 714 634 734 708 710 712 714 716 718 720 722 724 1012 616 650 822 826 922 926 636 736 1012 616 650 822 826 922 926 604 606 608 702 704 706 808 810 812 908 910 912 502 602 1006 821 1012 616 650 822 826 922 926 1002 626 738 832 932 604 606 608 702 704 706 808 810 812 908 910 912 502 602 708 710 712 714 716 718 720 722 724 1006 821 1012 616 650 822 826 922 926 1002 618 824 8 924 1012 616 650 822 826 922 926 620 1012 618 824 8 924 1102 198 10 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 5 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 6 FIG. 9 FIG. At, the apparatus may generate an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content. For example, referring to, at, the display processormay be configured to generate (e.g., at) an atlas (e.g.,,in;,in;,in) of a set of sparse layers (e.g.,,,in;,,in;,,in;,,in) based on a merger of each of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) that include sparse content (e.g.,in;,,in;,,in;,,in;,,in), where the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) is associated with image content (e.g., ofin; ofin). In some aspects, to generate (at(e.g., at)) the atlas(e.g.,,in;,in;,in), the display processormay be configured to bound (e.g., forin), for each virtual object (e.g., for,,in) in each sparse layer of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), a virtual object with a bounding box, of a set of bounding boxes (e.g.,,,,in), that surrounds the virtual object (e.g., for,,in). In such aspects, the atlas(e.g.,,in;,in;,in) may comprise the set of bounding boxes (e.g.,,,,in) and associated virtual objects (e.g., for,,in). In aspects, each bounding box (e.g.,,,,in) may comprise minimum dimensions (e.g.,,, [h1, w1], [h2, w2], [h3, w3], [h4, w4] in) by which a corresponding virtual object (e.g., for,,in) is respectively bounded. In such aspects, to generate (e.g., at) the atlas(e.g.,,in;,in;,in), the display processormay be configured to increase (e.g., Add Margin in), for each virtual object (e.g., for,,in) in each sparse layer of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), the minimum dimensions (e.g.,,, [h1, w1], [h2, w2], [h3, w3], [h4, w4] in) for a corresponding bounding box (e.g.,,,,in), to adjusted minimum dimensions (e.g., [h1+2m, w1+2m] for, [h2+2m, w2+2m] for, [h 3+2m, w 3+2m] for, [h 4+2m, w 4+2m] forin), by a margin value (e.g., min). The merger of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) that includes the sparse content (e.g.,in;,,in;,,in;,,in;,,in) may be based on a smallest overall area (e.g., [h2+h3+4m, x2+w2-x1+2m] in) for an arrangement (e.g., inin) of the set of bounding boxes (e.g.,,,,,,,,,in). In some aspects, to generate (at(e.g., at)) the atlas(e.g.,,in;,in;,in), the display processormay be configured to bound (e.g., forin), for a subset (e.g.,in) of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) comprising overlapping bounding boxes (e.g.,/,/in), a set of overlapping bounding boxes (e.g.,/,/in) in each sparse layer of the subset (e.g.,in) with an outer bounding box (e.g.,in), of a set of outer bounding boxes (e.g.,in), that surrounds the set of overlapping bounding boxes (e.g.,/,/in), e.g., two or more bounding boxes. In such aspects, the atlas(e.g.,,in;,in;,in) may comprise the set of outer bounding boxes (e.g.,in) and the associated virtual objects (e.g., forin). In some aspects, the atlas(e.g.,,in;,in;,in) may comprise an occupancy map (e.g.,in;in;in) associated with virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) represented by the atlas(e.g.,,in;,in;,in), and to generate (at(e.g., at)) the atlas(e.g.,,in;,in;,in), the display processormay be configured to generate the occupancy map (e.g.,in;in;in) as a data structure representative of first pixels that correspond to the virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in FIG.) mapped to a first value (e.g., 0/1) and second pixels that correspond to locations (e.g.,in;in;in;in) outside of the virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) mapped to a second value (e.g.,/). In some aspects, the atlas(e.g.,,in;,in;,in) comprises a set of metadata (e.g.,in;in;in;in). The set of metadata (e.g.,in;in;in;in) may include at least one of: an indication of a number (e.g.,in;in) of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), sparse layer information (e.g.,in;in) comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), a margin (e.g., min) added to bounding boxes (e.g.,,,,, in), a number (e.g.,in;in) of bounding boxes (e.g.,,,,,,,,,in) that respectively surround virtual objects represented by the atlas(e.g.,,in;,in;,in), bounding box information (e.g.,in;in) comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the atlas(e.g.,,in;,in;,in), and/or the like. In some aspects, the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) may comprise a set of input layers associated with the image content (e.g., ofin; ofin), and to generate (at(e.g., at)) the atlas(e.g.,,in;,in;,in), the display processormay be configured to generate the set of metadata (e.g.,in;in;in;in) based on at least one of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) associated with the image content (e.g., ofin; ofin) or the bounding boxes (e.g.,,,,,,,,,in). In some aspects, to generate (at(e.g., at)) the atlas(e.g.,,in;,in;,in), the display processormay be configured to generate an alpha atlas (e.g.,in;in FIG,.;in) based on alpha channel values associated with the atlas(e.g.,,in;,in;,in), and to stitch (e.g.,in) the atlastogether with the alpha atlas (e.g.,in;in FIG,.;in). In an example,may be performed by the sparse content atlas generator.

1104 1008 1002 1012 616 650 822 826 922 926 833 1008 1012 616 650 822 826 922 926 833 1002 1012 616 650 822 826 922 926 833 618 824 8 924 1008 833 1012 616 650 822 826 922 926 833 1002 833 1012 616 650 822 826 922 926 1008 1012 616 650 822 826 922 926 833 1002 1012 616 650 822 826 922 926 1010 1002 624 830 930 626 738 832 932 833 1010 624 830 930 626 738 832 932 1002 1010 626 738 832 932 1002 1104 198 10 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. At, the apparatus may encode the atlas in a first encoding session. For example, referring to, at, the display processormay be configured to encode the atlas(e.g.,,in;,in;,in) in a first encoding session (e.g., viain). In some aspects, to encode (at) the atlas(e.g.,,in;,in;,in) in a first encoding session (e.g., viain), the display processormay be configured to encode the atlas(e.g.,,in;,in;,in) in the first encoding session (e.g., viain) with the alpha atlas (e.g.,in;in FIG,.;in). In some aspects, to encode (at) (e.g., viain) the atlas(e.g.,,in;,in;,in) in a first encoding session (e.g., viain), the display processormay be configured to encode (e.g., viain) the atlas(e.g.,,in;,in;,in) as a single frame. In some aspects, to encode (at) the atlas(e.g.,,in;,in;,in) in a first encoding session (e.g., viain), the display processormay be configured to encode the atlas(e.g.,,in;,in;,in) as lossy/lossless encoded. At, the display processormay be configured to encode an occupancy map (e.g.,in;in;in) and/or metadata (e.g.,in;in;in;in) in a different encoding session (e.g., ‘Lossless encoded’ in) than the first encoding session (e.g., viain). In some aspects, to encode (at) an occupancy map (e.g.,in;in;in) and/or metadata (e.g.,in;in;in;in), the display processormay be configured to encode based on a lossless encode (e.g., ‘Lossless encoded’ in). In some aspects, to encode (at) metadata (e.g.,in;in;in;in), the display processormay be configured to encode losslessly (e.g., ‘Lossless encoded’ in) based on an entropy encode. In an example,may be performed by the sparse content atlas generator.

1106 1002 1004 1012 616 650 822 826 922 926 833 834 502 602 1012 616 650 822 826 922 926 833 834 1002 624 830 930 626 738 832 932 1012 616 650 822 826 922 926 833 834 1002 1004 1012 616 650 822 826 922 926 833 834 502 602 1012 616 650 822 826 922 926 833 834 502 602 1106 198 10 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. At, the apparatus may output the encoded atlas as an encoded representation of the image content. For example, referring to, the display processormay be configured to transmit/provide (e.g., output), and the displaymay be configured to receive, the atlas(e.g.,,in;,in;,in) as an encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin). In some aspects, to output the atlas(e.g.,,in;,in;,in), as encoded (e.g., via,in), the display processormay be configured to output the encoded occupancy map (e.g.,in;in;in) and/or the encoded metadata (e.g.,in;in;in;in). In some aspects, to output the atlas(e.g.,,in;,in;,in), as encoded (e.g., via,in), the display processormay be configured to provide, for the display, the atlas(e.g.,,in;,in;,in) as the encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin) and/or to store, in a memory, the atlas(e.g.,,in;,in;,in) as the encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin). In an example,may be performed by the sparse content atlas generator.

12 FIG. 1 10 FIGS.- 1200 104 199 is a flowchartof an example method of display processing in accordance with one or more techniques of this disclosure. The method may be performed by an apparatus, such as an apparatus for display processing, a display, a display controller, a display processing unit (DPU) or other display processor, a wireless communication device, and the like, as used in connection with the aspects of. In an example, the method may be associated with multi-layer sparse content handling for split AR/MR at a device (e.g., the device). In an example, the method may be performed by the sparse content atlas generator.

1202 1002 1004 1012 616 650 822 826 922 926 833 834 502 602 1012 616 650 822 826 922 926 833 834 1002 624 830 930 626 738 832 932 1012 616 650 822 826 922 926 833 834 1002 1004 1012 616 650 822 826 922 926 833 834 502 602 1012 616 650 822 826 922 926 833 834 502 602 1202 199 10 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. At, the apparatus may receive an encoded atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content. For example, referring to, the display processormay be configured to transmit/provide (e.g., output), and the displaymay be configured to receive, the atlas(e.g.,,in;,in;,in) as an encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin). In some aspects, to output the atlas(e.g.,,in;,in;,in), as encoded (e.g., via,in), the display processormay be configured to output the encoded occupancy map (e.g.,in;in;in) and/or the encoded metadata (e.g.,in;in;in;in). In some aspects, to output the atlas(e.g.,,in;,in;,in), as encoded (e.g., via,in), the display processormay be configured to provide, for the display, the atlas(e.g.,,in;,in;,in) as the encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin) and/or to store, in a memory, the atlas(e.g.,,in;,in;,in) as the encoded representation (e.g., via,in) of the image content (e.g., ofin; ofin). In an example,may be performed by the sparse content atlas generator.

1204 1014 1004 835 935 1012 616 650 822 826 922 926 833 834 835 935 837 937 604 606 608 702 704 706 808 810 812 908 910 912 1012 616 650 822 826 922 926 833 834 833 834 618 824 8 924 833 834 616 650 822 826 922 926 833 620 616 650 822 826 922 926 833 835 935 616 650 822 826 922 926 833 835 935 1004 835 935 616 650 822 826 922 926 833 835 935 618 824 8 924 833 618 824 8 924 835 935 616 650 822 826 922 926 833 835 935 1004 835 935 616 650 822 826 922 926 833 835 935 604 606 608 702 704 706 808 810 812 908 910 912 616 650 822 826 922 926 833 506 612 614 615 746 748 750 816 818 820 916 918 920 604 606 608 702 704 706 808 810 812 908 910 912 604 606 608 702 704 706 808 810 812 908 910 912 700 708 710 712 714 746 748 750 708 710 712 714 742 744 746 748 750 708 710 712 714 742 744 746 748 750 732 716 718 720 722 604 606 608 702 704 706 808 810 812 908 910 912 506 612 614 615 746 748 750 816 818 820 916 918 920 726 708 710 712 714 716 718 720 722 724 702 604 606 608 702 704 706 808 810 812 908 910 912 708 710 712 714 716 718 720 722 724 724 746 506 612 614 615 746 748 750 816 818 820 916 918 920 724 708 710 716 718 746 702 1016 1004 624 830 930 626 738 832 932 835 935 616 650 822 826 922 926 833 624 830 930 506 612 614 615 746 748 750 816 818 820 916 918 920 616 650 822 826 922 926 833 624 830 930 506 612 614 615 746 748 750 816 818 820 916 918 920 506 610 814 914 506 612 614 615 746 748 750 816 818 820 916 918 920 1 0 616 650 822 826 922 926 833 626 738 832 932 626 738 832 932 628 728 604 606 608 702 704 706 808 810 812 908 910 912 630 730 604 606 608 702 704 706 808 810 812 908 910 912 732 720 722 724 634 734 708 710 712 714 716 718 720 722 724 506 612 614 615 746 748 750 816 818 820 916 918 920 616 650 822 826 922 926 833 636 736 616 650 822 826 922 926 833 1004 626 738 832 932 835 935 626 738 832 932 1004 624 830 930 835 935 1204 199 10 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 6 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 6 FIG. 9 FIG. 8 FIG. 6 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 7 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 7 FIG. 7 FIG. 6 FIG. 7 FIG. 7 FIG. 5 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 7 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 6 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. At, the apparatus may decode the encoded atlas in a first decoding session to obtain the set of sparse layers. For example, referring to, at, the displaymay be configured to decode (e.g., viain; viain) the atlas(e.g.,,in;,in;,in) (as encoded (e.g., via,in)) in a first decoding session (e.g., viain; viain) to obtain (e.g., atin; atin) the set of sparse layers (e.g.,,,in;,,in;,,in;,,in). In aspects, the encoded atlas(e.g.,,in;,in;,in) (e.g., via,in) may include an encoded alpha atlas (e.g., via,in), and the alpha atlas (e.g.,in;in FIG,.;in) associated with the encoded alpha atlas (e.g., via,in) may be based on alpha channel values associated with the encoded atlas (e.g.,,in;,in;,in) (e.g., viain) that is stitched together (e.g.,in) with the encoded atlas (e.g.,,in;,in;,in) (e.g., viain). In some aspects, to decode (e.g., viain; viain) the encoded atlas (e.g.,,in;,in;,in) (e.g., viain) in the first decoding session (e.g., viain; viain), the displaymay be configured to decode (e.g., viain; viain) the encoded atlas (e.g.,,in;,in;,in) (e.g., viain) in the first decoding session (e.g., viain; viain) with the encoded alpha atlas (e.g.,in;in FIG,.;in) (e.g., viain) to obtain the alpha atlas (e.g.,in;in FIG,.;in). In some aspects, to decode (e.g., viain; viain) the encoded atlas (e.g.,,in;,in;,in) (e.g., viain) in the first decoding session (e.g., viain; viain), the displaymay be configured to decode (e.g., viain; viain) the encoded atlas (e.g.,,in;,in;,in) (e.g., viain) as a single frame. In some aspects, a first number of decoding sessions comprising the first decoding session (e.g., viain; viain) may be less than a second number of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in). The encoded atlas (e.g.,,in;,in;,in) (e.g., viain) may include a set of virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) associated with the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), and each virtual object in each sparse layer of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) may be bound (e.g., forin) by a bounding box, of a set of bounding boxes (e.g.,,,,in), that surrounds the virtual object (e.g., for,,in). In some aspects, each bounding box(e.g.,,,,in) may comprise minimum dimensions (e.g.,,, [h1, w1], [h2, w2], [h3, w3], [h4, w4] in) by which a corresponding virtual object (e.g., for,,in) is respectively bounded. In some aspects each bounding box (e.g.,,,,in) may comprise dimensions (e.g.,,, [h1, w1], [h2, w2], [h3, w3], [h4, w4] in) of a minimum value by which the corresponding virtual object (e.g., for,,in) is respectively bounded plus an increased margin value (e.g., min) (e.g., [h1+2m, w1+2m] for, [h2+2m, w2+2m] for, [h3+2m, w3+2m] for, [h4+2m, w4+2m] forin). In some aspects, the merger of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) that includes the sparse content (e.g.,in;,,in;,,in;,,in;,,in) may be based on a smallest overall area (e.g., [h2+h3+4m, x2+w2−x1+2m] in) for an arrangement (e.g., inin) of the set of bounding boxes (e.g.,,,,,,,,,in), and, for a subset (e.g.,in) of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), the set of bounding boxes (e.g.,,,,,,,,,in) may comprise an outer bounding box (e.g.,in) that bounds two or more virtual objects (e.g., forin) in the set of virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in), where the outer bounding box (e.g.,in) may be based on a set of overlapping bounding boxes (e.g.,/,/in) respectively associated with the two or more virtual objects (e.g., forin) in a sparse layer of the subset (e.g.,in). At, the displaymay be configured to decode an encoded occupancy map (e.g.,in;in;in) and/or encoded metadata (e.g.,in;in;in;in) in a different decoding session than the first decoding session (e.g., viain; viain). The encoded atlas (e.g.,,in;,in;,in) (e.g., viain) may comprise an encoded (e.g., ‘Lossless encoded’ in) occupancy map (e.g.,in;in;in) associated with virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) represented by the encoded atlas (e.g.,,in;,in;,in) (e.g., viain), and the encoded (e.g., ‘Lossless encoded’ in) occupancy map (e.g.,in;in;in) may comprise a data structure representative of first pixels that correspond to the virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) mapped to a first value (e.g., 0/1) and second pixels that correspond to locations (e.g.,in;in;in;in) outside of the virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) mapped to a second value (e.g.,/). The encoded atlas (e.g.,,in;,in;,in) (e.g., viain) may comprise an encoded set of metadata (e.g.,in;in;in;in), and the encoded set of metadata (e.g.,in;in;in;in) may include at least one of: an indication of a number (e.g.,in;in) of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), sparse layer information (e.g.,in;in) comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), a margin (e.g., min) added to bounding boxes (e.g.,,,in), a number (e.g.,in;in) of bounding boxes (e.g.,,,,,,,,,in) that respectively surround virtual objects (e.g., ofin; of,,in; of,,in; of,,in; of,,in) represented by the encoded atlas (e.g.,,in;,in;,in) (e.g., viain), bounding box information (e.g.,in;in) comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the encoded atlas (e.g.,,in;,in;,in) (e.g., viain), and/or the like. In some aspects, the displaymay be configured to decode the encoded set of metadata (e.g.,in;in;in;in) in a different decoding session than the first decoding session (e.g., viain; viain) to obtain a decoded set of metadata (e.g.,in;in;in;in). In some aspects, the displaymay be configured to decode the encoded (e.g., ‘Lossless encoded’ in) occupancy map (e.g.,in;in;in) in a different decoding session than the first decoding session (e.g., viain; viain). In an example,may be performed by the sparse content atlas generator.

1206 1018 1004 604 606 608 702 704 706 808 810 812 908 910 912 502 602 604 606 608 702 704 706 808 810 812 908 910 912 502 602 1004 604 606 608 702 704 706 808 810 812 908 910 912 948 9 838 938 844 944 604 606 608 702 704 706 808 810 812 908 910 912 502 602 1004 844 944 604 606 608 702 704 706 808 810 812 908 910 912 502 602 1004 844 944 604 606 608 702 704 706 808 810 812 908 910 912 948 1004 604 606 608 702 704 706 808 810 812 908 910 912 840 940 838 938 840 940 844 944 1206 199 10 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 9 FIG. 9 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 5 FIG. 6 FIG. 8 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 9 FIG. 9 FIG. 9 FIG. 6 FIG. 7 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. 8 FIG. 9 FIG. At, the apparatus may output the set of sparse layers as a representation of the image content. For example, referring to, at, the displaymay be configured to output the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) as a representation of the image content (e.g., ofin; ofin). In some aspects, to output the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) as the representation of the image content (e.g., ofin; ofin), the displaymay be configured to compose the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), by a pixel shader (e.g.,in FIG.) of a compositor (e.g.,in;in), individually (e.g., ‘Compose by Layer’ in) or as a group (e.g., ‘Compose Layers Together’ in) to generate a composed layer (e.g.,in;in). In some aspects, to output the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) as the representation of the image content (e.g., ofin; ofin), the displaymay be configured to provide, for a display panel, the composed layer (e.g.,in;in). In some aspects, to output the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) as the representation of the image content (e.g., ofin; ofin), the displaymay be configured to store, in a memory, the composed layer (e.g.,in;in). In aspects, to compose the set of sparse layers (e.g.,,,in;,,in;,,in;,,in), by the pixel shader (e.g.,in), individually (e.g., ‘Compose by Layer’ in) or as the group (e.g., ‘Compose Layers Together’ in), the displaymay be configured to compose the set of sparse layers (e.g.,,,in;,,in;,,in;,,in) in association with a locally-generated layer (e.g.,in;in) associated with the compositor (e.g.,in;in), where the locally-generated layer (e.g.,in;in) is included in the composed layer (e.g.,in;in). In an example,may be performed by the sparse content atlas generator.

127 104 104 127 127 127 127 In configurations, a method or an apparatus for display processing is provided. The apparatus may be a display processor, a DPU, a CPU (or other central processor), a display driver integrated circuit (DDIC), an apparatus for display processing, and/or some other processor that may perform display processing. In aspects, the apparatus may be the display processorwithin the device, or may be some other hardware within the deviceor another device. The apparatus, e.g., display processor, may include means for generating an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content. The apparatus, e.g., display processor, may further include means for encoding the atlas in a first encoding session; The apparatus, e.g., display processor, may further include means for outputting the encoded atlas as an encoded representation of the image content. The apparatus, e.g., display processor, may further include means for encoding an occupancy map in a different encoding session than the first encoding session.

131 104 104 131 131 131 131 131 In other configurations, a method or an apparatus for display processing is provided. The apparatus may be a display, a display controller, a display processor, a DPU, a CPU (or other central processor), a display driver integrated circuit (DDIC), an apparatus for display processing, and/or some other processor that may perform display processing. In aspects, the apparatus may be the display(s)within the device, or may be some other hardware within the deviceor another device. The apparatus, e.g., display(s), may include means for receiving an encoded atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, where the set of sparse layers is associated with image content. The apparatus, e.g., display(s), may include means for decoding the encoded atlas in a first decoding session to obtain the set of sparse layers. The apparatus, e.g., display(s), may include means for outputting the set of sparse layers as a representation of the image content. The apparatus, e.g., display(s), may include means for decoding the encoded occupancy map in a different decoding session than the first decoding session. The apparatus, e.g., display(s), may include means for decoding the encoded set of metadata in a different decoding session than the first decoding session to obtain a decoded set of metadata.

It is understood that the specific order or hierarchy of blocks/steps in the processes, flowcharts, and/or call flow diagrams disclosed herein is an illustration of example approaches. Based upon design preferences, it is understood that the specific order or hierarchy of the blocks/steps in the processes, flowcharts, and/or call flow diagrams may be rearranged. Further, some blocks/steps may be combined and/or omitted. Other blocks/steps may also be added. The accompanying method claims present elements of the various blocks/steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.

The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but is to be accorded the full scope consistent with the language of the claims, where reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

Unless specifically stated otherwise, the term “some” refers to one or more and the term “or” may be interpreted as “and/or” where context does not dictate otherwise. Combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” include any combination of A, B, and/or C, and may include multiples of A, multiples of B, or multiples of C. Specifically, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be A only, B only, C only, A and B, A and C, B and C, or A and B and C, where any such combinations may contain one or more member or members of A, B, or C. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. The words “module,” “mechanism,” “element,” “device,” and the like may not be a substitute for the word “means.” As such, no claim element is to be construed as a means plus function unless the element is expressly recited using the phrase “means for.” Unless stated otherwise, the phrase “a processor” may refer to “any of one or more processors” (e.g., one processor of one or more processors, a number (greater than one) of processors in the one or more processors, or all of the one or more processors) and the phrase “a memory” may refer to “any of one or more memories” (e.g., one memory of one or more memories, a number (greater than one) of memories in the one or more memories, or all of the one or more memories).

In one or more examples, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. For example, although the term “processing unit” has been used throughout this disclosure, such processing units may be implemented in hardware, software, firmware, or any combination thereof. If any function, processing unit, technique described herein, or other module is implemented in software, the function, processing unit, technique described herein, or other module may be stored on or transmitted over as one or more instructions or code on a computer-readable medium.

Computer-readable media may include computer data storage media or communication media including any medium that facilitates transfer of a computer program from one place to another. In this manner, computer-readable media generally may correspond to: (1) tangible computer-readable storage media, which is non-transitory; or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and/or data structures for implementation of the techniques described in this disclosure. By way of example, and not limitation, such computer-readable media may include RAM, ROM, EEPROM, compact disc-read only memory (CD-ROM), or other optical disk storage, magnetic disk storage, or other magnetic storage devices. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks usually reproduce data magnetically, while discs usually reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media. A computer program product may include a computer-readable medium.

The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs, e.g., a chip set. Various components, modules or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need realization by different hardware units. Rather, as described above, various units may be combined in any hardware unit or provided by a collection of inter-operative hardware units, including one or more processors as described above, in conjunction with suitable software and/or firmware. Accordingly, the term “processor,” as used herein may refer to any of the foregoing structure or any other structure suitable for implementation of the techniques described herein. Also, the techniques may be fully implemented in one or more circuits or logic elements.

Aspect 1 is a method of display processing, comprising: generating an atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, wherein the set of sparse layers is associated with image content; encoding the atlas in a first encoding session; and outputting the encoded atlas as an encoded representation of the image content. Aspect 2 is the method of aspect 1, wherein generating the atlas includes: bounding, for each virtual object in each sparse layer of the set of sparse layers, a virtual object with a bounding box, of a set of bounding boxes, that surrounds the virtual object; wherein the atlas comprises the set of bounding boxes and associated virtual objects. Aspect 3 is the method of aspect 2, wherein each bounding box comprises minimum dimensions by which a corresponding virtual object is respectively bounded; wherein generating the atlas includes: increasing, for each virtual object in each sparse layer of the set of sparse layers, the minimum dimensions for a corresponding bounding box, to adjusted minimum dimensions, by a margin value. Aspect 4 is the method of aspect 3, wherein the merger of the set of sparse layers that includes the sparse content is based on a smallest overall area for an arrangement of the set of bounding boxes. Aspect 5 is the method of any of aspects 2 to 4, wherein generating the atlas includes: bounding, for a subset of the set of sparse layers comprising overlapping bounding boxes, a set of overlapping bounding boxes in each sparse layer of the subset with an outer bounding box, of a set of outer bounding boxes, that surrounds the set of overlapping bounding boxes; wherein the atlas comprises the set of outer bounding boxes and the associated virtual objects. Aspect 6 is the method of any of aspects 1 to 5, wherein the atlas comprises an occupancy map associated with virtual objects represented by the atlas; wherein generating the atlas includes: generating the occupancy map as a data structure representative of first pixels that correspond to the virtual objects mapped to a first value and second pixels that correspond to locations outside of the virtual objects mapped to a second value; the method further comprising: encoding the occupancy map in a different encoding session than the first encoding session; wherein outputting the encoded atlas includes outputting the encoded occupancy map. Aspect 7 is the method of any of aspects 1 to 6, wherein the atlas comprises a set of metadata, wherein the set of metadata includes at least one of: an indication of a number of the set of sparse layers; sparse layer information comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers; a margin added to bounding boxes; a number of bounding boxes that respectively surround virtual objects represented by the atlas; or bounding box information comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the atlas. Aspect 8 is the method of aspect 7, wherein the set of sparse layers comprises a set of input layers associated with the image content; wherein generating the atlas includes: generating the set of metadata based on at least one of the set of sparse layers associated with the image content or the bounding boxes; the method further comprising: encoding the set of metadata in a different encoding session than the first encoding session; wherein outputting the encoded atlas includes outputting the encoded set of metadata. Aspect 9 is the method of any of aspects 1 to 8, wherein generating the atlas includes at least one of: generating an alpha atlas based on alpha channel values associated with the atlas; or stitching the atlas together with the alpha atlas; wherein encoding the atlas in the first encoding session includes encoding the atlas in the first encoding session with the alpha atlas, or encoding the atlas in the first encoding session and encoding the alpha atlas in a second encoding session. Aspect 10 is the method of any of aspects 1 to 9, wherein encoding the atlas in the first encoding session includes encoding the atlas as a single frame; or wherein a first number of encoding sessions comprising the first encoding session is less than a second number of the set of sparse layers. Aspect 11 is the method of any of aspects 1 to 10, wherein outputting the encoded atlas as the encoded representation of the image content includes at least one of: providing, for a display panel, the encoded atlas as the encoded representation of the image content; or storing, in a memory, the encoded atlas as the encoded representation of the image content. Aspect 12 is a method of display processing, comprising: receiving an encoded atlas of a set of sparse layers based on a merger of each of the set of sparse layers that include sparse content, wherein the set of sparse layers is associated with image content; decoding the encoded atlas in a first decoding session to obtain the set of sparse layers; and outputting the set of sparse layers as a representation of the image content. Aspect 13 is the method of aspect 12, wherein the encoded atlas includes a set of virtual objects associated with the set of sparse layers; wherein each virtual object in each sparse layer of the set of sparse layers is bound by a bounding box, of a set of bounding boxes, that surrounds the virtual object. Aspect 14 is the method of aspect 13, wherein at least one of: each bounding box comprises minimum dimensions by which a corresponding virtual object is respectively bounded, or each bounding box comprises dimensions of a minimum value by which the corresponding virtual object is respectively bounded plus an increased margin value; wherein the merger of the set of sparse layers that includes the sparse content is based on a smallest overall area for an arrangement of the set of bounding boxes; or wherein, for a subset of the set of sparse layers, the set of bounding boxes comprises an outer bounding box that bounds two or more virtual objects in the set of virtual objects, wherein the outer bounding box is based on a set of overlapping bounding boxes respectively associated with the two or more virtual objects in a sparse layer of the subset. Aspect 15 is the method of any of aspects 12 to 14, wherein the encoded atlas comprises an encoded occupancy map associated with virtual objects represented by the encoded atlas, wherein the encoded occupancy map comprises a data structure representative of first pixels that correspond to the virtual objects mapped to a first value and second pixels that correspond to locations outside of the virtual objects mapped to a second value; wherein the method further comprises: decoding the encoded occupancy map in a different decoding session than the first decoding session; wherein outputting the set of sparse layers includes outputting the decoded occupancy map. Aspect 16 is the method of any of aspects 12 to 15, wherein the encoded atlas comprises an encoded set of metadata, wherein the encoded set of metadata includes at least one of: an indication of a number of the set of sparse layers; sparse layer information comprising at least one of a first position, an orientation, an order of composition, or a set of plane parameters for warping for each of the set of sparse layers; a margin added to bounding boxes; a number of bounding boxes that respectively surround virtual objects represented by the encoded atlas; or bounding box information comprising at least one of a corresponding sparse layer index, a corresponding input layer index, an original position associated with an input layer, or a second position in the encoded atlas; wherein the method further comprises: decoding the encoded set of metadata in a different decoding session than the first encoding session to obtain the set of metadata; wherein outputting the set of sparse layers includes outputting the decoded set of metadata. Aspect 17 is the method of any of aspects 12 to 16, wherein the encoded atlas includes an encoded alpha atlas, wherein an alphas atlas associated with the encoded alpha atlas is based on alpha channel values associated with the encoded atlas that is stitched together with, or separately encoded from, the encoded atlas, wherein decoding the encoded atlas in the first decoding session includes decoding the encoded atlas in the first encoding session with the encoded alpha atlas to obtain the alpha atlas, or decoding the encoded atlas in the first decoding session and decoding the encoded alpha atlas in a second decoding session to obtain the alpha atlas; wherein decoding the encoded atlas in the first decoding session includes decoding the encoded atlas as a single frame; or wherein a first number of decoding sessions comprising the first decoding session is less than a second number of the set of sparse layers. Aspect 18 is the method of any of aspects 12 to 17, wherein outputting the set of sparse layers as the representation of the image content includes at least one of: composing the set of sparse layers, by a pixel shader of a compositor, individually or as a group to generate a composed layer; providing, for a display panel, the composed layer; or storing, in a memory, the composed layer. Aspect 19 is the method of aspect 18, wherein composing the set of sparse layers, by the pixel shader, individually or as the group includes at least one of: composing the set of sparse layers in association with a locally-generated layer associated with the compositor, wherein the locally-generated layer is included in the composed layer. Aspect 20 is an apparatus for display processing comprising a processor coupled to a memory and, based on information stored in the memory, the processor is configured to implement a method as in any of aspects 1-19. Aspect 21 may be combined with aspect 20 and comprises that the apparatus is a wireless communication device. Aspect 22 is an apparatus for display processing comprising means for implementing a method as in any of aspects 1-19. Aspect 23 is a computer-readable medium (e.g., a non-transitory computer readable-medium) storing computer executable code, the computer executable code, when executed by a processor, causes the processor to implement a method as in any of aspects 1-19. The following aspects are illustrative only and may be combined with other aspects or teachings described herein, without limitation.

Various aspects have been described herein. These and other aspects are within the scope of the following claims.