Method for removing redeposited veils from etched platinum

1. A method for removing redeposited veils from a platinum electrode formed during etching of the platinum electrode comprising the steps of: a) providing a platinum electrode having redeposited veils formed on the platinum electrode during etching of the platinum electrode; b) etching said platinum electrode of step (a) including employing a high density plasma of an etchant gas to remove said redeposited veils from said platinum electrode.

2. The method of claim 1 wherein said etchant gas of said high density plasma comprises of oxygen.

3. The method of claim 2 wherein said platinum electrode of step (a) additionally comprises a mask layer disposed on a selected part of said platinum electrode to selectively protect said platinum electrode during said etching step (b).

4. The method of claim 3 wherein said platinum electrode of step (a) additionally comprises a protective layer disposed on said selected part of said platinum electrode between said mask layer and said platinum electrode.

5. The method of claim 2 additionally comprising disposing said platinum electrode of step (a) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said etching step (b) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ O.sub.2 up to about 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

6. The method of claim 5 wherein said platinum electrode additionally includes a redeposited sidewall; and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

7. The method of claim 1 wherein said etchant gas of said high density plasma is selected from the group consisting of chlorine, oxygen, argon and mixtures thereof.

8. The method of claim 7 wherein said platinum electrode of step (a) additionally comprises a mask layer disposed on a selected part of said platinum electrode to selectively protect said platinum electrode during said etching step (b).

9. The method of claim 8 wherein said platinum electrode of step (a) additionally comprises a protective layer disposed on said selected part of said platinum electrode between said mask layer and said platinum electrode.

10. The method of claim 1 wherein said etchant gas of said high density plasma consists of oxygen and chlorine.

11. The method of claim 10 comprising disposing said platinum electrode of step (a) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said etching step (b) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Cl.sub.2 0 to 50% by vol. O.sub.2 50 to 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

12. The method of claim 11 wherein said platinum electrode additionally includes a redeposited sidewall, and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

13. The method of claim 1 wherein said platinum electrode of step (a) additionally comprises a mask layer disposed on a selected part of said platinum electrode to selectively protect said platinum electrode during said etching step (b).

14. The method of claim 13 wherein said platinum electrode of step (a) additionally comprises a protective layer disposed on said selected part of said platinum electrode between said mask layer and said platinum electrode.

15. The method of claim 13 additionally comprising removing said mask layer after said etching step (b).

16. The method of claim 15 wherein said redeposited veils of step (a) having been formed on said platinum electrode during etching of said platinum electrode employing a plasma of an etchant gas comprising argon.

17. The method of claim 14 additionally comprising removing said mask layer after said etching step (b).

18. The method of claim 17 additionally comprising removing said protective layer after removing said mask layer.

19. The method of claim 14 additionally comprising removing said mask layer during said etching step (b).

20. The method of claim 5 additionally comprising removing said mask layer during said etching step (b).

21. The method of claim 1 wherein said redeposited veils of step (a) having been formed on said platinum electrode during etching of said platinum electrode employing a plasma of an etchant gas comprising argon.

22. The method of claim 1 additionally comprising disposing said platinum electrode of step (a) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said etching step (b) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Etchant Gas Flow 50 to 400 sccm Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

23. The method of claim 22 wherein said platinum electrode additionally includes a redeposited sidewall; and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

24. A method for producing a capacitance structure including a platinum electrode comprising the steps of: a) providing a substrate supporting a platinum electrode layer and at least one mask layer disposed on a selected part of said platinum electrode layer; b) etching said platinum electrode layer of step (a) including employing a plasma of an etchant gas comprising argon to produce said substrate supporting an etched platinum electrode layer with said at least one mask layer disposed on a selected part of said etched platinum electrode layer; and c) overetching said etched platinum electrode layer of step (b) including employing a high density plasma of an etchant gas to produce a capacitance structure.

25. The method of claim 24 additionally comprising removing said at least one mask layer after said overetching step (c).

26. The method of claim 24 additionally comprising removing said at least one mask layer during said overetching step (c).

27. The method of claim 24 wherein said platinum electrode layer of step (a) additionally comprises a protective layer disposed on said selected part of said platinum electrode layer between said mask layer and said platinum electrode layer.

28. The method of claim 24 wherein said etched platinum electrode layer produced by said etching step (b) includes at least one redeposited veil formed thereon; and said overetching step (c) removes said at least one redeposited veil from said etched platinum electrode layer.

29. The method of claim 24 wherein said etched platinum electrode layer produced by said etching step (b) includes at least two redeposited veils formed thereon with said mask layer disposed on said selected part of said etched platinum electrode layer between said two redeposited veils; and said overetching step (c) removes said two redeposited veils from said etched platinum electrode layer.

30. The method of claim 29 additionally comprising removing one at least one mask layer after said overetching step (c).

31. The method of claim 29 additionally comprising removing said at least one mask layer during said overetching step (c).

32. The method of claim 24 wherein said etchant gas of said high density plasma of step (c) comprises oxygen.

33. The method of claim 32 additionally comprising disposing, prior to said overetching step (c), said etched platinum electrode layer of step (b) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (c) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ O.sub.2 up to about 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

34. The method of claim 33 wherein said platinum electrode layer additionally includes a redeposited sidewall, and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

35. The method of claim 24 wherein said etchant gas of said high density plasma of step (c) is selected from the group consisting of chlorine, oxygen and mixtures thereof.

36. The method of claim 24 wherein said etchant gas of said high density plasma of step (c) consists of oxygen and chlorine.

37. The method of claim 36 additionally comprising disposing, prior to said overetching step (c), said platinum electrode layer of step (b) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (c) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Cl.sub.2 0 to 50% by vol. O.sub.2 50 to 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

38. The method of claim 24 additionally comprising disposing, prior to said overetching step (c), said platinum electrode layer of step (b) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (c) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Etchant Gas Flow 50 to 400 sccm Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

39. The method of claim 38 wherein said platinum electrode layer additionally includes a redeposited sidewall, and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

40. A method of manufacturing a semiconductor device comprising the steps of: a) forming a resist layer, an insulation layer and a platinum electrode layer on a substrate having circuit elements formed thereon; b) etching a portion of said insulation layer including employing a plasma of an etchant gas to break through and to remove said portion of said insulation layer from said platinum electrode layer to produce said substrate supporting said resist layer, a residual insulation layer, and said platinum electrode layer; c) removing said resist layer of step (b) to produce said substrate supporting said residual insulation layer and said platinum electrode layer; d) etching said platinum electrode layer of step (c) including employing a plasma of an etchant gas comprising argon to produce said substrate supporting said residual insulation layer disposed on an etched platinum electrode layer having at least one redeposited veil formed thereon; and e) overetching said etched platinum electrode layer including employing a high density plasma of an etchant gas to remove said redeposited veil from said etched platinum electrode layer and produce a semiconductor device.

41. The method of claim 40 additionally comprising removing said residual insulation layer after said overetching step (e).

42. The method of claim 40 additionally comprising removing said residual insulation layer during said overetching step (e).

43. The method of claim 40 wherein said forming step (a) additionally comprises disposing a protective layer on said platinum electrode layer between said insulation layer and said platinum electrode layer.

44. The method of claim 40 wherein said etched platinum electrode layer produced by said etching step (d) includes a pair of redeposited veils opposedly formed thereon with said residual insulation layer disposed on said etched platinum electrode layer between said pair of redeposited veils; and said overetching step (e) removes said pair of redeposited veils from said etched platinum electrode layer.

45. The method of claim 44 wherein said overetching step (e) additionally removes at least part of said residual insulation layer simultaneously with the removal of said pair of redeposited veils.

46. The method of claim 40 wherein said etchant gas of said high density plasma of step (e) consists of oxygen.

47. The method of claim 46 additionally comprising disposing, prior to said overetching step (e), said etched platinum electrode layer of step (d) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (e) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ O.sub.2 up to about 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

48. The method of claim 47 wherein said platinum electrode layer additionally includes a redeposited sidewall; and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

49. The method of claim 40 wherein said etchant gas of said high density plasma of step (e) comprises chlorine.

50. The method of claim 40 wherein said etchant gas of said high density plasma of step (e) consists of oxygen and chlorine.

51. The method of claim 50 additionally comprising disposing, prior to said overetching step (e), said etched platinum electrode layer of step (d) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (e) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Cl.sub.2 0 to 50% by vol. O.sub.2 50 to 100% by vol. Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

52. The method of claim 51 wherein said platinum electrode layer additionally includes a redeposited sidewall; and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.

53. The method of claim 40 additionally comprising disposing, prior to said overetching step (e), said etched platinum electrode layer of step (d) in a high density plasma chamber including a coil inductor and a wafer pedestal; and performing said overetching step (e) in said high density plasma chamber under the following process conditions: TBL ______________________________________ Process Parameters ______________________________________ Etchant Gas Flow 50 to 400 sccm Pressure, mTorr 0.5 to 40 milliTorr RF Power (watts) 100 to 3000 watts of Coil Inductor RF Power (watts) 50 to 1500 watts of Wafer Pedestal Temperature (.degree. C.) of 20 to 500.degree. C. Platinum Electrode Veil Etch Rate (.ANG./min) 200 to 2000 .ANG./min RF Frequency of 100K to 200 MHz Coil Inductor RF Frequency of 100K to 200 MHz Wafer Pedestal. ______________________________________

54. The method of claim 53 wherein said platinum electrode layer additionally includes a redeposited sidewall, and said process conditions additionally comprise a sidewall etch rate ranging from about 0 .ANG./min to about 300 .ANG./min.