Fabrication method of semiconductor device

1. A fabrication method of a semiconductor device, comprising: (a) preparing a semiconductor substructure; (b) forming a first interlevel dielectric layer on said semiconductor substructure; (c) forming a first wiring layer on said first interlevel dielectric layer; (d) forming a second interlevel dielectric layer on said first interlevel dielectric layer to cover said first wiring layer; (e) forming a first opening in said second interlevel dielectric layer to expose the top of said first wiring layer; (f) forming a first conductive layer on said second interlevel dielectric layer to cover said first opening, said first conductive layer having a first concave part located in said first opening according to the configuration of said first opening; (g) forming a first protection layer on said first conductive layer to cover said first concave part of said first conductive layer, said first protection layer having a first buried part located on said first concave part of said first conductive layer; (h) polishing said first protection layer and said first conductive layer until said second interlevel dielectric layer is exposed, thereby selectively leaving said first concave part of said first conductive layer within said first opening; wherein said first concave part left within said first opening constitutes a first conductor plug for electrically interconnecting said first wiring layer with a second wiring layer which is formed to contact said first conductor plug; and forming a plurality of openings in said second interlevel dielectric layer; wherein said first opening has a minimum diameter size among said first opening and said plurality of openings; and wherein said first conductive layer has a thickness equal to (1/5) to (2/5) of said minimum diameter size of said first opening.

2. A fabrication method of a semiconductor device, comprising; (a) preparing a semiconductor substructure; (b) forming a first interlevel dielectric layer on said semiconductor substructure; (c) forming a first wiring layer on said first interlevel dielectric layer; (d) forming a second interlevel dielectric layer on said first interlevel dielectric layer to cover said first wiring layer; (e) forming a first opening in said second interlevel dielectric layer to expose the top of said first wiring layer; (f) forming a first conductive layer on said second interlevel dielectric layer to cover said first opening, said first conductive layer having a first concave part located in said first opening according to the configuration of said first opening; (g) forming a first protection layer on said first conductive layer to cover said first concave part of said first conductive layer, said first protection layer having a first buried part located on said first concave part of said first conductive layer; (h) polishing said first protection layer and said first conductive layer until said second interlevel dielectric layer is exposed, thereby selectively leaving said first concave part of said first conductive layer within said first opening; wherein said first concave part left within said first opening constitutes a first conductor plug for electrically interconnecting said first wiring layer with a second wiring layer which is formed to contact said first conductor plug; wherein said first opening has a lower part serving as a via hole and an upper part serving as a wiring trench communicated with said via hole.

3. A fabrication method of a semiconductor device, comprising: (a) preparing a semiconductor substructure; (b) forming a first interlevel dielectric layer on said semiconductor substructure; (c) forming a first wiring layer on said first interlevel dielectric layer; (d) forming a second interlevel dielectric layer on said first interlevel dielectric layer to cover said first wiring layer; (e) forming a first opening in said second interlevel dielectric layer to expose the top of said first wiring layer; (f) forming a first conductive layer on said second interlevel dielectric layer to cover said first opening, said first conductive layer having a first concave part located in said first opening according to the configuration of said first opening; (g) forming a first protection layer on said first conductive layer to cover said first concave part of said first conductive layer, said first protection layer having a first buried part located on said first concave part of said first conductive layer; (h) polishing said first protection layer and said first conductive layer until said second interlevel dielectric layer is exposed, thereby selectively leaving said first concave part of said first conductive layer within said first opening; wherein said first concave part left within said first opening constitutes a first conductor plug for electrically interconnecting said first wiring layer with a second wiring layer which is formed to contact said first conductor plug; wherein a second opening is formed in said second interlevel dielectric layer to expose the top of said first wiring layer at a different location from that of said first opening; and wherein said second opening has a larger diameter size than that of said first opening; said method further comprising: forming a second conductive layer on said first protection layer, said second conductive layer having a second concave part located in said second opening according to the configuration of said second opening; forming a second protection layer on said second conductive layer, said second protection layer having a second buried part located on said second concave part of said second conductive layer; wherein said second protection layer, said second conductive layer, said first protection layer, said first conductive layer are polished, thereby selectively leaving said second concave part of said second conductive layer and said second buried part of said second protection layer within said second opening; and wherein said second concave part and said second buried part of said second protection layer left within said second opening constitute a second conductor plug for electrically interconnecting said first wiring layer with said second wiring layer.

4. A fabrication method of a semiconductor device, comprising. (a) preparing a semiconductor substructure; (b) forming a first interlevel dielectric layer on said substructure; (c) forming a first wiring layer on said first interlevel dielectric layer; (d) forming a second interlevel dielectric layer on said first interlevel dielectric layer to cover said first wiring layer; (e) forming a first opening and a second opening in said second interlevel dielectric layer to expose the top of said first wiring layer at different locations, said second opening having a larger diameter than said first opening; (f) forming a first conductive layer on said second interlevel dielectric layer to cover said first and second openings, said first conductive layer having a first concave part located in said first opening according to the configuration of said first opening and a second concave part located in said second opening according to the configuration of said second opening; (g) forming a first protection layer on said first conductive layer to cover said first and second concave parts of said first conductive layer, said first protection layer having a first buried part located on said first concave part of said first conductive layer, and a second buried part located on said second concave part of said first conductive layer; (h) forming a second conductive layer on said first protection layer to cover said first and second openings, said second conductive layer having a third concave part located over said first opening and a fourth concave part located over said second opening; (i) forming a second protection layer on said second conductive layer to cover said third and fourth concave parts of said second conductive layer, said second protection layer having a third buried part located on said third concave part of said second conductive layer, and a fourth buried part located on said fourth concave part of said second conductive layer; and (j) polishing said second protection layer, said second conductive layer, said first protection layer, and said first conductive layer until said second interlevel dielectric layer is exposed, thereby selectively leaving said first concave part of said first conductive layer within said first opening, and said second concave part of said first conductive layer and said fourth concave part of said second conductive layer within said second opening; wherein said first concave part left within said first opening constitutes a first conductor plug for electrically interconnecting said first wiring layer with a second wiring layer which is formed to contact said first conductor plug; and wherein said second concave part of said first conductive layer and said fourth concave part of said second conductive layer left within said second opening constitute a second conductor plug for electrically interconnecting said first wiring layer with said second wiring layer.

5. A method as claimed in claim 4, wherein said first opening has a first diameter and said second opening has a second diameter which is larger than said first diameter; and wherein said first conductive layer has a thickness equal to (1/5) to (2/5) of the diameter of said first opening; and wherein said second conductive layer has a thickness equal to (1/5) to (9/20) of the diameter of said second opening.

6. A method as claimed in claim 4, wherein said first conductive layer is made of at least one selected from the group consisting of tungsten, aluminum, aluminum alloy, and copper; and wherein said first conductive layer is formed by at least one selected from the group consisting of chemical vapor deposition, chemical evaporation, and sputtering.

7. A method as claimed in claim 4, wherein each of said first and second protection layers is made of at least one selected from the group consisting of titanium nitride, titanium, silicon, silicon dioxide produced by plasma-enhanced CVD, silicon nitride produced by plasma-enhanced CVD, and silicon oxynitride produced by plasma-enhanced CVD.

8. A method as claimed in claim 4, wherein said chemical/mechanical polishing process is performed by the use of a slurry including an abrasive material and an oxidizing agent for said first and second conductive layers; said abrasive material includes abrasive particles made of at least one selected from the group consisting of silica, alumina, cerium, and silicon oxynitride.

9. A method as claimed in claim 4, further comprising the step of forming a first barrier layer on said second interlevel dielectric layer to cover said first and second openings; wherein said first conductive layer is formed on said first barrier layer.

10. A method as claimed in claim 4, wherein at least one of said first and second openings has a lower part serving as a via hole and an upper part serving as a wiring trench communicated with said via hole.

11. A fabrication method of a semiconductor device, comprising: (a) preparing a semiconductor substrate; (b) forming a first conductor on said semiconductor substrate; (c) forming a first dielectric layer on said semiconductor substrate to cover said first conductor; (d) forming a first opening in said first dielectric layer to expose the top of said first conductor; (e) forming a second conductor on said first dielectric layer to cover said first opening, said second conductor having a first concave part located in said first opening according to the configuration of said first opening; (f) forming a first protection layer on said second conductor to cover said first concave part of said second conductor, said first protection layer having a first buried part located on said first concave part of said second conductor; (g) removing said first protection layer and said second conductor until said first dielectric layer is exposed, thereby selectively leaving said first concave part of said second conductor within said first opening; wherein said first concave part left within said first opening constitutes a first conductor plug for electrically interconnecting said first conductor with a third conductor which is formed to contact said first conductor plug; wherein a second opening is formed in said first dielectric layer to expose the top of said first conductor at a different location from that of said first opening; and wherein said second opening has a larger diameter size than that of said first opening; said method further comprising: forming a conductive layer on said first protection layer, said conductive layer having a second concave part located in said second opening according to the configuration of said second opening; forming a second protection layer on said conductive layer, said second protection layer having a second buried part located on said second concave part of said conductive layer; wherein said second protection layer, said conductive layer, said first protection layer, said first conductor are removed, thereby selectively leaving said second concave part of said conductive layer and said second buried part of said second protection layer within said second opening; and wherein said second concave part and said second buried part of said second protection layer left within said second opening constitute a second conductor plug for electrically interconnecting said first conductor with said third conductor.