Legal claims defining the scope of protection, as filed with the USPTO.
1. A method for fabricating an integrated circuit, comprising the steps of: forming an etch mask with photolithographic equipment on a substrate having spaced apart sidewalls in the etch mask; forming first spaced apart sidewall spacers on the sidewalls of the etch mask; forming second spaced apart sidewall spacers on the sidewall of the first sidewall spacers, the second sidewall spacers being of different material than the first sidewall spacers; and forming a trench into the substrate in the space between adjacent ones of the second sidewall spacers.
2. The method of claim 1, wherein the space between the second sidewall spacers being less than the practical lithographic limit for the photolithographic equipment being used.
3. A method for fabricating an integrated circuit, comprising the steps of: forming an etch mask on a substrate having spaced apart sidewalls in the etch mask; forming spaced apart sidewall spacers on the sidewalls of the etch mask; forming a trench into the substrate in the space between adjacent ones of the sidewall spacers; removing the sidewall spacers; implanting channel stops into portions of the substrate which are adjacent to the trench and into the bottom of the trench; disposing a dielectric within the trench, between the portions of the substrate in which the channel stops are formed; and removing the etch mask; wherein the step of forming spaced apart, sidewall spacers comprises forming at least two sidewall spacers on the sidewalls of the etch mask.
4. The method according to claim 3, wherein the sidewall spacers are formed of silicon dioxide.
5. The method according to claim 3, further comprising the steps of: after the step of forming the trench into the substrate, undercut etching a pad oxide disposed beneath at least part of the sidewall spacers to expose the outward corners of the substrate which are adjacent to the trench; and growing an oxide layer upon the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
6. The method according to claim 3, wherein the step of forming the spaced apart, sidewall spacers comprises forming only one of the sidewall spacers on each of the sidewalls of the etch mask.
7. The method according to claim 3, wherein the sidewall spacers are formed of silicon nitride.
8. The method according to claim 7, and further comprising the step of: growing a silicon oxide on the outward corners of the substrate which are adjacent to the trench, such that the peripheral edges of the corners are consumed to provide the outward corners with the exterior profiles having a convex shape.
9. The method according to claim 7, and further comprising the step of: performing an undercut etch beneath at least part of the sidewall spacers to consume the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are rounded to have exterior profiles with a convex shape.
10. The method according to claim 9, and further comprising the step of: growing a silicon oxide on the outward corners of the substrate which are adjacent to the trench, such that the peripheral edges of the outward corners are consumed to further round the outward corners with the exterior profiles having a convex shape.
11. The method according to claim 3, wherein the outermost sidewall spacers are formed of silicon nitride.
12. The method according to claim 11, and further comprising the step of: growing a silicon oxide on the outward corners of the substrate which are adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
13. The method according to claim 11, and further comprising the step of: performing an undercut etch beneath at least part of the sidewall spacers to consume the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
14. The method according to claim 13, and further comprising the step of: growing a silicon oxide on the outward corners of the substrate which are adjacent to the trench, such that the peripheral edges of the outward corners are consumed to further round the outward corners with the exterior profiles having a convex shape.
15. A method for fabricating an integrated circuit comprising the steps of: forming an etch mask on the substrate having spaced apart sidewalls in the etch mask; forming first sidewall spacers on the sidewalls of the etch mask; forming second sidewall spacers laterally adjacent to the first sidewall spacers, on opposite sides of the first sidewall spacers from the sidewalls of the etch mask; forming trenches into the substrate in spaces between adjacent ones of the second sidewall spacers; disposing a dielectric material within the trenches; and removing the etch mask, and the first and second sidewall spacers.
16. The method according to claim 15, wherein the first and second sidewall spacers are removed after the step of disposing the dielectric material within the trench.
17. The method according to claim 15, and further comprising the step of: performing an undercut etch beneath at least part of the sidewall spacers to consume the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
18. The method according to claim 15, wherein: the step of forming the first sidewall spacers comprises depositing a first conformal layer of silicon nitride and then applying a first anisotropic etch to the first conformal layer of silicon nitride; and the step of forming the second sidewall spacers comprises depositing a second conformal layer of silicon nitride and then applying a second anisotropic etch to the second conformal layer of silicon nitride.
19. The method according to claim 18, and further comprising the steps of: after the step of forming the trench into the substrate, performing an undercut etch of a pad oxide disposed beneath the second sidewall spacers to expose the outward corners of the substrate which are adjacent to the trench; and growing an oxide layer upon the outward corners of the substrate adjacent to the trench such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
20. The method according to claim 18, and further comprising the step of: after the step of forming the trench into the substrate, performing an undercut etch of the pad oxide to round the outward corners of the substrate which are adjacent to the trench.
21. The method according to claim 15, wherein the etch characteristics of the first sidewall spacers and the second sidewall spacers are different.
22. The method of claim 15, wherein the etch mask has etch properties and the etch properties of the sidewall spacers differ from the etch properties of the etch mask.
23. A method for fabricating an integrated circuit, comprising the steps of: forming an etch mask on a substrate having spaced apart sidewalls in the etch mask; forming first spaced apart, sidewall spacers on the sidewalls of the etch mask; implanting a dopant into portions of the substrate which are adjacent to the first sidewall spacers and which extend between the adjacent ones of the first sidewall spacers; forming second spaced apart, sidewall spacers on the sides of the first sidewall spacers, on an opposite side of the first sidewall spacers from the etch mask; forming a trench between adjacent ones of the second sidewall spacers and into the portions of the substrate having the dopant implanted therein, such that channel stops are defined in the regions of the substrate adjacent to the trench; disposing a dielectric within the trench, between the portions of the substrate in which the channel stops are defined; and removing the etch mask.
24. The method according to claim 23, further comprising the steps of: after the step of forming the trench into the substrate, removing the second sidewall spacers to expose the outward corners of the substrate which are adjacent to the trench; and growing an oxide layer upon the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
25. The method according to claim 23, and further comprising the step of: performing an undercut etch beneath at least part of the second sidewall spacers to consume the outward corners of the substrate adjacent to the trench, such that the peripheral edges of the outward corners are consumed to provide the outward corners with exterior profiles having a convex shape.
26. The method according to claim 25, and further comprising the step of: growing a silicon oxide on the outward corners of the substrate which are adjacent to the trench, such that the peripheral edges of the corners are consumed to further round the outward corners with the exterior profiles having a convex shape.
27. A method for fabricating an integrated circuit comprising the steps of: forming a pad oxide layer on a substrate; forming a nitride layer on the pad oxide layer; removing a portion of the nitride layer by patterning and etching the nitride layer to provide a nitride mask having spaced apart sidewalls of windows of the nitride mask; forming nitride sidewall spacers on the sidewalls of the nitride mask; forming oxide sidewall spacers laterally adjacent to the nitride sidewall spacers, on opposite sides of the nitride sidewall spacers from the sidewalls of the nitride mask; forming trenches into the substrate in spaces defined between spaced apart, adjacent ones of the oxide sidewall spacers; removing the oxide sidewall spacers to expose shelf regions of the substrate adjacent to the trenches; implanting channel stops into the shelf regions of the substrate which are adjacent to the trenches; disposing a dielectric within the trenches, extending between the shelf regions of the substrate in which the channel stops are formed; and removing the nitride sidewall spacers, the nitride layer and the pad oxide layer.
28. The method according to claim 27, wherein the nitride sidewall spacers are removed after the step of disposing the dielectric material within the trenches.
29. The method according to claim 27, further comprising the steps of: after the step of forming the trenches into the substrate, growing an oxide layer upon the corners of the substrate adjacent to the trenches such that the peripheral edges of the corners are consumed to provide the outward corners with exterior profiles having a convex shape; and removing the grown oxide layer to expose the outer corners of the substrate which are adjacent to the trenches.
Cooperative Patent Classification codes for this invention. Click any code to explore related patents in that topic.
Unknown
August 1, 2000
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