Semiconductor device and electronic device

1. A semiconductor device of LOC (Lead On Chip) type, which is provided on a bus channel line board having an insulative substrate and a plurality of parallel and straight bus channel lines, each having the same length, said semiconductor device comprising: a semiconductor chip; and leads provided on said semiconductor chip to be connected to pads of said semiconductor chip, wherein said leads comprise left and right side leads extending towards left and right sides with respect to said pads respectively, such that said left side leads are arranged to be staggered relative to said right side leads by a half pitch of said right side leads.

2. A semiconductor device according to claim 1, further comprising; a metallic film provided between said leads and said semiconductor chip via an insulative film.

3. A semiconductor device according to claim 1, wherein; said right leads serve as signal leads, and said left leads serve as power source or ground leads.

4. A semiconductor device according to claim 1, wherein; said left leads serve as signal leads, and said right leads serve as power source or ground leads.

5. A semiconductor leads according to claim 3 or 4, further comprising; a metallic film provided between said leads and said semiconductor chip via an insulative film.

6. A semiconductor device according to claim 1, wherein; each of said leads is connected with a solder ball in a solder ball grid array.

7. A semiconductor device according to claim 1, wherein; said semiconductor device is a semiconductor memory device.

8. A semiconductor device according to claim 1, wherein; each of said leads on said semiconductor device is opposed to a bus channel line on a bus channel line board.

9. An electronic device, comprising: a bus channel line board having a plurality of parallel and straight bus channel lines, each having the same length; and semiconductor devices provided on said bus channel line board, wherein each of said semiconductor device has leads connected to said parallel and straight bus channel lines and pads of said semiconductor chip, said leads extending towards left and right side directions with respect to said pads in a staggered pattern by a half pitch of said leads.

10. An electronic device according to claim 9, wherein said semiconductor devices are composed of a plurality of memories.

11. An electronic device according to claim 9, wherein; said semiconductor devices are composed of a microprocessor unit, a semiconductor device, a memory controller, and a plurality of memories.

12. An electronic device according to claim 9, wherein; an interval between said adjacent bus channel lines is 0.25 mm or 0.375 mm, and a pitch of external leads of said semiconductor device or solder balls of a solder ball grid array, each being connected with said lead on said semiconductor device, is 0.5 mm or 0.75 mm.

13. An electronic device according to claim 12, wherein; said external leads or said solder balls of said solder ball grid array are arranged so that said external leads or said solder balls are alternately connected with said bus channel lines.