Ferroelectric memory device and a method for manufacturing thereof

1. A ferroelectric memory device comprising: a memory ferroelectric capacitor capable of storing a first polarization state corresponding to a first storing data or a second polarization state corresponding to a second storing data, a load capacitor capable of being connected to the memory ferroelectric capacitor in series, and a storing data detection means for detecting the storing data in accordance with a divided voltage generated at the memory ferroelectric capacitor when a predetermined read-out voltage is applied to both the memory ferroelectric capacitor and the load capacitor both of which are connected to each other in series, wherein a capacitance value of the load capacitor is set so as to maximize a voltage difference between the divided voltage at the first polarization state and the divided voltage at the second polarization state when a voltage for determining characteristics of a capacitor equivalent to the read-out voltage is applied for a predetermined definite time period to the memory ferroelectric capacitor and the load capacitor both of which are connected in series within a time period of a transient-state of the divided voltage in order to detect the storing data in accordance with the divided voltage in the transient-state.

2. A ferroelectric memory device in accordance with claim 1, wherein the predetermined definite time period is set so as to make a maximum value of the voltage difference of the divided voltages and a voltage corresponding a minimum detectable value of the storing data detection means substantially equivalent with each other.

3. A ferroelectric memory device in accordance with claim 2, wherein the voltage corresponding the minimum detectable value of the storing data detection means is determined in consideration of tolerance caused at manufacturing processes and margin of data detection.

4. A ferroelectric memory device in accordance with claim 2, wherein the read-out voltage is applied for a duration substantially equivalent to the predetermined definite time period, and detection of the storing data is carried out by the storing data detection means immediately after elapse of the duration of read-out voltage application.

5. A ferroelectric memory device in accordance with claim 1, wherein the load capacitor is a permanent dielectric capacitor, and a capacitance value of the load capacitor corresponds to a capacitance of the permanent dielectric capacitor.

6. A ferroelectric memory device in accordance with claim 1, wherein the load capacitor is a ferroelectric capacitor, and a capacitance value of the load capacitor corresponds to a hysteresis of the ferroelectric capacitor.

7. A ferroelectric memory device in accordance with claim 1, wherein the ferroelectric memory device has a matrix structure composed of a plurality of memory cells, a desired memory cell is appointed by selecting a memory cell located on an intersection of a desired row belongs to a word line and a desired column belongs to a bit line, and wherein the memory cell comprises the memory ferroelectric capacitor and the load capacitor one end of which is connected to one end of the memory ferroelectric capacitor through a selecting transistor, and wherein a control input terminal of the selecting transistor is connected to the word line, and wherein connecting part of the selecting transistor and the load capacitor is connected to a bit line for detecting storing data, and wherein a ground potential is applied to the other end of the load capacitor, and wherein the other end of the memory ferroelectric capacitor is connected to a plate line for applying a read-out voltage.

8. A ferroelectric memory device in accordance with claim 7, wherein a reference cell drive circuit for providing the read-out voltage to the plate line is provided.

9. A ferroelectric memory device in accordance with claim 7, wherein the storing data detection means comprises both a sense amplifier part and a cell preset circuit part, and data stored in the cell is detected by comparing a voltage appeared on the bit line during read out of the data with a reference voltage generated at the cell preset circuit part by the sense amplifier part.

10. A ferroelectric memory device in accordance with claim 9, wherein the storing data detection means holds own operation for a predetermined duration after detecting application of a read-out voltage to the plate line, and wherein the storing data detection means drives the sense amplifier part immediately after holding the operation.

11. A ferroelectric memory device in accordance with claim 7, wherein the load capacitor is a parasitic capacitor between the bit line and the ground potential.

12. A ferroelectric memory device comprising: a memory ferroelectric capacitor capable of storing a first polarization state corresponding to a first storing data or a second polarization state corresponding to a second storing data, a load capacitor capable of being connected to the memory ferroelectric capacitor in series, and a storing data detection means for detecting the storing data in accordance with a divided voltage generated at the memory ferroelectric capacitor when a predetermined read-out voltage is applied to both the memory ferroelectric capacitor and the load capacitor both of which are connected to each other in series, wherein a capacitance value of the load capacitor is set in correspondence to a duration of applying the read-out voltage in order to detect the storing data in accordance with the divided voltage in a transient-state.

13. A ferroelectric memory device in accordance with claim 12, wherein a capacitance value of the load capacitor is set so as to maximize a voltage difference between the divided voltage at the first polarization state and the divided voltage at the second polarization state in the duration of applying the read-out voltage.

14. A method for manufacturing a ferroelectric memory device comprising a memory ferroelectric capacitor capable of storing a first polarization state corresponding to a first storing data or a second polarization state corresponding to a second storing data, a load capacitor capable of being connected to the memory ferroelectric capacitor in series and a storing data detection means for detecting the storing data in accordance with a divided voltage generated at the memory ferroelectric capacitor when a predetermined read-out voltage is applied to both the memory ferroelectric capacitor and the load capacitor both of which are connected to each other in series comprising the step of: setting a capacitance value of the load capacitor so as to maximize a voltage difference between the divided voltage at the first polarization state and the divided voltage at the second polarization state when a voltage for determining characteristics of a capacitor equivalent to the read-out voltage is applied for a predetermined definite time period to the memory ferroelectric capacitor and the load capacitor both of which are connected in series within a time period of a transient-state of the divided voltage in order to detect the storing data in accordance with the divided voltage in the transient-state.

15. A method for manufacturing a ferroelectric memory device in accordance with claim 14, wherein the predetermined definite time period is set so as to make a maximum value of the voltage difference of the divided voltages and a voltage corresponding a minimum detectable value of the storing data detection means substantially equivalent with each other.

16. A method for manufacturing a ferroelectric memory device in accordance with claim 15, wherein the voltage corresponding the minimum detectable value of the storing data detection means is determined in consideration of tolerance caused at manufacturing processes and margin of data detection.

17. A method for manufacturing a ferroelectric memory device in accordance with claim 15, further comprising steps of: obtaining relationships between a capacitance value of the load capacitor and the voltage difference when a hysteresis of the memory ferroelectric capacitor is fixed to a certain value using a time period t of applying the voltage for determining characteristics of a capacitor as a parameter, selecting a time period t to make a maximum value of the voltage difference and the voltage corresponding the minimum detectable value of the storing data detection means substantially being equivalent with each other, and setting the capacitance value maximizing the voltage difference when the voltage for determining characteristics of a capacitor is applied for the time period t as the capacitance value of the load capacitance.

18. A method for manufacturing a ferroelectric memory device in accordance with claim 17, wherein an applying duration of the read out voltage is set so as to equivalent to the time period t thus selected.

19. A ferroelectric memory device comprising: a memory ferroelectric capacitor capable of storing a first polarization state corresponding to first storing data or a second polarization state corresponding to second storing data; means for maximizing a voltage difference between a first divided voltage at the first polarization state and a second divided voltage at the second polarization state when a voltage equivalent to a read-out voltage is applied for a predetermined definite period within a time period of a transient-state period, to said maximizing means and said memory ferroelectric capacitor connected in series; and storing data detection means for detecting the first and second storing data when the read-out voltage is applied to said maximizing means and said memory ferroelectric capacitor connected in series.

20. A method for manufacturing a ferroelectric memory device comprising a memory ferroelectric capacitor capable of storing a first polarization state corresponding to a first storing data or a second polarization state corresponding to a second storing data, means for maximizing a voltage difference between a first divided voltage at the first polarization state and a second divided voltage at the second polarization state when a voltage equivalent to a read-out voltage is applied for a predetermined definite period to said maximizing means and said memory ferroelectric capacitor connected in series and a storing data detection means for detecting the storing data in accordance with the first and second divided voltages generated at the memory ferroelectric capacitor when a predetermined read-out voltage is applied to both the memory ferroelectric capacitor and the maximizing means, both of which are connected to each other in series, comprising the step of: setting a capacitance value of the maximizing means so as to maximize toe voltage difference between the first divided voltage at the first polarization state and the second divided voltage at the second polarization state when a voltage equivalent to the read-out voltage is applied for a predetermined definite time period within a time period of a transient-state to the memory ferroelectric capacitor and the maximizing means both of which are connected in series.